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1. 发明授权

US07253061B2 Method of forming a gate insulator in group III-V nitride semiconductor devices 有权
标题翻译：在III-V族氮化物半导体器件中形成栅极绝缘体的方法
公开(公告)号：US07253061B2
公开(公告)日：2007-08-07
申请号：US11005193
申请日：2004-12-06
申请人： Lung-Han Peng , Han-Ming Wu , Jing-Yi Lin
发明人： Lung-Han Peng , Han-Ming Wu , Jing-Yi Lin
IPC分类号： H01L21/336
CPC分类号： H01L21/02241 , H01L21/02258 , H01L21/02337 , H01L21/3143 , H01L21/31679 , H01L29/78681
摘要： A method of forming a gate insulator in the manufacture of a semiconductor device comprises conducting a photo-assisted electrochemical process to form a gate-insulating layer on a gallium nitride layer of the semiconductor device, wherein the gate-insulating layer includes gallium oxynitride and gallium oxide, and performing a rapid thermal annealing process. The photo-assisted electrochemical process uses an electrolyte bath including buffered CH3COOH at a pH between about 5.5 and 7.5. The rapid thermal annealing process is conducted in O2 environment at a temperature between about 500° C. and 800° C.
摘要翻译：在制造半导体器件中形成栅极绝缘体的方法包括进行光辅助电化学处理以在半导体器件的氮化镓层上形成栅极绝缘层，其中栅极绝缘层包括氮氧化镓和镓并进行快速热退火处理。光辅助电化学方法在约5.5和7.5之间的pH下使用包括缓冲CH 3 COOH的电解质浴。快速热退火工艺在O 2 O 2环境中在约500℃至800℃的温度下进行。

2. 发明申请

US20030235970A1 METHOD FOR GROWING LAYERS OF GROUP III - NITRIDE SEMICONDUCTOR HAVING ELECTRICALLY PASSIVATED THREADING DEFECTS 有权
标题翻译：第III组 - 具有电解钝化缺陷的氮化物半导体层的生长方法
公开(公告)号：US20030235970A1
公开(公告)日：2003-12-25
申请号：US10179806
申请日：2002-06-25
发明人： Julia Wan-Ping Hsu , Michael James Manfra , Nils Guenter Weimann
IPC分类号： H01L021/336 , C30B001/00 , H01L021/20
CPC分类号： C30B29/40 , H01L21/02178 , H01L21/02241 , H01L21/02258 , H01L21/0242 , H01L21/02458 , H01L21/0254 , H01L21/02631 , H01L21/31679 , H01L29/2003 , H01L29/7371 , H01L29/7786 , H01L29/78
摘要： One method includes epitaxially growing a layer of group III-nitride semiconductor under growth conditions that cause a growth surface to be rough. The method also includes performing an epitaxial growth of a second layer of group III-nitride semiconductor on the first layer under growth conditions that cause the growth surface to become smooth. The two-step growth produces a lower density of threading defects. Another method includes epitaxially growing a layer of group III-nitride semiconductor on a lattice-mismatched crystalline substrate and then, chemically treating a growth surface of the layer to selectively electrically passivate defects that thread the layer.
摘要翻译：一种方法包括在使生长表面粗糙的生长条件下外延生长III族氮化物半导体层。该方法还包括在使生长表面变得光滑的生长条件下，在第一层上执行第III族氮化物半导体的第二层的外延生长。两步增长产生较低的螺纹缺陷密度。另一种方法包括在晶格失配的晶体衬底上外延生长III族氮化物半导体层，然后化学处理该层的生长表面以选择性地电钝化该层的缺陷。

3. 发明申请

US20030235934A1 Layers of group III-nitride semiconductor made by processes with multi-step epitaxial growths 有权
标题翻译：通过多步外延生长工艺制备的III族氮化物半导体层
公开(公告)号：US20030235934A1
公开(公告)日：2003-12-25
申请号：US10349007
申请日：2003-01-22
发明人： Michael James Manfra , Nils Guenter Weimann
IPC分类号： H01L021/00 , H01L021/336 , H01L021/20
CPC分类号： C30B29/40 , H01L21/02178 , H01L21/02241 , H01L21/02258 , H01L21/0242 , H01L21/02458 , H01L21/0254 , H01L21/02631 , H01L21/31679 , H01L29/2003 , H01L29/7371 , H01L29/7786 , H01L29/78
摘要： One method includes epitaxially growing a layer of group III-nitride semiconductor under growth conditions that cause a growth surface to be rough. The method also includes performing an epitaxial growth of a second layer of group III-nitride semiconductor on the first layer under growth conditions that cause the growth surface to become smooth. The two-step growth produces a lower density of threading defects. Another method includes epitaxially growing a layer of group III-nitride semiconductor on a lattice-mismatched crystalline substrate and then, chemically treating a growth surface of the layer to selectively electrically passivate defects that thread the layer.
摘要翻译：一种方法包括在使生长表面粗糙的生长条件下外延生长III族氮化物半导体层。该方法还包括在使生长表面变得光滑的生长条件下，在第一层上执行第III族氮化物半导体的第二层的外延生长。两步增长产生较低的螺纹缺陷密度。另一种方法包括在晶格失配的晶体衬底上外延生长III族氮化物半导体层，然后化学处理该层的生长表面以选择性地电钝化该层的缺陷。

4. 发明授权

US4569728A Selective anodic oxidation of semiconductors for pattern generation 失效
标题翻译：用于图案生成的半导体的选择性阳极氧化
公开(公告)号：US4569728A
公开(公告)日：1986-02-11
申请号：US667306
申请日：1984-11-01
申请人： Bijan Davari , Pankaj K. Das
发明人： Bijan Davari , Pankaj K. Das
IPC分类号： C25D11/32 , H01L21/316 , C25D11/02 , C25D17/00
CPC分类号： H01L21/02241 , C25D11/32 , H01L21/02258 , H01L21/31679 , Y10S204/07
摘要： Apparatus and method for selectively controlling anodic oxide growth on semiconductors for controlled electrochemical pattern generation incorporating use of a writing beam of a wavelength which encourages oxide growth and a bias beam at a wavelength which discourages oxide growth. The bias beam is projected on the semiconductor in electrolytic environment to prevent or retard oxide growth while oxide growth is accelerated at points of illumination by means of writing beam.
摘要翻译：选择性地控制半导体上的阳极氧化物生长用于受控电化学图案生成的装置和方法，其结合使用鼓励氧化物生长的波长的写入光束和在阻止氧化物生长的波长处的偏置光束。偏置光束在电解环境中投射在半导体上，以防止或延迟氧化物生长，同时通过写入光束在照明点加速氧化物生长。

5. 发明授权

US4268535A Process for growing a superficial dielectric structure upon a substrate, made of a chemical compound, comprising at least two elements 失效
标题翻译：在由包含至少两种元素的化合物制成的基材上生长表面电介质结构的方法
公开(公告)号：US4268535A
公开(公告)日：1981-05-19
申请号：US70043
申请日：1979-08-27
申请人： Michel Croset , Gonzalo Velasco
发明人： Michel Croset , Gonzalo Velasco
IPC分类号： C23C8/16 , C25D11/32 , H01L21/316 , B05D3/06
CPC分类号： H01L21/02241 , C25D11/32 , H01L21/02252 , H01L21/02255 , H01L21/02258 , H01L21/02299 , H01L21/31666 , H01L21/31679
摘要： In a process for producing a surface compound between a substrate and a reactive species a thin layer permeable to the species in question is deposited on the substrate. A particularly interesting case is the oxidation of a substrate of gallium arsenide, the thin layer being made from zirconia doped with lime.
摘要翻译：在用于在基材和反应性物质之间生产表面化合物的方法中，所述物质可渗透的薄层沉积在基材上。特别有趣的情况是砷化镓衬底的氧化，薄层由掺有石灰的氧化锆制成。

6. 发明授权

US4226667A Oxide masking of gallium arsenide 失效
标题翻译：砷化镓的氧化物掩蔽
公开(公告)号：US4226667A
公开(公告)日：1980-10-07
申请号：US956392
申请日：1978-10-31
申请人： Ralph A. Logan
发明人： Ralph A. Logan
IPC分类号： H01L21/3105 , H01L21/316 , H01L21/324 , H01L21/308
CPC分类号： H01L21/02241 , H01L21/02258 , H01L21/3105 , H01L21/31679 , H01L21/3245 , Y10S438/902 , Y10S438/942
摘要： The use of gallium arsenide as an electronic material is increasing in popularity. However, its utility for planar MOS technology is hindered by the fact that its native oxide stabilizes upon heating and becomes etch resistant. I have discovered that it is the vaporization of arsenic containing compounds in the oxide which renders the oxide insoluble. A technique is described wherein an inert capping layer is disposed on a layer of the native oxide prior to heat exposure. This prevents evaporation of arsenic, and both the capping layer and the oxide are capable of subsequent dissolution in a weak acid or base.
摘要翻译：砷化镓作为电子材料的使用越来越受欢迎。然而，其对于平面MOS技术的实用性受到其天然氧化物在加热时稳定并变得耐蚀刻的事实的阻碍。我发现在氧化物中含砷化合物的蒸发是使氧化物不溶解的。描述了一种技术，其中在热曝光之前将惰性覆盖层设置在自然氧化物的层上。这防止了砷的蒸发，并且封盖层和氧化物都能够随后在弱酸或碱中溶解。

7. 发明授权

US07001813B2 Layers of group III-nitride semiconductor made by processes with multi-step epitaxial growths 有权
标题翻译：通过多步外延生长工艺制备的III族氮化物半导体层
公开(公告)号：US07001813B2
公开(公告)日：2006-02-21
申请号：US10349007
申请日：2003-01-22
申请人： Michael James Manfra , Nils Guenter Weimann
发明人： Michael James Manfra , Nils Guenter Weimann
IPC分类号： H01L21/336
CPC分类号： C30B29/40 , H01L21/02178 , H01L21/02241 , H01L21/02258 , H01L21/0242 , H01L21/02458 , H01L21/0254 , H01L21/02631 , H01L21/31679 , H01L29/2003 , H01L29/7371 , H01L29/7786 , H01L29/78
摘要： One method includes epitaxially growing a layer of group III-nitride semiconductor under growth conditions that cause a growth surface to be rough. The method also includes performing an epitaxial growth of a second layer of group III-nitride semiconductor on the first layer under growth conditions that cause the growth surface to become smooth. The two-step growth produces a lower density of threading defects.
摘要翻译：一种方法包括在使生长表面粗糙的生长条件下外延生长III族氮化物半导体层。该方法还包括在使生长表面变得光滑的生长条件下，在第一层上执行第III族氮化物半导体的第二层的外延生长。两步增长产生较低的螺纹缺陷密度。

8. 发明申请

US20040124427A1 Apparatus with improved layers of group III-nitride semiconductor 有权
标题翻译：具有改进的III族氮化物半导体层的装置
公开(公告)号：US20040124427A1
公开(公告)日：2004-07-01
申请号：US10735191
申请日：2003-12-12
发明人： Julia Wan-Ping Hsu , Michael James Manfra , Nils Guenter Weimann
IPC分类号： H01L027/15
CPC分类号： C30B29/40 , H01L21/02178 , H01L21/02241 , H01L21/02258 , H01L21/0242 , H01L21/02458 , H01L21/0254 , H01L21/02631 , H01L21/31679 , H01L29/2003 , H01L29/7371 , H01L29/7786 , H01L29/78
摘要： An apparatus includes a crystalline substrate having a top surface, a crystalline semiconductor layer located on the top surface, and a plurality of dielectric regions. The crystalline semiconductor layer includes group III-nitride and has first and second surfaces. The first surface is in contact with the top surface. The second surface is separated from the top surface by semiconductor of the crystalline semiconductor layer. The dielectric regions are located on the second surface. Each dielectric region is distant from the other dielectric regions and covers an end of an associated lattice defect. Each lattice defect threads the crystalline semiconductor layer.
摘要翻译：一种装置包括具有顶表面的晶体衬底，位于顶表面上的晶体半导体层，以及多个电介质区域。晶体半导体层包括III族氮化物并具有第一和第二表面。第一表面与顶表面接触。第二表面通过晶体半导体层的半导体与顶表面分离。电介质区域位于第二表面上。每个电介质区域远离其它电介质区域并覆盖相关晶格缺陷的一端。每个晶格缺陷都会导致晶体半导体层。

9. 发明授权

US4154663A Method of providing thinned layer of epitaxial semiconductor material having substantially uniform reverse breakdown voltage characteristic 失效
标题翻译：提供具有基本均匀的反向击穿电压特性的外延半导体材料的薄化层的方法
公开(公告)号：US4154663A
公开(公告)日：1979-05-15
申请号：US879020
申请日：1978-02-17
申请人： Robert L. Adams
发明人： Robert L. Adams
IPC分类号： C25F3/12 , H01L21/3063 , H01L21/316 , B23P1/00
CPC分类号： H01L21/02241 , C25F3/12 , H01L21/02258 , H01L21/30635 , H01L21/31679
摘要： Method of providing a thinned layer of epitaxial semiconductor material having a substantially uniform reverse breakdown voltage characteristic (RVBV) on a substrate, wherein stringent control is necessary in the determination of the thickness of the epitaxial layer. This method has particular application to the fabrication of high performance Read-IMPATT diodes of gallium arsenide where it is desirable to achieve a device structure in which substantially equal reverse breakdown voltage values exist across the entire substrate. A particular GaAs Read-IMPATT diode has two epitaxial layers including a relatively lightly doped first epitaxial layer disposed on the substrate and a second top epitaxial layer whose thickness must be controlled as to uniformity and as to magnitude to enable proper microwave operation of the device. The method herein disclosed accomplishes a thickness reduction in the top epitaxial layer of a GaAs Read-IMPATT diode by anodically growing an oxide on the top epitaxial layer under voltage limited conditions and then removing the oxide by cathodic reduction to achieve leveling of the top epitaxial layer to a thinned substantially uniform thickness.
摘要翻译：提供在衬底上具有基本均匀的反向击穿电压特性（RVBV）的外延半导体材料的薄化层的方法，其中在确定外延层的厚度时需要严格的控制。该方法特别适用于制造砷化镓的高性能读IMPATT二极管，其中希望实现在整个衬底上存在基本上相等的反向击穿电压值的器件结构。特定的GaAs Read-IMPATT二极管具有两个外延层，其包括设置在衬底上的相对轻掺杂的第一外延层和第二顶部外延层，其厚度必须被控制为均匀性并且大小以使得器件能够进行适当的微波操作。本文公开的方法通过在电压限制条件下在顶部外延层上阳极生长氧化物，然后通过阴极还原去除氧化物，实现GaAs读取 - 强制二极管的顶部外延层的厚度减小，以实现顶部外延层变薄到基本均匀的厚度。

10. 发明授权

US3890215A Electrochemical thinning of semiconductor devices 失效
标题翻译：半导体器件的电化学稀化
公开(公告)号：US3890215A
公开(公告)日：1975-06-17
申请号：US44066474
申请日：1974-02-08
申请人： BELL TELEPHONE LABOR INC
发明人： DILORENZO JAMES VINCENT , NIEHAUS WILLIAM CHARLES , RODE DANIEL LEON , SCHWARTZ BERTRAM
IPC分类号： H01L21/3063 , H01L21/316 , H01L29/00 , B23P1/00 , H01L7/00
CPC分类号： H01L21/31679 , H01L21/02241 , H01L21/02258 , H01L21/3063 , H01L21/30635 , H01L29/00 , Y10S438/977
摘要： A method for precisely tailoring the thickness of a layer of semiconductor material in a structure comprising regions of varying doping concentrations in order to achieve desired uniform electrical properties. The method involves, generally, electrolytically thinning the layer to remove the semiconductor material until a desired field distribution in the structure is reached. In one embodiment, an FET with an epitaxial layer on a semi-insulating substrate is manufactured by successively oxidizing the epitaxial layer and dissolving the oxide until the depletion region resulting from the applied potential extends into the semi-insulating substrate and oxide growth stops. This results in a uniform pinch-off condition along the layer regardless of the original non-uniformity in the epitaxial layer. In a further embodiment, the epitaxial layer in an IMPATT structure is thinned by successive oxidation and dissolution until the voltage dropped across the semiconductor is equal to the applied potential and again oxide growth stops. This procedure results in a desired uniform breakdown voltage for the wafer.
摘要翻译：一种用于在包括改变掺杂浓度的区域的结构中精确地定制半导体材料层的厚度的方法，以便实现期望的均匀电性能。通常，该方法通常电解稀薄该层以去除半导体材料，直到达到结构中的期望的场分布。在一个实施例中，在半绝缘衬底上具有外延层的FET通过连续地氧化外延层并溶解氧化物来制造，直到由所施加的电势产生的耗尽区延伸到半绝缘衬底中并且氧化物生长停止。这导致沿着该层的均匀夹断条件，而不管外延层中的原始不均匀性如何。在另一个实施方案中，通过连续的氧化和溶解使IMPATT结构中的外延层变薄，直到跨过半导体的电压下降等于所施加的电势，并且再次氧化物生长停止。该过程导致晶片所需的均匀击穿电压。

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