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1. 发明授权

US5038198A Modular semiconductor power device 失效
标题翻译：模块化半导体功率器件
公开(公告)号：US5038198A
公开(公告)日：1991-08-06
申请号：US462544
申请日：1990-01-09
申请人： Antonio Perniciaro Spatrisano , Luciano Gandolfi , Carlo Minotti , Natale Di Cristina
发明人： Antonio Perniciaro Spatrisano , Luciano Gandolfi , Carlo Minotti , Natale Di Cristina
IPC分类号： A61K39/175 , C12N7/06 , H01L21/50 , H01L23/495 , H01L25/065
CPC分类号： H01L23/49575 , H01L21/50 , H01L25/0655 , H01L2924/0002 , Y10T29/4913 , Y10T29/49146
摘要： A modular semiconductor power device has a conductive member consisting of an alumina plate to which copper layers are soldered on opposite sides. A chip is soldered to one of these layers and the other of these layers is soldered in turn to a metal heat sink. The chip is connected to respective copper strips which, in turn, are soldered to thermal strips originally forming part of a frame so that, after the device is encapsulated in a synthetic resin, the connecting members of the frame can be cut away to leave free ends of the latter strips exposed.

2. 发明授权

US4950919A MOS-transistor bridge circuit 失效
标题翻译： MOS晶体管桥接电路
公开(公告)号：US4950919A
公开(公告)日：1990-08-21
申请号：US194602
申请日：1988-05-16
申请人： Domenico Rossi , Claudio Diazzi , Carlo Cini
发明人： Domenico Rossi , Claudio Diazzi , Carlo Cini
IPC分类号： H02P7/00 , H03K17/687 , H03K17/695
CPC分类号： H03K17/6871 , H02P7/04
摘要： In this MOS-transistor bridge circuit, for obtaining a fast flyback conduction of the current after a normal operation of the circuit, instead of the flyback diodes associated with each transistor of the bridge, the MOS transistors themselves are employed, driven so as to conduct current from the ground to the power supply, that is in the opposite direction with respect to that of normal operation. For this purpose a control section is provided receiving at the input a fast flyback signal and comprising delay gates connected to the disable inputs of the transistors, so as to delay switching off thereof, and to maintain in the on state two diagonally opposed transistors so as to allow current to flow from the ground to the power supply through these diagonally opposed transistors and the load until the current decreases to zero.

3. 发明授权

US4926138A Fully-differential reference voltage source 失效
标题翻译：全差分参考电压源
公开(公告)号：US4926138A
公开(公告)日：1990-05-15
申请号：US375771
申请日：1989-07-05
申请人： Rinaldo Castello , Marco Ferro , Franco Salerno , Lucano Tomasini
发明人： Rinaldo Castello , Marco Ferro , Franco Salerno , Lucano Tomasini
IPC分类号： G05F3/24 , G05F3/20 , G05F3/30 , H03F3/343 , H03K17/60
CPC分类号： G05F3/30 , G05F3/20
摘要： The source is apt to generate a fully-differential reference voltage at the output terminals, whereto precisely-balanced loads are applied. The voltage reference is obtained from a bandgap voltage source fed with currents proportional to the temperature, in order to minimize thermal voltage variations. Suitable circuits for starting the normal source operation after switching on are also provided.

4. 发明授权

US4902634A Process for manufacturing CMOS devices 失效
标题翻译： CMOS器件制造工艺
公开(公告)号：US4902634A
公开(公告)日：1990-02-20
申请号：US220652
申请日：1988-07-18
申请人： Paolo Picco
发明人： Paolo Picco
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L21/823842 , Y10S148/082
摘要： A process for manufacturing CMOS devices is described, wherein two separate masks are used for the production of the gate regions of the two complementary transistors of the CMOS device, each of said masks allowing the formation of the gate region of only one of the two complementary transistors and being also used for the implantation of ions adapted to form the source and drain regions of said transistor. Accordingly only two masking steps are sufficient for the production of the gate, drain and source regions of the CMOS devices, with a reduction of the costs related to the production of integrated circuits executed in CMOS technology.

5. 发明授权

US4899098A Low voltage drop series regulator with overvoltage and overcurrent protection 失效
标题翻译：具有过压和过流保护功能的低压降串联调节器
公开(公告)号：US4899098A
公开(公告)日：1990-02-06
申请号：US211925
申请日：1988-06-27
申请人： Roberto Gariboldi
发明人： Roberto Gariboldi
IPC分类号： G05F1/569
CPC分类号： G05F1/569
摘要： A series voltage regulator includes a protective circuit that detects the collector current from a PBP power transistor and the collector-emitter voltage thereof. Such current and voltage signals are generated, respectively, by an auxiliary PNP transistor having a collector current which is proportional to that of the PNP power transistor, and by a circuit connected between the emitter and the collector of the PNP power transistor. The collector current and collector emitter voltage signals are processed by a circuit which, whenever the current and voltage values are greater than preset maximum values, reduces the PNP power transistor current and maintains it within permissible limits. The protective circuit does not affect the minimum voltage drop between the input and output of the regulator and may be dimensioned so as to use the maximum extent of the S.O.A. of the PNP power transistor.
摘要翻译：串联稳压器包括检测来自PBP功率晶体管的集电极电流及其集电极 - 发射极电压的保护电路。这样的电流和电压信号分别由具有与PNP功率晶体管的集电极电流成比例的集电极电流以及连接在PNP功率晶体管的发射极和集电极之间的电路的辅助PNP晶体管产生。集电极电流和集电极发射极电压信号由电路进行处理，每当电流和电压值大于预设的最大值时，电路会降低PNP功率晶体管电流并将其保持在允许的极限内。保护电路不影响调节器的输入和输出之间的最小电压降，并且其尺寸可以使用S.O.A.的最大范围。的PNP功率晶体管。

6. 发明授权

US4886162A Container for vacuum storing and/or shipping silicon wafers 失效
标题翻译：用于真空储存和/或运送硅晶片的容器
公开(公告)号：US4886162A
公开(公告)日：1989-12-12
申请号：US151454
申请日：1988-02-02
申请人： Sala Ambrogio
发明人： Sala Ambrogio
IPC分类号： B65D85/86 , B65D81/20 , H01L21/673
CPC分类号： H01L21/67353 , B65D81/2015 , H01L21/67386
摘要： A container specifically designed for vacumm holding and shipping a silicon wafer, is provided with two circular portions having circumferentially, on bulged top and lower faces outer rasied edges and, within the top face of the circular portion forming the bottom portion of the assembled container, an inner edge.
摘要翻译：专门设计用于真空保存和运送硅晶片的容器设置有两个圆形部分，其在周向上具有凸出的顶部和底部外部边缘，并且在形成组装的容器的底部的圆形部分的顶面内，内边缘。

7. 发明授权

US4871927A Latch-up prevention in a two-power-supply CMOS integrated circuit by means of a single integrated MOS transistor 失效
标题翻译：通过单个集成MOS晶体管在双电源CMOS集成电路中进行锁存预防
公开(公告)号：US4871927A
公开(公告)日：1989-10-03
申请号：US159267
申请日：1988-02-23
申请人： Carlo Dallavalle
发明人： Carlo Dallavalle
IPC分类号： H01L27/08 , H01L27/092 , H03K19/003
CPC分类号： H03K19/00315 , H01L27/0921 , H01L2924/0002
摘要： Latch-up in two supplies (+VCC and -VBB) CMOS integrated circuits is prevented by means of a single integrated protection MOS transistor, N-channel for P-Well CMOS or P-channel for N-Well CMOS, having its drain (source) connected to ground and its body region, gate and source (drain) connected to -VBB (+VCC). The desired threshold voltage and dimensions of the protection transistor do not present particular problems of implementation.
摘要翻译：两个电源（+ VCC和-VBB）CMOS集成电路的锁存通过单个集成保护MOS晶体管，用于P阱的N沟道或N阱CMOS P沟道来防止，其漏极（源极）连接到地及其体区，栅极和源极（漏极）连接到-VBB（+ VCC）。保护晶体管的期望阈值电压和尺寸不存在特定的实现问题。

8. 发明授权

US4814723A Integratable class AB output stage for low-frequency amplifiers 失效
标题翻译：用于低频放大器的集成AB类输出级
公开(公告)号：US4814723A
公开(公告)日：1989-03-21
申请号：US180742
申请日：1988-04-12
申请人： Edoardo Botti
发明人： Edoardo Botti
IPC分类号： H03F3/20 , H03F3/213 , H03F3/30 , H03F3/26
CPC分类号： H03F3/3067
摘要： To obtain a constant quiescent current, high dynamics and high stability of a class AB output stage of low-frequency amplifiers, comprising an input transistor; a driving circuit comprising a current source, a first pair of driving transistors connected in series between the current source and the input transistor, a second pair of driving transistors mutually connected in series and driven by the first pair of driving transistors; as well as a pair of output transistors driven by the second pair of driving transistors, the driving circuit comprises a first resistor connected between the current source and the base of one of the first pair of driving transistors, a second resistor connected between the bases of the transistors of the first pair and a resistive network inserted in series between the transistors of the second driving pair. The resistive network is constituted by two resistive branches connected in parallel, the intermediate point of the first resistive branch being connected to the ground voltage and the intermediate terminal of the other resistive branch being connected to the stage output.

9. 发明授权

US4807188A Nonvolatile memory device with a high number of cycle programming endurance 失效
标题翻译：具有大量循环编程耐久性的非易失性存储器件
公开(公告)号：US4807188A
公开(公告)日：1989-02-21
申请号：US199077
申请日：1988-05-26
申请人： Giulio Casagrande
发明人： Giulio Casagrande
IPC分类号： G11C17/00 , G11C16/04 , G11C16/06 , G11C16/10 , G11C16/28 , G11C29/00 , G11C29/04 , H01L21/822 , H01L21/8246 , H01L21/8247 , H01L27/04 , H01L27/112 , H01L29/788 , H01L29/792 , G11C11/34 , G11C7/00 , H03K3/01
CPC分类号： G11C16/3495 , G11C16/0441 , G11C16/10 , G11C16/28
摘要： An electrically alterable, non volatile memory device capable of enduring a high number of cycles utilizes an array of "semidouble" cells, each formed by a pair of elementary EEPROM cells connected substantially in parallel and a single select transistor. A special program lines biasing circuit generating a bias voltage representative of a condition wherein one of the two elementary EEPROM structure is broken and sense amplifiers comprising a comparator circuit comparing the current flowing through an addressed semidouble memory cell with the current flowing through a reference cell comprising a pair of virgin EEPROM type elementary cells to ensure operability of each bit of the memory also when one of the two elementary cells supporting the bit fails. Different from known memories, only the EEPROM structure is duplicated while column lines, select lines and ancillary circuitry don't require duplication.

10. 发明授权

US4905067A Integrated circuit for driving inductive loads 失效
标题翻译：用于驱动感性负载的集成电路
公开(公告)号：US4905067A
公开(公告)日：1990-02-27
申请号：US173213
申请日：1988-03-25
申请人： Marco Morelli , Fabio Marchio , Francesco Tricoli , Giampietro Maggioni
发明人： Marco Morelli , Fabio Marchio , Francesco Tricoli , Giampietro Maggioni
IPC分类号： H01L21/8222 , H01L27/02 , H01L27/06 , H03K17/16 , H03K17/64
CPC分类号： H01L27/0229 , H01L27/0248 , H03K17/16 , H03K17/64
摘要： An integrated circuit for driving inductive loads comprises at least one substrate and a plurality of separate epitaxial wells, and has at least one output terminal for connection to an inductive load and a reference terminal for connection to a reference voltage. To reliably isolate the different epitaxial wells in each operating state, the circuit comprises diodes interposed between the substrate on one side and the output and reference terminals on the other to set the substrate to the reference potential when the potential on the output terminal is greater than the reference potential and to set the substrate to the output potential when the latter becomes smaller than the reference potential.

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