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1. 发明授权

US07812339B2 Method for making a semiconductor device including shallow trench isolation (STI) regions with maskless superlattice deposition following STI formation and related structures 有权
标题翻译：制造半导体器件的方法，其包括在STI形成和相关结构之后具有无掩模超晶格沉积的浅沟槽隔离（STI）区域
公开(公告)号：US07812339B2
公开(公告)日：2010-10-12
申请号：US12102305
申请日：2008-04-14
申请人： Robert J. Mears , Kalipatnam Vivek Rao
发明人： Robert J. Mears , Kalipatnam Vivek Rao
IPC分类号： H01L29/06
CPC分类号： H01L29/1054 , H01L21/76237 , H01L29/1033 , H01L29/15
摘要： A semiconductor device may include a semiconductor substrate having a surface, a shallow trench isolation (STI) region in the semiconductor substrate and extending above the surface thereof, and a superlattice layer adjacent the surface of the semiconductor substrate and comprising a plurality of stacked groups of layers. More particularly, each group of layers of the superlattice layer may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Moreover, at least some atoms from opposing base semiconductor portions may be chemically bound together with the chemical bonds traversing the at least one intervening non-semiconductor monolayer. The semiconductor device may further include a lateral spacer between the superlattice layer and the STI region and which may include a lower non-monocrystalline semiconductor superlattice portion and an upper dielectric portion.
摘要翻译：半导体器件可以包括在半导体衬底中具有表面，浅沟槽隔离（STI）区域并在其表面之上延伸的半导体衬底和邻近半导体衬底的表面的超晶格层，并且包括多个层叠的层。更具体地，超晶格层的每组层可以包括限定基极半导体部分的多个堆叠的基底半导体单层和限制在相邻的基极半导体部分的晶格内的至少一个非半导体单层。此外，来自相对的基底半导体部分的至少一些原子可以与穿过至少一个介入的非半导体单层的化学键化学地结合在一起。半导体器件还可以包括在超晶格层和STI区之间的横向间隔物，并且其可以包括下部非单晶半导体超晶格部分和上部电介质部分。

2. 发明授权

US07718996B2 Semiconductor device comprising a lattice matching layer 有权
标题翻译：包括晶格匹配层的半导体器件
公开(公告)号：US07718996B2
公开(公告)日：2010-05-18
申请号：US11677098
申请日：2007-02-21
申请人： Ilija Dukovski , Robert John Stephenson , Jean Augustin Chan Sow Fook Yiptong , Samed Halilov , Robert J. Mears , Xiangyang Huang , Marek Hytha
发明人： Ilija Dukovski , Robert John Stephenson , Jean Augustin Chan Sow Fook Yiptong , Samed Halilov , Robert J. Mears , Xiangyang Huang , Marek Hytha
IPC分类号： H01L29/06
CPC分类号： H01L29/155 , H01L21/0237 , H01L21/02381 , H01L21/02439 , H01L21/0245 , H01L21/02488 , H01L21/02499 , H01L21/02507 , H01L21/0251 , H01L21/02521 , H01L21/02532 , H01L21/28194 , H01L21/28255 , H01L29/1079 , H01L29/1083 , H01L29/152 , H01L29/51 , H01L29/513 , H01L29/78
摘要： A semiconductor device may include a first monocrystalline layer comprising a first material having a first lattice constant. A second monocrystalline layer may include a second material having a second lattice constant different than the first lattice constant. The device may also include a lattice matching layer between the first and second monocrystalline layers and comprising a superlattice. The superlattice may include a plurality of groups of layers, and each group of layers may include a plurality of stacked semiconductor monolayers defining a semiconductor base portion and at least one non-semiconductor monolayer thereon. The at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent base semiconductor portions, and at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween.
摘要翻译：半导体器件可以包括包含具有第一晶格常数的第一材料的第一单晶层。第二单晶层可以包括具有不同于第一晶格常数的第二晶格常数的第二材料。该器件还可以包括第一和第二单晶层之间的晶格匹配层并且包括超晶格。超晶格可以包括多组层，并且每组层可以包括多个层叠的半导体单层，其限定半导体基底部分和至少一个非半导体单层。至少一个非半导体单层可以被约束在相邻的基底半导体部分的晶格内，并且来自相对的基极半导体部分的至少一些半导体原子可以通过其间的至少一个非半导体单层化学地结合在一起。

3. 发明授权

US07700447B2 Method for making a semiconductor device comprising a lattice matching layer 有权
标题翻译：制造包括晶格匹配层的半导体器件的方法
公开(公告)号：US07700447B2
公开(公告)日：2010-04-20
申请号：US11677099
申请日：2007-02-21
申请人： Ilija Dukovski , Robert John Stephenson , Jean Augustin Chan Sow Fook Yiptong , Samed Halilov , Robert J. Mears , Xiangyang Huang , Marek Hytha
发明人： Ilija Dukovski , Robert John Stephenson , Jean Augustin Chan Sow Fook Yiptong , Samed Halilov , Robert J. Mears , Xiangyang Huang , Marek Hytha
IPC分类号： H01L21/336
CPC分类号： H01L29/155 , H01L21/0237 , H01L21/02381 , H01L21/02439 , H01L21/0245 , H01L21/02488 , H01L21/02499 , H01L21/02507 , H01L21/0251 , H01L21/02521 , H01L21/02532 , H01L21/28194 , H01L21/28255 , H01L29/1079 , H01L29/1083 , H01L29/152 , H01L29/51 , H01L29/513 , H01L29/78
摘要： A method for making a semiconductor device which may include forming a first monocrystalline layer comprising a first material having a first lattice constant, a second monocrystalline layer including a second material having a second lattice constant different than the first lattice constant, and a lattice matching layer between the first and second monocrystalline layers and comprising a superlattice. More particularly, the superlattice may include a plurality of groups of layers, and each group of layers may include a plurality of stacked semiconductor monolayers defining a semiconductor base portion and at least one non-semiconductor monolayer thereon. Furthermore, the at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent base semiconductor portions, and at least some semiconductor atoms from opposing base semiconductor portions may be chemically bound together through the at least one non-semiconductor monolayer therebetween.
摘要翻译：一种制造半导体器件的方法，其可以包括形成包括具有第一晶格常数的第一材料的第一单晶层，包括具有不同于第一晶格常数的第二晶格常数的第二材料的第二单晶层和晶格匹配层在第一和第二单晶层之间并且包括超晶格。更具体地，超晶格可以包括多组层，并且每组层可以包括限定半导体基底部分和至少一个非半导体单层的多个堆叠的半导体单层。此外，至少一个非半导体单层可以被约束在相邻的基底半导体部分的晶格内，并且来自相对的基极半导体部分的至少一些半导体原子可以通过其间的至少一个非半导体单层化学地结合在一起。

4. 发明授权

US07625767B2 Methods of making spintronic devices with constrained spintronic dopant 有权
标题翻译：制造具有约束自旋电子掺杂剂的自旋电子器件的方法
公开(公告)号：US07625767B2
公开(公告)日：2009-12-01
申请号：US11687430
申请日：2007-03-16
申请人： Xiangyang Huang , Samed Halilov , Jean Augustin Chan Sow Fook Yiptong , Ilija Dukovski , Marek Hytha , Robert J. Mears
发明人： Xiangyang Huang , Samed Halilov , Jean Augustin Chan Sow Fook Yiptong , Ilija Dukovski , Marek Hytha , Robert J. Mears
IPC分类号： H01L21/00
CPC分类号： B82Y10/00 , B82Y25/00 , B82Y40/00 , H01F1/401 , H01F1/405 , H01F10/3213 , H01F10/3268 , H01F41/301 , H01L29/1054 , H01L29/15 , H01L29/66984
摘要： A method is for making a spintronic device and may include forming at least one superlattice and at least one electrical contact coupled thereto, with the at least one superlattice including a plurality of groups of layers. Each group of layers may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion having a crystal lattice, at least one non-semiconductor monolayer constrained within the crystal lattice of adjacent base semiconductor portions, and a spintronic dopant. The spintronic dopant may be constrained within the crystal lattice of the base semiconductor portion by the at least one non-semiconductor monolayer. In some embodiments, the repeating structure of a superlattice may not be needed.
摘要翻译：一种制造自旋电子器件的方法可包括形成至少一个超晶格和至少一个耦合到其上的电触点，所述至少一个超晶格包括多组层。每组层可以包括多个层叠的基底半导体单层，其限定具有晶格的基底半导体部分，约束在相邻的基底半导体部分的晶格内的至少一个非半导体单层，以及自旋电子掺杂剂。所述自旋电子掺杂剂可以通过所述至少一个非半导体单层约束在所述基底半导体部分的晶格内。在一些实施例中，可能不需要超晶格的重复结构。

5. 发明授权

US07586165B2 Microelectromechanical systems (MEMS) device including a superlattice 有权
标题翻译：包括超晶格的微机电系统（MEMS）装置
公开(公告)号：US07586165B2
公开(公告)日：2009-09-08
申请号：US11421234
申请日：2006-05-31
申请人： Richard A. Blanchard
发明人： Richard A. Blanchard
IPC分类号： H01L29/84
CPC分类号： B81C1/0019 , B81B2203/0118 , B81C2201/019
摘要： A microelectromechanical system (MEMS) device may include a substrate and at least one movable member supported by the substrate. The at least one movable member may include a superlattice including a plurality of stacked groups of layers with each group of layers of the superlattice comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.
摘要翻译：微机电系统（MEMS）装置可以包括衬底和由衬底支撑的至少一个可动构件。所述至少一个可移动部件可以包括超晶格，其包括多个层叠的层，其中每个层的超晶格包括限定基极半导体部分的多个层叠的基底半导体单层，以及限定在其中的至少一个非半导体单层相邻的基底半导体部分的晶格。

6. 发明授权

US07432524B2 Integrated circuit comprising an active optical device having an energy band engineered superlattice 有权
标题翻译：集成电路包括具有能带工程超晶格的有源光学器件
公开(公告)号：US07432524B2
公开(公告)日：2008-10-07
申请号：US10936903
申请日：2004-09-09
申请人： Robert J. Mears , Robert John Stephenson
发明人： Robert J. Mears , Robert John Stephenson
IPC分类号： H01L29/06
CPC分类号： H01L29/1054 , H01L21/823807 , H01L29/155 , H01L29/7833
摘要： An integrated circuit may include at least one active optical device including a superlattice including a plurality of stacked groups of layers. Each group of layers of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. The energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The integrated circuit may further include a waveguide coupled to the at least one active optical device.
摘要翻译：集成电路可以包括至少一个有源光学器件，其包括包含多个层叠的多组层的超晶格。超晶格的每组层可以包括在其上限定基极半导体部分和能带改性层的多个堆叠的基底半导体单层。能带修改层可以包括约束在相邻的基底半导体部分的晶格内的至少一个非半导体单层。集成电路还可以包括耦合到至少一个有源光学器件的波导。

7. 发明申请

US20080179664A1 SEMICONDUCTOR DEVICE WITH A VERTICAL MOSFET INCLUDING A SUPERLATTICE AND RELATED METHODS 有权
标题翻译：具有垂直MOSFET的半导体器件，包括超导和相关方法
公开(公告)号：US20080179664A1
公开(公告)日：2008-07-31
申请号：US12018260
申请日：2008-01-23
申请人： Kalipatnam Vivek Rao
发明人： Kalipatnam Vivek Rao
IPC分类号： H01L29/417 , H01L21/336
CPC分类号： H01L29/7827 , B82Y10/00 , H01L21/823487 , H01L21/823885 , H01L27/0688 , H01L29/1054 , H01L29/158 , H01L29/66666 , H01L29/78642 , H01L29/78696
摘要： A semiconductor device may include at least one vertical Metal Oxide Semiconductor Field Effect Transistor (MOSFET) on a substrate. The vertical MOSFET may include at least one superlattice including a plurality of laterally stacked groups of layers transverse to the substrate. The vertical MOSFET(s) may further include a gate laterally adjacent the superlattice, and regions vertically above and below the superlattice and cooperating with the gate for causing transport of charge carriers through the superlattice in the vertical direction. Each group of layers of the superlattice may include stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. At least some atoms from opposing base semiconductor portions may be chemically bound together with the chemical bonds traversing the at least one intervening non-semiconductor monolayer.
摘要翻译：半导体器件可以在衬底上包括至少一个垂直金属氧化物半导体场效应晶体管（MOSFET）。垂直MOSFET可以包括至少一个超晶格，其包括横跨于衬底的多个横向层叠的层组。垂直MOSFET还可以包括横向邻近超晶格的栅极，以及垂直于超晶格上方和下方的区域，并与栅极配合，以使载流子在垂直方向上传输超晶格。超晶格的每组层可以包括限定基极半导体部分的堆叠的基底半导体单层和约束在相邻的基极半导体部分的晶格内的至少一个非半导体单层。来自相对的基底半导体部分的至少一些原子可以与穿过至少一个介入的非半导体单层的化学键化学地结合在一起。

8. 发明申请

US20080179588A1 SEMICONDUCTOR DEVICE INCLUDING A METAL-TO-SEMICONDUCTOR SUPERLATTICE INTERFACE LAYER AND RELATED METHODS 有权
标题翻译：包括金属到半导体超导界面层的半导体器件及相关方法
公开(公告)号：US20080179588A1
公开(公告)日：2008-07-31
申请号：US12018255
申请日：2008-01-23
申请人： Kalipatnam Vivek Rao
发明人： Kalipatnam Vivek Rao
IPC分类号： H01L29/15 , H01L21/338
CPC分类号： H01L29/154 , H01L29/1054 , H01L29/165 , H01L29/66643
摘要： A semiconductor device which may include a semiconductor layer, and a superlattice interface layer therebetween. The superlattice interface layer may include a plurality of stacked groups of layers. Each group of layers may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. At least some atoms from opposing base semiconductor portions may be chemically bound together with the chemical bonds traversing the at least one intervening non-semiconductor monolayer.
摘要翻译：可以包括半导体层的半导体器件和它们之间的超晶格界面层。超晶格界面层可以包括多个堆叠的层组。每组层可以包括限定基底半导体部分的多个层叠的基底半导体单层，以及约束在相邻的基底半导体部分的晶格内的至少一个非半导体单层。来自相对的基底半导体部分的至少一些原子可以与穿过至少一个介入的非半导体单层的化学键化学地结合在一起。

9. 发明申请

US20110193063A1 MULTIPLE-WAVELENGTH OPTO-ELECTRONIC DEVICE INCLUDING A SUPERLATTICE 有权
标题翻译：多波长光电设备，包括超声波
公开(公告)号：US20110193063A1
公开(公告)日：2011-08-11
申请号：US13017863
申请日：2011-01-31
申请人： Robert J. Mears , Robert John Stephenson , Marek Hytha , Ilija Dukovski , Jean Augustin Chan Sow Fook Yiptong , Samed Halilov , Xiangyang Huang
发明人： Robert J. Mears , Robert John Stephenson , Marek Hytha , Ilija Dukovski , Jean Augustin Chan Sow Fook Yiptong , Samed Halilov , Xiangyang Huang
IPC分类号： H01L31/0352 , H01L31/18
CPC分类号： H01L31/035236 , B82Y20/00 , H01L29/15 , H01L31/076 , H01L33/06 , H01L33/08 , H01L33/28 , H01S5/3072 , Y02E10/548
摘要： A multiple-wavelength opto-electronic device may include a substrate and a plurality of active optical devices carried by the substrate and operating at different respective wavelengths. Each optical device may include a superlattice comprising a plurality of stacked groups of layers, and each group of layers may include a plurality of stacked semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer thereon.
摘要翻译：多波长光电器件可以包括衬底和由衬底承载并在不同的相应波长下操作的多个有源光学器件。每个光学器件可以包括超晶格，其包括多个堆叠的层组，并且每组层可以包括限定基极半导体部分和其上的至少一个非半导体单层的多个堆叠的半导体单层。

10. 发明授权

US07863066B2 Method for making a multiple-wavelength opto-electronic device including a superlattice 有权
标题翻译：制造包括超晶格的多波长光电装置的方法
公开(公告)号：US07863066B2
公开(公告)日：2011-01-04
申请号：US11675846
申请日：2007-02-16
申请人： Robert J. Mears , Robert John Stephenson , Marek Hytha , Ilija Dukovski , Jean Augustin Chan Sow Fook Yiptong , Samed Halilov , Xiangyang Huang
发明人： Robert J. Mears , Robert John Stephenson , Marek Hytha , Ilija Dukovski , Jean Augustin Chan Sow Fook Yiptong , Samed Halilov , Xiangyang Huang
IPC分类号： H01L21/00
CPC分类号： H01L31/035236 , B82Y20/00 , H01L31/022466 , H01L31/028 , H01L31/0304 , H01L31/0725 , H01L31/18 , H01L31/1884 , H01L33/06 , Y02E10/50
摘要： A method for making a multiple-wavelength opto-electronic device which may include providing a substrates and forming a plurality of active optical devices to be carried by the substrate and operating at different respective wavelengths. Moreover, each optical device may include a superlattice comprising a plurality of stacked groups of layers, and each group of layers may include a plurality of stacked semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer thereon.
摘要翻译：一种制造多波长光电子器件的方法，其可以包括提供衬底并形成要由衬底承载并在不同的相应波长下操作的多个有源光学器件。此外，每个光学器件可以包括超晶格，其包括多个堆叠的层组，并且每组层可以包括限定基极半导体部分和至少一个非半导体单层的多个堆叠的半导体单层。

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