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1. 发明授权

US08502520B2 Isolated power converter 有权
标题翻译：隔离式电源转换器
公开(公告)号：US08502520B2
公开(公告)日：2013-08-06
申请号：US12341804
申请日：2008-12-22
申请人： Sriram Chandrasekaran
发明人： Sriram Chandrasekaran
IPC分类号： H01F27/28 , H02M7/00
CPC分类号： H01F37/00 , H01F3/14 , H01F27/38 , H01F27/40 , H02M7/217 , Y10T29/49071
摘要： An isolated power converter that includes, in one embodiment, a first magnetic core having a primary winding and a secondary winding around the first magnetic core. The power converter includes a second magnetic core having a first leg, a second leg coupled to the first leg, and a third leg coupled to the first and second legs, wherein a part of the third leg is equidistant from the first leg and the second leg. The power converter also includes a first winding encircling the first leg, a first end of the first winding coupled to the secondary winding, a second winding encircling the second leg, a first end of the second winding coupled to the secondary winding, and a third winding encircling the third leg, a first end of the third winding coupled to a second end of the first winding and to a second end of the second winding.
摘要翻译：一种隔离式功率转换器，在一个实施例中包括具有初级绕组的第一磁芯和围绕第一磁芯的次级绕组。所述功率转换器包括第二磁芯，所述第二磁芯具有第一支腿，耦合到所述第一支腿的第二支腿和耦合到所述第一和第二支腿的第三支腿，其中所述第三支腿的一部分与所述第一支腿等距，腿。功率转换器还包括围绕第一支腿的第一绕组，耦合到次级绕组的第一绕组的第一端，环绕第二支脚的第二绕组，耦合到次级绕组的第二绕组的第一端，以及第三绕组围绕第三腿的绕组，第三绕组的第一端耦合到第一绕组的第二端和第二绕组的第二端。

2. 发明授权

US07838905B2 Semiconductor device having multiple lateral channels and method of forming the same 有权
标题翻译：具有多个横向通道的半导体器件及其形成方法
公开(公告)号：US07838905B2
公开(公告)日：2010-11-23
申请号：US12034746
申请日：2008-02-21
申请人： Berinder P. S. Brar , Wonill Ha
发明人： Berinder P. S. Brar , Wonill Ha
IPC分类号： H01L31/0328
CPC分类号： H01L29/7783 , H01L29/1029 , H01L29/41766 , H01L29/66462
摘要： A semiconductor device having multiple lateral channels with contacts on opposing surfaces thereof and a method of forming the same. In one embodiment, the semiconductor device includes a conductive substrate having a first contact covering a substantial portion of a bottom surface thereof. The semiconductor device also includes a first lateral channel above the conductive substrate and a second lateral channel above the first lateral channel. The semiconductor device further includes a second contact above the second lateral channel. The semiconductor device still further includes an interconnect that connects the first and second lateral channels to the conductive substrate operable to provide a low resistance coupling between the first contact and the first and second lateral channels.
摘要翻译：一种半导体器件，具有在其相对表面上具有接触的多个侧向通道及其形成方法。在一个实施例中，半导体器件包括具有覆盖其底表面的实质部分的第一触点的导电衬底。半导体器件还包括在导电衬底上方的第一横向沟道和在第一横向沟道上方的第二横向沟道。半导体器件还包括在第二侧向通道上方的第二接触。半导体器件还包括将第一和第二横向沟道连接到导电衬底的互连，其可操作以在第一接触和第一和第二横向通道之间提供低电阻耦合。

3. 发明授权

US07715180B2 All-in-one computer with height adjustable display 有权
标题翻译：具有高度可调显示的一体机
公开(公告)号：US07715180B2
公开(公告)日：2010-05-11
申请号：US11705390
申请日：2007-02-12
申请人： David H. Titzler , Chen-Chien Kuo , Stephen T. Schooley
发明人： David H. Titzler , Chen-Chien Kuo , Stephen T. Schooley
IPC分类号： G06F1/16 , H05K5/00
CPC分类号： G06F1/16 , G06F1/1601 , Y10T29/49002
摘要： A novel integrated computer includes a support base, a computer component pivotally coupled to the support base, and a display component slidably coupled to the computer component. The pivotal connection between the support base and the computer component facilitates adjustment of the tilt of the display. The slidable connection between the computer component and the display component facilitates height adjustment of the display, without affecting the tilt of the display. A biasing member prevents unwanted movement of the display, while allowing adjustment of the display. A method for manufacturing the integrated computer is also disclosed.
摘要翻译：一种新颖的集成计算机包括支撑基座，可枢转地联接到支撑基座的计算机部件和可滑动地联接到计算机部件的显示部件。支撑基座和计算机部件之间的枢转连接便于调节显示器的倾斜。计算机部件和显示部件之间的可滑动连接有利于显示器的高度调节，而不会影响显示器的倾斜。偏置构件防止显示器的不期望的移动，同时允许显示器的调节。还公开了一种用于制造集成计算机的方法。

4. 发明授权

US07675759B2 Power system with power converters having an adaptive controller 有权
标题翻译：具有电源转换器的电力系统具有自适应控制器
公开(公告)号：US07675759B2
公开(公告)日：2010-03-09
申请号：US11710276
申请日：2007-02-23
申请人： Daniel A. Artusi , Ross Fosler , Allen F. Rozman
发明人： Daniel A. Artusi , Ross Fosler , Allen F. Rozman
IPC分类号： H02M3/335
CPC分类号： H02M3/33507 , H02M1/4225 , H02M3/33592 , H02M2001/007 , Y02B70/126 , Y02B70/1475
摘要： A power system having a power converter with an adaptive controller. The power system is coupled to a load and includes a power system controller that receives a signal indicating a system operational state of the load and selects a power converter operational state as a function thereof. The power system also includes a power converter with a power switch that conducts for a duty cycle to provide a regulated output characteristic at an output thereof. The power converter also includes a controller that receives a command from the power system controller to enter the power converter operational state and provides a signal to control the duty cycle of the power switch as a function of the output characteristic and in accordance with the command, thereby regulating an internal operating characteristic of the power converter to improve an operating efficiency thereof as a function of the system operational state.
摘要翻译：具有具有自适应控制器的功率转换器的电力系统。电力系统耦合到负载，并且包括电力系统控制器，其接收指示负载的系统操作状态的信号，并且作为其功能选择功率转换器操作状态。电力系统还包括具有功率开关的功率转换器，该功率开关导通占空比以在其输出端提供稳定的输出特性。电力转换器还包括控制器，其接收来自电力系统控制器的命令以进入功率转换器的工作状态，并提供信号以根据输出特性并根据该命令控制功率开关的占空比，从而调节功率转换器的内部工作特性，以提高其作为系统操作状态的函数的操作效率。

5. 发明授权

US07663183B2 Vertical field-effect transistor and method of forming the same 有权
标题翻译：垂直场效应晶体管及其形成方法
公开(公告)号：US07663183B2
公开(公告)日：2010-02-16
申请号：US11765323
申请日：2007-06-19
申请人： Berinder P. S. Brar , Wonill Ha
发明人： Berinder P. S. Brar , Wonill Ha
IPC分类号： H01L29/732 , H01L21/8238
CPC分类号： H01L27/0629 , H01L29/872
摘要： A semiconductor device, a method of forming the same, and a power converter including the semiconductor device. In one embodiment, the semiconductor device includes a heavily doped substrate, a source/drain contact below the heavily doped substrate, and a channel layer above the heavily doped substrate. The semiconductor device also includes a heavily doped source/drain layer above the channel layer and another source/drain contact above the heavily doped source/drain layer. The semiconductor device further includes pillar regions through the another source/drain contact, the heavily doped source/drain layer, and portions of the channel layer to form a vertical cell therebetween. Non-conductive regions of the semiconductor device are located in the portions of the channel layer within the pillar regions. The semiconductor device still further includes a gate above the non-conductive regions in the pillar regions. The semiconductor device may also include a Schottky diode including the channel layer and a Schottky contact.
摘要翻译：半导体器件，其形成方法以及包括半导体器件的功率转换器。在一个实施例中，半导体器件包括重掺杂衬底，重掺杂衬底下面的源极/漏极接触以及重掺杂衬底之上的沟道层。半导体器件还包括在沟道层上方的重掺杂源极/漏极层以及重掺杂源极/漏极层上方的另一个源极/漏极接触。该半导体器件还包括通过另一个源/漏接触，重掺杂源/漏层和沟道层的部分的柱区域，以在其间形成垂直单元。半导体器件的非导电区域位于柱状区域内的沟道层的部分。半导体器件还包括在柱状区域中的非导电区域之上的栅极。半导体器件还可以包括包括沟道层和肖特基接触的肖特基二极管。

6. 发明授权

US07564074B2 Semiconductor device including a lateral field-effect transistor and Schottky diode 有权
公开(公告)号：US07564074B2
公开(公告)日：2009-07-21
申请号：US11866249
申请日：2007-10-02
申请人： Mariam Gergi Sadaka , Berinder P. S. Brar , Wonill Ha , Chanh Ngoc Minh Nguyen
发明人： Mariam Gergi Sadaka , Berinder P. S. Brar , Wonill Ha , Chanh Ngoc Minh Nguyen
IPC分类号： H01L31/0328
CPC分类号： H01L27/0605 , H01L27/0629 , H01L27/0727 , H01L29/20 , H01L29/66462 , H01L29/7783 , H01L29/872
摘要： A semiconductor device including a lateral field-effect transistor and Schottky diode and method of forming the same. In one embodiment, the lateral field-effect transistor includes a buffer layer having a contact covering a substantial portion of a bottom surface thereof, a lateral channel above the buffer layer, another contact above the lateral channel, and an interconnect that connects the lateral channel to the buffer layer. The semiconductor device also includes a Schottky diode parallel-coupled to the lateral field-effect transistor including a cathode formed from another buffer layer interposed between the buffer layer and the lateral channel, a Schottky interconnect interposed between the another buffer layer and the another contact, and an anode formed on a surface of the Schottky interconnect operable to connect the anode to the another contact. The semiconductor device may also include an isolation layer interposed between the buffer layer and the lateral channel.

7. 发明授权

US07468649B2 Isolated power converter 有权
标题翻译：隔离式电源转换器
公开(公告)号：US07468649B2
公开(公告)日：2008-12-23
申请号：US11686140
申请日：2007-03-14
申请人： Sriram Chandrasekaran
发明人： Sriram Chandrasekaran
IPC分类号： H01F27/28 , H01F38/28 , H01F27/34
CPC分类号： H01F37/00 , H01F3/14 , H01F27/38 , H01F27/40 , H02M7/217 , Y10T29/49071
摘要： There is provided an isolated power converter. More particularly, in one embodiment, there is provided a power converter including a first magnetic core having a primary winding and a secondary winding around the first magnetic core. The power converter also includes a second magnetic core having a first leg, a second leg coupled to the first leg, and a third leg coupled to the first and second legs, wherein a part of the third leg is equidistant from the first leg and the second leg. The power converter also has a first winding encircling the first leg, a first end of the first winding coupled to the secondary winding, a second winding encircling the second leg, a first end of the second winding coupled to the secondary winding, and a third winding encircling the third leg, a first end of the third winding coupled to a second end of the first wining and to a second end of the second winding.
摘要翻译：提供了一个隔离的电源转换器。更具体地，在一个实施例中，提供了一种功率转换器，其包括具有初级绕组的第一磁芯和围绕第一磁芯的次级绕组。功率转换器还包括第二磁芯，其具有第一支腿，耦合到第一支腿的第二支腿和耦合到第一和第二支腿的第三支腿，其中第三支腿的一部分与第一支腿等距并且第二条腿功率转换器还具有围绕第一支腿的第一绕组，耦合到次级绕组的第一绕组的第一端，环绕第二支脚的第二绕组，耦合到次级绕组的第二绕组的第一端，以及第三绕组围绕第三腿的绕组，第三绕组的第一端，其耦合到第一绕线的第二端和第二绕组的第二端。

8. 发明申请

US20080071998A1 Marking synchronization positions in an elastic store 失效
标题翻译：在弹性存储中标记同步位置
公开(公告)号：US20080071998A1
公开(公告)日：2008-03-20
申请号：US11899726
申请日：2007-09-06
申请人： Mark Carson
发明人： Mark Carson
IPC分类号： G06F12/00
CPC分类号： H04J3/0632 , H04J3/047 , H04J3/0623 , H04L7/005
摘要： A method and apparatus that allows egress pointer smoothing data by evaluating the average fill of an elastic store. For one embodiment of the invention, an elastic store implements a plurality of independent FIFOs, each FIFO having a write pointer and a read pointer, the write pointer including a marking pointer field and valid flag field. An incoming byte is received to a location within a traffic memory and the write pointer is used to instruct the traffic memory to indicate that the incoming bit has been received to the location. The valid flag field is set to indicate that the value at the location is currently valid.
摘要翻译：一种通过评估弹性存储器的平均填充来允许出口指针平滑数据的方法和装置。对于本发明的一个实施例，弹性存储器实现多个独立的FIFO，每个FIFO具有写指针和读指针，所述写指针包括标记指针字段和有效标志字段。输入字节被接收到业务存储器内的位置，并且写指针用于指示业务存储器指示已经接收到该进入位到该位置。有效标志字段被设置为指示该位置处的值当前是有效的。

9. 发明申请

US20070201476A1 Single stage pointer and overhead processing 有权
标题翻译：单级指针和开销处理
公开(公告)号：US20070201476A1
公开(公告)日：2007-08-30
申请号：US11704731
申请日：2007-02-09
申请人： Mark Carson
发明人： Mark Carson
IPC分类号： H04L12/56
CPC分类号： H04J3/0632 , H04J3/047 , H04J3/0623 , H04L7/005
摘要： A method and system for providing single stage pointer and overhead processing is disclosed. In accordance with one embodiment of the invention, data including bytes of each of multiple types of overhead data is received at a logical element of a communications network. The logical element includes a labeler to label the bytes of each of the multiple types of overhead data and a pointer processor to read the labeled bytes and perform specific operations corresponding to the label, wherein the bytes of at least one type of overhead data are labeled based on feedback provided by the pointer processor to the labeler.
摘要翻译：公开了一种用于提供单级指针和开销处理的方法和系统。根据本发明的一个实施例，在通信网络的逻辑元件处接收包括多种类型的开销数据中的每一种的字节的数据。逻辑元件包括标签器，用于标记多种类型的开销数据中的每一种的字节;以及指针处理器，用于读取标记的字节并执行与标签相对应的特定操作，其中至少一种类型的开销数据的字节被标记基于指针处理器向标签器提供的反馈。

10. 发明申请

US20060285597A1 Reusing interpolated values in advanced video encoders 审中-公开
标题翻译：在高级视频编码器中重用内插值
公开(公告)号：US20060285597A1
公开(公告)日：2006-12-21
申请号：US11157319
申请日：2005-06-20
申请人： Pallapothu Shyam Sundera Bala Koteswara Gupta , Kopparapu Suman , Raghu SrikanthaRao , Korada Ramkishor
发明人： Pallapothu Shyam Sundera Bala Koteswara Gupta , Kopparapu Suman , Raghu SrikanthaRao , Korada Ramkishor
IPC分类号： H04N11/04 , H04N7/12 , H04B1/66 , H04N11/02
CPC分类号： H04N19/523 , H04N19/61
摘要： The fact that fractional-pixel points that are searched are close to each other, and hence the half-pixel and quarter-pixel interpolation of each point involves computing interpolations that have already been computed, may be exploited. This is accomplished by storing the interpolated values of the first point and reusing them when computing the interpolations for the other points. This may be performed for both horizontal and vertical interpolations. For interpolation in both the horizontal and vertical directions, the horizontal interpolated values may be reused, and vertical interpolation carried out over them, or vice-versa. For computing the quarter-pixel interpolated values, the half-pixel interpolated values computed and stored previously may be used.
摘要翻译：被搜索的分数像素点彼此接近的事实，因此每个点的半像素和四分之一像素内插涉及已经计算的计算内插。这是通过存储第一点的内插值并在计算其他点的内插时重用它们来实现的。这可以对水平和垂直内插执行。对于水平和垂直方向的内插，可以重复使用水平内插值，并对其进行垂直内插，反之亦然。为了计算四分之一像素内插值，可以使用先前计算和存储的半像素内插值。

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