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1. 发明申请

US20090216998A1 Apparatus for and Method of Processor to Processor Communication for Coprocessor Functionality Activation 有权
标题翻译：用于协处理器功能激活的处理器到处理器通信的装置和方法
公开(公告)号：US20090216998A1
公开(公告)日：2009-08-27
申请号：US12037948
申请日：2008-02-27
申请人： Zorik Machulsky , Julian Satran , Leah Shalev , Michael Steven Siegel , Gregory Scott Still , James Xenidis
发明人： Zorik Machulsky , Julian Satran , Leah Shalev , Michael Steven Siegel , Gregory Scott Still , James Xenidis
IPC分类号： G06F15/76 , G06F9/30
CPC分类号： G06F9/5044 , G06F9/3879 , G06F2209/509
摘要： A novel and useful mechanism enabling a processor in a multiprocessor complex to function as a coprocessor to execute a specific function. The method includes a mechanism for activating a coprocessor to function as a coprocessor as well as a mechanism to execute a coprocessor request on the system. The present invention also provides a mechanism for efficient processor to processor communication for processors coupled to a common bus. Overall system performance is enhanced by significantly reducing the use of hardware interrupts for processor to processor communication.
摘要翻译：一种新颖有用的机制，使多处理器复合体中的处理器能够用作协处理器来执行特定功能。该方法包括用于激活协处理器以用作协处理器的机制以及在系统上执行协处理器请求的机制。本发明还提供了一种用于处理器与处理器通信的有效处理器的机制，用于处理器与公共总线相连。通过显着减少处理器到处理器通信的硬件中断的使用，整体系统性能得到增强。

2. 发明授权

US07865697B2 Apparatus for and method of processor to processor communication for coprocessor functionality activation 有权
标题翻译：用于协处理器功能激活的处理器到处理器通信的装置和方法
公开(公告)号：US07865697B2
公开(公告)日：2011-01-04
申请号：US12037948
申请日：2008-02-27
申请人： Zorik Machulsky , Julian Satran , Leah Shalev , Michael Steven Siegel , Gregory Scott Still , James Xenidis
发明人： Zorik Machulsky , Julian Satran , Leah Shalev , Michael Steven Siegel , Gregory Scott Still , James Xenidis
IPC分类号： G06F15/76 , G06F15/80
CPC分类号： G06F9/5044 , G06F9/3879 , G06F2209/509
摘要： A mechanism enabling a processor in a multiprocessor complex to function as a coprocessor to execute a specific function. The method includes a mechanism for activating a coprocessor to function as a coprocessor as well as a mechanism to execute a coprocessor request on the system. The present invention also provides a mechanism for efficient processor to processor communication for processors coupled to a common bus. Overall system performance is enhanced by significantly reducing the use of hardware interrupts for processor to processor communication.
摘要翻译：使多处理器复合体中的处理器能够用作协处理器来执行特定功能的机制。该方法包括用于激活协处理器以用作协处理器的机制以及在系统上执行协处理器请求的机制。本发明还提供了一种用于处理器与处理器通信的有效处理器的机制，用于处理器与公共总线相连。通过显着减少处理器到处理器通信的硬件中断的使用，整体系统性能得到增强。

3. 发明授权

US06519663B1 Simple enclosure services (SES) using a high-speed, point-to-point, serial bus 失效
标题翻译：使用高速，点对点串行总线的简单机箱服务（SES）
公开(公告)号：US06519663B1
公开(公告)日：2003-02-11
申请号：US09481537
申请日：2000-01-12
申请人： Thomas James Osten , Delbert Raymond Cecchi , Gregory Scott Still
发明人： Thomas James Osten , Delbert Raymond Cecchi , Gregory Scott Still
IPC分类号： G06F1300
CPC分类号： G06F13/4295 , Y02D10/14 , Y02D10/151
摘要： Enclosure services in a computer system having a Host computer and at least one Target device, are provided on a functional path, which is preferably a relatively high-speed, point-to-point serial bus between the Host computer and the at least one Target device. The at least one Target device and the Host computer each have a full power operational mode and an auxiliary power mode. The Host computer generates enclosure services commands and sends them to the at least one Target device on the functional path. The at least one Target device can receive and respond to the enclosure services commands, even when in the auxiliary power mode.
摘要翻译：在具有主计算机和至少一个目标设备的计算机系统中的机箱服务被提供在功能路径上，该功能路径优选地是主计算机和至少一个目标之间的相对高速的点对点串行总线设备。至少一个Target设备和Host计算机各具有全功率操作模式和辅助功率模式。主机计算机生成机箱服务命令并将其发送到功能路径上的至少一个目标设备。即使在辅助电源模式下，至少一个目标设备也可以接收和响应机箱服务命令。

4. 发明授权

US06735660B1 Sideband signal transmission between host and input/output adapter 失效
标题翻译：主机和输入/输出适配器之间的边带信号传输
公开(公告)号：US06735660B1
公开(公告)日：2004-05-11
申请号：US09747081
申请日：2000-12-21
申请人： Thomas James Osten , Gregory Scott Still
发明人： Thomas James Osten , Gregory Scott Still
IPC分类号： G06F1338
CPC分类号： G06F13/409
摘要： Sideband communication capability is incorporated into an Input/Output Adapter (IOA) and/or a host apparatus in a manner that permits the communication of base I/O and other sideband signals between an IOA and a host apparatus without conflicting with standard IOA and/or I/O architecture form factors. The primary connector of an IOA may be selectively partitioned to permit sideband information to be communicated across the primary connector, often without compromising the primary communication functionality of the primary connector. In lieu of or in addition to such a partitioned connector, a second, sideband connector may be incorporated into an IOA and/or host apparatus.
摘要翻译：边带通信能力以允许IOA和主机设备之间的基本I / O和其他边带信号通信的方式并入到输入/输出适配器（IOA）和/或主机设备中，而不与标准IOA和/ 或I / O架构形式的因素。可以选择性地划分IOA的主连接器以允许边带信息通过主连接器进行通信，通常不会影响主连接器的主要通信功能。作为这种分隔连接器的替代或补充，可以将第二边带连接器并入到IOA和/或主机设备中。

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