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    • 3. 发明授权
    • Directional coupler integrated by CMOS process
    • CMOS工艺集成的定向耦合器
    • US09123982B2
    • 2015-09-01
    • US13641647
    • 2012-04-16
    • Le YeJiayi WangHuailin LiaoRu Huang
    • Le YeJiayi WangHuailin LiaoRu Huang
    • H01P5/18
    • H01P5/184H01P5/187
    • A directional coupler is disclosed integrated on a single chip and an integrated circuit based on a standard CMOS process and relates to a field of radio frequency communication. In exemplary implementations, by using a standard CMOS process technology, the directional coupler integrated by a CMOS process is formed by a coil wound by a upper layer of metal lines, a coil wound by a lower layer of metal lines, two tuning capacitor array, and a matching resistor. Two terminals of the coil are a direct terminal and an input terminal; two terminals of the coil are a coupled terminal and an isolation terminal; the terminals of the coils and are intersected at 90°; the coil is wound by an upper metal layer and the coil is wound by a lower metal layer. Further, the insertion loss is low and the isolation degree is large.
    • 公开了一种集成在单个芯片上的定向耦合器和基于标准CMOS工艺的集成电路,涉及射频通信领域。 在示例性实施方案中,通过使用标准CMOS工艺技术,通过CMOS工艺集成的定向耦合器由金属线上层缠绕的线圈,由金属线下层缠绕的线圈,两个调谐电容器阵列, 和匹配电阻。 线圈的两个端子是直接端子和输入端子; 线圈的两个端子是耦合端子和隔离端子; 线圈的端子和90°相交; 线圈由上金属层缠绕,线圈被下金属层缠绕。 此外,插入损耗低,隔离度大。
    • 4. 发明申请
    • DIRECTIONAL COUPLER INTEGRATED BY CMOS PROCESS
    • CMOS工艺集成的方向耦合器
    • US20130141183A1
    • 2013-06-06
    • US13641647
    • 2012-04-16
    • Le YeJiayi WangHuailin LiaoRu Huang
    • Le YeJiayi WangHuailin LiaoRu Huang
    • H01P5/16
    • H01P5/184H01P5/187
    • A directional coupler is disclosed integrated on a single chip and an integrated circuit based on a standard CMOS process and relates to a field of radio frequency communication. In exemplary implementations, by using a standard CMOS process technology, the directional coupler integrated by a CMOS process is formed by a coil winded by a upper layer of metal lines, a coil winded by a lower layer of metal lines, two tuning capacitor array, and a matching resistor. Two terminals of the coil are a direct terminal and an input terminal; two terminals of the coil are a coupled terminal and an isolation terminal; the terminals of the coils and are intersected at 90°; the coil is winded by an upper metal layer and the coil is winded by a lower metal layer. Further, the insertion loss is low and the isolation degree is large.
    • 公开了一种集成在单个芯片上的定向耦合器和基于标准CMOS工艺的集成电路,涉及射频通信领域。 在示例性实施方案中,通过使用标准CMOS工艺技术,由CMOS工艺集成的定向耦合器由金属线上层缠绕的线圈,由金属线下层缠绕的线圈,两个调谐电容器阵列, 和匹配电阻。 线圈的两个端子是直接端子和输入端子; 线圈的两个端子是耦合端子和隔离端子; 线圈的端子和90°相交; 线圈被上金属层缠绕,线圈被下金属层缠绕。 此外,插入损耗低,隔离度大。