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1. 发明授权

US06670646B2 Mask and method for patterning a semiconductor wafer 有权
公开(公告)号：US06670646B2
公开(公告)日：2003-12-30
申请号：US10074479
申请日：2002-02-11
申请人： Zhijian Lu , Shahid Butt , Alois Gutmann
发明人： Zhijian Lu , Shahid Butt , Alois Gutmann
IPC分类号： H01L3300
CPC分类号： G03F1/30 , G03F1/36 , G03F7/70441
摘要： A mask (118) and method for patterning a semiconductor wafer. The mask (118) includes apertures (122) and assist lines (124) disposed between apertures (122). The assist lines (124) reduce the diffraction effects of the lithographic process, resulting in improved depth of focus and resolution of patterns on a semiconductor wafer.

2. 发明授权

US06372408B1 Method of reducing post-development defects in and around openings formed in photoresist by use of multiple development/rinse cycles 有权
标题翻译：通过使用多个显影/冲洗循环来减少在光致抗蚀剂中形成的开口周围及其周围的显影后缺陷的方法
公开(公告)号：US06372408B1
公开(公告)日：2002-04-16
申请号：US09598374
申请日：2000-06-21
申请人： Zhijian Lu , Alan Thomas , Alois Gutmann , Kuang Jung Chen , Margaret C. Lawson
发明人： Zhijian Lu , Alan Thomas , Alois Gutmann , Kuang Jung Chen , Margaret C. Lawson
IPC分类号： G03F730
CPC分类号： G03F7/3021
摘要： In the exposure and development of available deep ultraviolet (DUV) sensitive photoresist it has been observed that following the standard prior art methods of exposure and development results in a high density of undesirable remnants (denoted as Blob Defects) of various components of photoresist material remaining on the semiconductor substrate (body). A method of exposing and developing the photoresist material which results in a reduced incidence of these Blob Defects consists of using a Puddle Development technique to develop the photoresist material, and subsequently exposing the semiconductor wafer to at least one Puddle Rinse cycle which uses water.
摘要翻译：在可用的深紫外（DUV）敏感光刻胶的曝光和显影中，已经观察到遵循现有技术的标准曝光和显影方法导致残留的光致抗蚀剂材料的各种组分的不希望的残留物（表示为Blob缺陷）的高密度在半导体基板（主体）上。曝光和显影光致抗蚀剂材料的方法导致这些Blob缺陷的发生率降低，包括使用水坑开发技术开发光致抗蚀剂材料，随后将半导体晶片暴露于使用水的至少一个水坑冲洗循环。

3. 发明授权

US06420101B1 Method of reducing post-development defects in and around openings formed in photoresist by use of non-patterned exposure 有权
标题翻译：通过使用非图案曝光来减少在光致抗蚀剂中形成的开口周围和周围的显影后缺陷的方法
公开(公告)号：US06420101B1
公开(公告)日：2002-07-16
申请号：US09598376
申请日：2000-06-21
申请人： Zhijian Lu , Alan Thomas , Alois Gutmann , Kuang Jung Chen , Margaret C. Lawson
发明人： Zhijian Lu , Alan Thomas , Alois Gutmann , Kuang Jung Chen , Margaret C. Lawson
IPC分类号： G03F720
CPC分类号： H01L21/0274 , G03F7/2022 , G03F7/2037 , G03F7/2039 , Y10S430/168
摘要： In the exposure and development of available deep ultraviolet (DUV) sensitive photoresist it has been observed that following the standard prior art methods of exposure and development results in a high density of undesirable pieces of components of the photoresist material, Blob Defects, remaining on the semiconductor substrate (body). A method of exposing and developing the photoresist material which results in a reduced incidence of these Blob Defects consists of introducing a low level uniform flood exposure of light in addition to the commonly used exposure to patterned light, followed by standard development. The flood exposure is in the range of 5 to 50% of the dose-to-clear for a non-patterned exposure.
摘要翻译：在可用的深紫外（DUV）敏感光刻胶的曝光和显影中，已经观察到遵循现有技术的标准曝光和显影方法导致光致抗蚀剂材料的不希望的部件的高密度，残留在半导体衬底（主体）。曝光和显影光致抗蚀剂材料的方法导致这些斑点缺陷的发生率降低，除了通常使用的图案光曝光之外，还引入低等级的均匀泛光曝光，随后进行标准开发。对于非图案化曝光，洪水暴露在5至50％的剂量清除范围内。

4. 发明授权

US08349528B2 Semiconductor devices and methods of manufacturing thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US08349528B2
公开(公告)日：2013-01-08
申请号：US13164139
申请日：2011-06-20
申请人： Matthias Lipinski , Alois Gutmann , Jingyu Lian , Chandrasekhar Sarma , Haoren Zhuang
发明人： Matthias Lipinski , Alois Gutmann , Jingyu Lian , Chandrasekhar Sarma , Haoren Zhuang
IPC分类号： G03F1/00
CPC分类号： H01L21/28123 , H01L21/32134 , H01L21/32137
摘要： Semiconductor devices and methods of manufacturing thereof are disclosed. A plurality of features is formed on a workpiece, the plurality of features being located in a first region and a second region of the workpiece. Features in the first region have a first lateral dimension, and features in the second region have a second lateral dimension, wherein the second lateral dimension is greater than the first lateral dimension. The first region is masked, and the second lateral dimension of features in the second region is reduced.
摘要翻译：公开了半导体器件及其制造方法。多个特征形成在工件上，多个特征位于工件的第一区域和第二区域中。第一区域中的特征具有第一横向尺寸，并且第二区域中的特征具有第二横向尺寸，其中第二横向尺寸大于第一横向尺寸。第一区域被掩蔽，并且第二区域中的特征的第二横向尺寸减小。

5. 发明申请

US20120208341A1 Alignment Marks for Polarized Light Lithography and Method for Use Thereof 有权
标题翻译：用于偏光光刻的对准标记及其使用方法
公开(公告)号：US20120208341A1
公开(公告)日：2012-08-16
申请号：US13453848
申请日：2012-04-23
申请人： Sajan Marokkey , Chandrasekhar Sarma , Alois Gutmann
发明人： Sajan Marokkey , Chandrasekhar Sarma , Alois Gutmann
IPC分类号： H01L21/77
CPC分类号： H01L23/544 , G03F7/70633 , G03F9/7076 , H01L2223/54453 , H01L2924/0002 , Y10S438/975 , H01L2924/00
摘要： Mark and method for integrated circuit fabrication with polarized light lithography. A preferred embodiment comprises a first plurality of elements comprised of a first component type, wherein the first component type has a first polarization, and a second plurality of elements comprised of a second component type, wherein the second component type has a second polarization, wherein the first polarization and the second polarization are orthogonal, wherein adjacent elements are of different component types. The alignment marks can be used in an intensity based or a diffraction based alignment process.
摘要翻译：用偏光光刻技术集成电路制造的标记和方法。优选实施例包括由第一部件类型构成的第一多个元件，其中第一元件类型具有第一偏振，第二元件类型具有第二元件类型，其中第二元件类型具有第二偏振，其中第一极化和第二极化是正交的，其中相邻元件是不同的组件类型。对准标记可以用于基于强度或基于衍射的对准过程。

6. 发明授权

US08236699B2 Contact patterning method with transition etch feedback 有权
标题翻译：具有过渡蚀刻反馈的接触图案化方法
公开(公告)号：US08236699B2
公开(公告)日：2012-08-07
申请号：US13021842
申请日：2011-02-07
申请人： Byung-Goo Jeon , Sung-Chul Park , Nikki Edleman , Alois Gutmann , Fang Chen
发明人： Byung-Goo Jeon , Sung-Chul Park , Nikki Edleman , Alois Gutmann , Fang Chen
IPC分类号： H01L21/311
CPC分类号： H01L21/76804 , H01L21/31116 , H01L22/26
摘要： A method for forming a contact hole in a semiconductor device and related computer-readable storage medium are provided, the method and program steps of the medium including measuring a percentage of oxygen in an etching chamber, and controlling the percentage of oxygen in the etching chamber to enlarge a temporary inner diameter near a top of the contact hole.
摘要翻译：提供了一种在半导体器件和相关的计算机可读存储介质中形成接触孔的方法，所述介质的方法和程序步骤包括测量蚀刻室中氧的百分比，并控制蚀刻室中的氧的百分比以扩大接触孔顶部附近的临时内径。

7. 发明授权

US08148235B2 Methods of manufacturing semiconductor devices 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08148235B2
公开(公告)日：2012-04-03
申请号：US12618567
申请日：2009-11-13
申请人： Markus Naujok , Hermann Wendt , Alois Gutmann , Muhammed Shafi Pallachalil
发明人： Markus Naujok , Hermann Wendt , Alois Gutmann , Muhammed Shafi Pallachalil
IPC分类号： H01L21/76
CPC分类号： H01L23/5222 , H01L21/7682 , H01L2924/0002 , H01L2924/00
摘要： Methods of forming air gaps between interconnects of integrated circuits and structures thereof are disclosed. A first insulating material is deposited over a workpiece, and a second insulating material having a sacrificial portion is deposited over the first insulating material. Conductive lines are formed in the first and second insulating layers. The second insulating material is treated to remove the sacrificial portion, and at least a portion of the first insulating material is removed, forming air gaps between the conductive lines. The second insulating material is impermeable as deposited and permeable after treating it to remove the sacrificial portion. A first region of the workpiece may be masked during the treatment, so that the second insulating material becomes permeable in a second region of the workpiece yet remains impermeable in the first region, thus allowing the formation of the air gaps in the second region, but not the first region.
摘要翻译：公开了在集成电路的互连和其结构之间形成气隙的方法。第一绝缘材料沉积在工件上，并且具有牺牲部分的第二绝缘材料沉积在第一绝缘材料上。导电线形成在第一和第二绝缘层中。处理第二绝缘材料以去除牺牲部分，并且去除第一绝缘材料的至少一部分，在导线之间形成气隙。第二绝缘材料在处理它以去除牺牲部分之后是不可渗透的并且是可渗透的。工件的第一区域可以在处理期间被掩蔽，使得第二绝缘材料在工件的第二区域变得可渗透，但在第一区域中仍然不可渗透，从而允许在第二区域中形成气隙，但是不是第一个地区。

8. 发明授权

US08007985B2 Semiconductor devices and methods of manufacturing thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US08007985B2
公开(公告)日：2011-08-30
申请号：US11343161
申请日：2006-01-30
申请人： Matthias Lipinski , Alois Gutmann , Jingyu Lian , Chandrasekhar Sarma , Haoren Zhuang
发明人： Matthias Lipinski , Alois Gutmann , Jingyu Lian , Chandrasekhar Sarma , Haoren Zhuang
IPC分类号： G03F7/20
CPC分类号： H01L21/28123 , H01L21/32134 , H01L21/32137
摘要： Semiconductor devices and methods of manufacturing thereof are disclosed. A plurality of features is formed on a workpiece, the plurality of features being located in a first region and a second region of the workpiece. Features in the first region have a first lateral dimension, and features in the second region have a second lateral dimension, wherein the second lateral dimension is greater than the first lateral dimension. The first region is masked, and the second lateral dimension of features in the second region is reduced.
摘要翻译：公开了半导体器件及其制造方法。多个特征形成在工件上，多个特征位于工件的第一区域和第二区域中。第一区域中的特征具有第一横向尺寸，并且第二区域中的特征具有第二横向尺寸，其中第二横向尺寸大于第一横向尺寸。第一区域被掩蔽，并且第二区域中的特征的第二横向尺寸减小。

9. 发明申请

US20110183266A1 Semiconductor Device Manufacturing Methods 有权
标题翻译：半导体器件制造方法
公开(公告)号：US20110183266A1
公开(公告)日：2011-07-28
申请号：US13081377
申请日：2011-04-06
申请人： Haoren Zhuang , Chong Kwang Chang , Alois Gutmann , Jingyu Lian , Matthias Lipinski , Len Yuan Tsou , Helen Wang
发明人： Haoren Zhuang , Chong Kwang Chang , Alois Gutmann , Jingyu Lian , Matthias Lipinski , Len Yuan Tsou , Helen Wang
IPC分类号： G03F7/20
CPC分类号： H01L21/32139 , H01L21/0337 , H01L21/0338 , H01L21/84
摘要： Methods for manufacturing semiconductor devices are disclosed. One preferred embodiment is a method of processing a semiconductor device. The method includes providing a workpiece having a material layer to be patterned disposed thereon. A masking material is formed over the material layer of the workpiece. The masking material includes a lower portion and an upper portion disposed over the lower portion. The upper portion of the masking material is patterned with a first pattern. A polymer material is disposed over the masking material. The masking material and the polymer layer are used to pattern the material layer of the workpiece.
摘要翻译：公开了制造半导体器件的方法。一个优选实施例是一种处理半导体器件的方法。该方法包括提供具有设置在其上的待图案化材料层的工件。在工件的材料层上形成掩模材料。掩模材料包括下部和设置在下部上的上部。用第一图案对掩模材料的上部进行图案化。聚合物材料设置在掩蔽材料上方。掩模材料和聚合物层用于对工件的材料层进行图案化。

10. 发明申请

US20100297398A1 Lithography Masks and Methods of Manufacture Thereof 有权
标题翻译：光刻面具及其制造方法
公开(公告)号：US20100297398A1
公开(公告)日：2010-11-25
申请号：US12847641
申请日：2010-07-30
申请人： Chandrasekhar Sarma , Alois Gutmann , Henning Haffner , Sajan Marokkey , Josef Maynollo
发明人： Chandrasekhar Sarma , Alois Gutmann , Henning Haffner , Sajan Marokkey , Josef Maynollo
IPC分类号： B32B3/00 , G03F7/20 , G03B27/54 , G03B27/72
CPC分类号： G03F1/50 , G02B5/3083 , Y10T428/24479
摘要： Lithography masks and methods of manufacture thereof are disclosed. A preferred embodiment comprises a method of manufacturing a lithography mask. The method includes providing a substrate, forming a first pattern in a first region of the substrate, and forming a second pattern in a second region of the substrate, the second pattern comprising patterns for features oriented differently than patterns for features of the first pattern. The method includes affecting a polarization rotation of light differently in the first region than in the second region of the substrate.
摘要翻译：公开了平版印刷掩模及其制造方法。优选实施例包括制造光刻掩模的方法。所述方法包括提供衬底，在所述衬底的第一区域中形成第一图案，以及在所述衬底的第二区域中形成第二图案，所述第二图案包括不同于第一图案特征的图案的图案。该方法包括在第一区域中比在衬底的第二区域中影响光的偏振旋转。

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