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1. 发明申请

US20090248650A1 STORAGE AND RETRIEVAL OF CONCURRENT QUERY LANGUAGE EXECUTION RESULTS 有权
标题翻译：相关查询语言执行结果的存储和检索
公开(公告)号：US20090248650A1
公开(公告)日：2009-10-01
申请号：US12059823
申请日：2008-03-31
申请人： Yuqiang Xian , Qian Qian , Jianhui Li
发明人： Yuqiang Xian , Qian Qian , Jianhui Li
IPC分类号： G06F17/30
CPC分类号： G06F17/30445
摘要： Methods, systems, and articles for receiving, by a computing device, execution results of a plurality of query language expressions are described herein. In various embodiments, the plurality of query language expressions may be concurrently executed, and the receiving may be contemporaneous with production of the execution results. Also, in various embodiments, the computing device may store a result item of the execution results for at least a first of the query language expressions in a memory block allocated exclusively for the first of the query language expressions while the first of the query language expressions is being executed, or in a result handle associated with the first of the query language expressions.
摘要翻译：本文描述了由计算设备接收多个查询语言表达式的执行结果的方法，系统和文章。在各种实施例中，可以同时执行多个查询语言表达，并且接收可以同时生成执行结果。此外，在各种实施例中，计算设备可以将至少第一查询语言表达式的执行结果的结果项存储在专门针对第一查询语言表达式分配的存储器块中，而第一查询语言表达式正在执行，或在与第一个查询语言表达式相关联的结果句柄中。

2. 发明授权

US08606757B2 Storage and retrieval of concurrent query language execution results 有权
标题翻译：并发查询语言执行结果的存储和检索
公开(公告)号：US08606757B2
公开(公告)日：2013-12-10
申请号：US12059823
申请日：2008-03-31
申请人： Yuqiang Xian , Qian Qian , Jianhui Li
发明人： Yuqiang Xian , Qian Qian , Jianhui Li
IPC分类号： G06F7/00 , G06F17/00 , G06F17/30
CPC分类号： G06F17/30445
摘要： Methods, systems, and articles for receiving, by a computing device, execution results of a plurality of query language expressions are described herein. In various embodiments, the plurality of query language expressions may be concurrently executed, and the receiving may be contemporaneous with production of the execution results. Also, in various embodiments, the computing device may store a result item of the execution results for at least a first of the query language expressions in a memory block allocated exclusively for the first of the query language expressions while the first of the query language expressions is being executed, or in a result handle associated with the first of the query language expressions.
摘要翻译：本文描述了由计算设备接收多个查询语言表达式的执行结果的方法，系统和文章。在各种实施例中，可以同时执行多个查询语言表达，并且接收可以同时生成执行结果。此外，在各种实施例中，计算设备可以将至少第一查询语言表达式的执行结果的结果项存储在专门针对第一查询语言表达式分配的存储器块中，而第一查询语言表达式正在执行，或在与第一个查询语言表达式相关联的结果句柄中。

3. 外观设计

USD1010659S1 Protective cover for tablet 有权
公开(公告)号：USD1010659S1
公开(公告)日：2024-01-09
申请号：US29839700
申请日：2022-05-24
申请人： Jianhui Li
设计人： Jianhui Li
摘要： FIG. 1 is a perspective view of a protective cover for tablet showing my new design;
FIG. 2 is another perspective view thereof;
FIG. 3 is a front elevational view thereof;
FIG. 4 is a rear elevational view thereof;
FIG. 5 is a left side elevational view thereof;
FIG. 6 is a right side elevational view thereof;
FIG. 7 is a top plan view thereof;
FIG. 8 is a bottom plan view thereof;
FIG. 9 is a perspective view of the protective cover for tablet shown in a configuration of use;
FIG. 10 is another perspective view of the protective cover for tablet shown in the configuration of use;
FIG. 11 is another perspective view of the protective cover for tablet shown in the configuration of use;
FIG. 12 is another perspective view of the protective cover for tablet of FIG. 1, shown in the configuration of use with an environmental tablet; and,
FIG. 13 is another perspective view of the protective cover for tablet of FIG. 1, shown in the configuration of use with additional environmental trinkets.
The broken lines in FIGS. 12 and 13 showing the tablet and the trinkets depict environment and form no part of the claimed design. The other broken lines in the drawings depict portions of the protective cover for tablet that form no part of the claimed design.

4. 外观设计

USD883988S1 Tablet case 有权
公开(公告)号：USD883988S1
公开(公告)日：2020-05-12
申请号：US29680630
申请日：2019-02-19
申请人： Jianhui Li
设计人： Jianhui Li
摘要： FIG. 1 is a perspective view of a tablet case showing my new design;
FIG. 2 is another perspective view thereof;
FIG. 3 is a front elevational view thereof;
FIG. 4 is a rear elevational view thereof;
FIG. 5 is a left side elevational view thereof;
FIG. 6 is a right side elevational view thereof;
FIG. 7 is a top plan view thereof;
FIG. 8 is a bottom plan view thereof;
FIG. 9 is a a perspective view of the tablet case where kickstands are in an open state; and,
FIG. 10 is an enlarged view of portion 10 shown in FIG. 2.
The broken lines in the drawings depict portions of the tablet case that form no part of the claimed design.

5. 外观设计

USD869159S1 Laptop bag 有权
公开(公告)号：USD869159S1
公开(公告)日：2019-12-10
申请号：US29660827
申请日：2018-08-22
申请人： Jianhui Li
设计人： Jianhui Li
摘要： 1 FIG. 1 is a perspective view of a laptop bag showing my new design;
FIG. 2 is another perspective view thereof;
FIG. 3 is a front view thereof;
FIG. 4 is a rear view thereof;
FIG. 5 is a left side view thereof;
FIG. 6 is a right side view thereof;
FIG. 7 is a top plan view thereof; and,
FIG. 8 is a bottom plan view thereof.

6. 发明申请

US20140282437A1 METHOD AND APPARATUS TO SCHEDULE STORE INSTRUCTIONS ACROSS ATOMIC REGIONS IN BINARY TRANSLATION 有权
标题翻译：方法和装置在二进制翻译中按照原子地区安排存储指令
公开(公告)号：US20140282437A1
公开(公告)日：2014-09-18
申请号：US13976929
申请日：2012-09-27
申请人： Guokai Ma , Yihua Jin , Daniel M. Lavery , Jianhui Li
发明人： Guokai Ma , Yihua Jin , Daniel M. Lavery , Jianhui Li
IPC分类号： G06F9/45
CPC分类号： G06F8/52 , G06F9/30 , G06F9/30065 , G06F9/3834 , G06F9/3857
摘要： A method and system to support scheduling of memory store instructions across atomic regions in binary translation in a processing unit or processor. In one embodiment of the invention, the processing unit has a store buffer that allows store instructions to be issued in different order than the source binary program order but still retire in source binary program order. This facilitates a small atomic region that maps to each iteration of a source binary code and these atomic regions are joined together into a pipelined region. In one embodiment of the invention, the processing unit executes commit instruction(s) once every loop iteration instead of executing the commit instruction(s) once after the loop exit.
摘要翻译：一种支持在处理单元或处理器中的二进制转换中跨原子区域的存储器存储指令调度的方法和系统。在本发明的一个实施例中，处理单元具有存储缓冲器，其允许以与源二进制程序顺序不同的顺序发布存储指令，但仍然以源二进制程序顺序退出。这有助于映射到源二进制代码的每个迭代的小原子区域，并且这些原子区域被连接在一起成流水线区域。在本发明的一个实施例中，处理单元每循环迭代执行一次提交指令，而不是在循环退出之后执行一次提交指令。

7. 发明申请

US20140040921A1 ISA BRIDGING WITH CALLBACK 有权
标题翻译： ISA电话与电话
公开(公告)号：US20140040921A1
公开(公告)日：2014-02-06
申请号：US13995935
申请日：2012-01-10
申请人： Jianhui Li , Ling Lin , Yong Wu , Xiaodong Lin , Wen Tan , Honesty Cheng Young , Yihua Jin
发明人： Jianhui Li , Ling Lin , Yong Wu , Xiaodong Lin , Wen Tan , Honesty Cheng Young , Yihua Jin
IPC分类号： G06F9/54
CPC分类号： G06F9/54 , G06F9/45504 , G06F9/541
摘要： Methods, apparatuses and storage medium associated with ISA bridging with callback, are disclosed. In various embodiments, at least one computer-readable storage medium may include instructions configured to enable a target device with a target ISA, in response to execution of the instructions, to provide an ISA bridging layer to the target device to facilitate a library service to callback a callback function of an application. The library service may be implemented for the target ISA, and the application may be implemented at least partially for a source ISA that may be different from the target ISA. The ISA bridging layer may include a source ISA emulator and a library emulator configured to cooperate to enable the application to call the library service, and the library service to callback the callback function, across the two instruction set architectures. Other embodiments may be disclosed or claimed.
摘要翻译：公开了与与回调桥接的ISA相关联的方法，装置和存储介质。在各种实施例中，至少一个计算机可读存储介质可以包括被配置为使得具有目标ISA的目标设备响应于指令的执行而向目标设备提供ISA桥接层以促进图书馆服务回调一个应用程序的回调函数。可以为目标ISA实现库服务，并且应用可以至少部分地针对可能与目标ISA不同的源ISA来实现。 ISA桥接层可以包括源ISA仿真器和库仿真器，其被配置为协作以使应用能够调用库服务，并且库服务在两个指令集体系结构之间回调回调函数。可以公开或要求保护其他实施例。

8. 发明授权

US08015557B2 Methods and apparatus to support mixed-mode execution within a single instruction set architecture process of a virtual machine 有权
标题翻译：在虚拟机的单个指令集架构进程中支持混合模式执行的方法和装置
公开(公告)号：US08015557B2
公开(公告)日：2011-09-06
申请号：US12613295
申请日：2009-11-05
申请人： Miaobo Chen , Qi Zhang , Eric Lin , Jianhui Li , Yun Wang
发明人： Miaobo Chen , Qi Zhang , Eric Lin , Jianhui Li , Yun Wang
IPC分类号： G06F9/44
CPC分类号： G06F9/45516
摘要： Methods and apparatus to support the execution of a managed application that is linked to a native library or application are disclosed. The disclosed methods and apparatus support a virtual machine that is associated with the same ISA as the executing platform, while the ISA of the native library or application is of a different ISA. The disclosed methods and apparatus also support the execution of a managed application that is linked with several native libraries or applications that are associated with several different ISAs respectively.
摘要翻译：公开了支持与本地库或应用相关联的被管理应用的执行的方法和装置。所公开的方法和装置支持与执行平台相同的ISA相关联的虚拟机，而本地库或应用的ISA是不同的ISA。所公开的方法和装置还支持与分别与若干不同的ISA相关联的几个本地库或应用链接的被管理应用的执行。

9. 发明申请

US20100083216A1 Dynamic Specialization of XML Parsing 有权
标题翻译： XML解析的动态专业化
公开(公告)号：US20100083216A1
公开(公告)日：2010-04-01
申请号：US12242473
申请日：2008-09-30
申请人： Jianhui Li , Hui Chen , Tianyou Li , Tao Xie , Kevin Jones
发明人： Jianhui Li , Hui Chen , Tianyou Li , Tao Xie , Kevin Jones
IPC分类号： G06F9/44 , G06F17/30 , G06F7/06 , G06F9/455
CPC分类号： G06F17/2247 , G06F17/272
摘要： Methods and apparatuses for creating a dynamic profile for a plurality of structurally similar extensible markup language (XML) documents based at least in part on a document structure or data pattern of the XML documents. A specialized XML parser is generated based at least in part on the dynamic profile and then is specialized in parsing XML documents that substantially match the dynamic profile.
摘要翻译：至少部分地基于XML文档的文档结构或数据模式，为多个结构上类似的可扩展标记语言（XML）文档创建动态简档的方法和装置。至少部分基于动态配置文件生成专门的XML解析器，然后专门解析基本匹配动态配置文件的XML文档。

10. 发明授权

US07380240B2 Apparatus and methods to avoid floating point control instructions in floating point to integer conversion 失效
标题翻译：避免浮点控制指令在浮点整数转换中的装置和方法
公开(公告)号：US07380240B2
公开(公告)日：2008-05-27
申请号：US10743307
申请日：2003-12-23
申请人： Qi Zhang , Jianhui Li , Orna Etzion
发明人： Qi Zhang , Jianhui Li , Orna Etzion
IPC分类号： G06F9/45
CPC分类号： H03M7/24 , G06F8/52
摘要： A binary translation module is to translate a first sequence of instructions associated with a source architecture into a second sequence of instructions associated with a target architecture. The first sequence includes one or more floating point control instructions and the second sequence does not include a floating point control instruction. Results produced by executing the second sequence on a processor that complies with the target architecture are substantially the same as results produced by executing the first sequence on a processor that complies with the source architecture.
摘要翻译：二进制翻译模块是将与源架构相关联的第一指令序列转换为与目标架构相关联的第二指令序列。第一序列包括一个或多个浮点控制指令，第二序列不包括浮点控制指令。通过在符合目标架构的处理器上执行第二个序列产生的结果与通过在符合源架构的处理器上执行第一个序列产生的结果基本相同。

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