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1. 发明授权

US07808326B2 PLL circuit 有权
标题翻译： PLL电路
公开(公告)号：US07808326B2
公开(公告)日：2010-10-05
申请号：US11993108
申请日：2007-03-29
申请人： Kazuaki Sogawa , Masayoshi Kinoshita , Yuji Yamada , Junji Nakatsuka
发明人： Kazuaki Sogawa , Masayoshi Kinoshita , Yuji Yamada , Junji Nakatsuka
IPC分类号： H03L7/00
CPC分类号： H03L7/099 , H03L7/0896 , H03L7/18 , H03L2207/06
摘要： In a PLL circuit, a voltage controlled oscillator 4 has two voltage-current conversion circuits 40 and 41 and a selection circuit 42 for selecting an output of either one of the voltage-current conversion circuits 40 and 41. The output of the voltage-current conversion circuit selected by the selection circuit 42 is inputted to a current controlled oscillator 45. The one voltage-current conversion circuit 41 has an input thereof connected to an output of a loop filter 3, while the other voltage-current conversion circuit 40 has an input thereof connected to an input terminal 8 for evaluating the oscillation characteristics of the voltage controlled oscillator 4. As a result, time-varying fluctuations in the voltage of the loop filter resulting from a structure in which the input terminal for evaluating the oscillation characteristics of the voltage controlled oscillator is connected to the loop filter via a switch and time-varying fluctuations in the output frequency of the PLL circuit are effectively suppressed.
摘要翻译：在PLL电路中，压控振荡器4具有两个电压 - 电流转换电路40和41以及用于选择电压 - 电流转换电路40和41中的任一个的输出的选择电路42.电压 - 电流由选择电路42选择的转换电路被输入到电流控制振荡器45.一个电压 - 电流转换电路41的输入连接到环路滤波器3的输出，而另一个电压 - 电流转换电路40具有其输入连接到用于评估压控振荡器4的振荡特性的输入端子8.结果是，由用于评估振荡特性的输入端子的结构导致的环路滤波器的电压的时变波动压控振荡器经由开关连接到环路滤波器，并且PLL电路的输出频率随时间变化被有效地抑制。

2. 发明申请

US20100244878A1 PLL BURN-IN CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT 审中-公开
标题翻译： PLL烧录电路和半导体集成电路
公开(公告)号：US20100244878A1
公开(公告)日：2010-09-30
申请号：US12521192
申请日：2007-12-20
申请人： Yuji Yamada , Masayoshi Kinoshita , Kazuaki Sogawa , Junji Nakatsuka
发明人： Yuji Yamada , Masayoshi Kinoshita , Kazuaki Sogawa , Junji Nakatsuka
IPC分类号： G01R31/02
CPC分类号： H03L7/099 , H03L7/0995
摘要： In a PLL which does not include a loop filter, an additional circuit for subjecting a voltage-controlled oscillator to a burn-in test with an appropriate oscillation frequency is realized by a less circuit configuration.A gate terminal of a diode-connected transistor (13) which has the same polarity as a voltage-to-current conversion transistor (11) in a voltage-controlled oscillator (10) is connected to a gate terminal of the transistor (11) through a switch (12a), and a current supply (14) is connected to a drain terminal of the transistor (13). By appropriately controlling the current value supplied from the current supply (14) and the size ratio between the transistor (11) and the transistor (13), a current required for performing a burn-in test can be supplied to a ring oscillator in the voltage-controlled oscillator (10).
摘要翻译：在不包括环路滤波器的PLL中，通过较少的电路配置来实现用于使压控振荡器经受适当振荡频率的老化测试的附加电路。与压控振荡器（10）中的电压 - 电流转换晶体管（11）具有相同极性的二极管连接的晶体管（13）的栅极端子连接到晶体管（11）的栅极端子，通过开关（12a），并且电流源（14）连接到晶体管（13）的漏极端子。通过适当地控制从电流源（14）提供的电流值和晶体管（11）和晶体管（13）之间的尺寸比，可以将执行老化测试所需的电流提供给环形振荡器压控振荡器（10）。

3. 发明申请

US20090295489A1 PLL CIRCUIT 有权
标题翻译： PLL电路
公开(公告)号：US20090295489A1
公开(公告)日：2009-12-03
申请号：US11993108
申请日：2007-03-29
申请人： Kazuaki Sogawa , Masayoshi Kinoshita , Yuji Yamada , Junji Nakatsuka
发明人： Kazuaki Sogawa , Masayoshi Kinoshita , Yuji Yamada , Junji Nakatsuka
IPC分类号： H03L7/099
CPC分类号： H03L7/099 , H03L7/0896 , H03L7/18 , H03L2207/06
摘要： In a PLL circuit, a voltage controlled oscillator 4 has two voltage-current conversion circuits 40 and 41 and a selection circuit 42 for selecting an output of either one of the voltage-current conversion circuits 40 and 41. The output of the voltage-current conversion circuit selected by the selection circuit 42 is inputted to a current controlled oscillator 45. The one voltage-current conversion circuit 41 has an input thereof connected to an output of a loop filter 3, while the other voltage-current conversion circuit 40 has an input thereof connected to an input terminal 8 for evaluating the oscillation characteristics of the voltage controlled oscillator 4. As a result, time-varying fluctuations in the voltage of the loop filter resulting from a structure in which the input terminal for evaluating the oscillation characteristics of the voltage controlled oscillator is connected to the loop filter via a switch and time-varying fluctuations in the output frequency of the PLL circuit are effectively suppressed.
摘要翻译：在PLL电路中，压控振荡器4具有两个电压 - 电流转换电路40和41以及用于选择电压 - 电流转换电路40和41中的任一个的输出的选择电路42.电压 - 电流由选择电路42选择的转换电路被输入到电流控制振荡器45.一个电压 - 电流转换电路41的输入连接到环路滤波器3的输出，而另一个电压 - 电流转换电路40具有其输入连接到用于评估压控振荡器4的振荡特性的输入端子8.结果是，由用于评估振荡特性的输入端子的结构导致的环路滤波器的电压的时变波动压控振荡器经由开关连接到环路滤波器，并且PLL电路的输出频率随时间变化被有效地抑制。

4. 发明申请

US20100226411A1 LOW-NOISE AMPLIFIER AND RADIO COMMUNICATION SYSTEM 审中-公开
标题翻译：低噪声放大器和无线电通信系统
公开(公告)号：US20100226411A1
公开(公告)日：2010-09-09
申请号：US12159572
申请日：2007-04-18
申请人： Manabu Watanabe , Hiroshi Kimura , Junji Nakatsuka
发明人： Manabu Watanabe , Hiroshi Kimura , Junji Nakatsuka
IPC分类号： H04L27/00 , H03F3/16
CPC分类号： H03F1/025
摘要： Power consumption of an amplification circuit (11) for amplifying an inputted signal is switchable. A control circuit (12) switches the power consumption of the amplification circuit (11) such that data blank periods include an interval during which the power consumption of the amplification circuit (11) is smaller than during data periods.
摘要翻译：用于放大输入信号的放大电路（11）的功耗可切换。控制电路（12）切换放大电路（11）的功耗，使得数据空白期间包括放大电路（11）的功耗小于数据周期期间的间隔。

5. 发明申请

US20100140087A1 BIOSENSOR, BIOSENSOR CHIP AND BIOSENSOR DEVICE 有权
标题翻译：生物传感器，生物传感器芯片和生物传感器设备
公开(公告)号：US20100140087A1
公开(公告)日：2010-06-10
申请号：US12618084
申请日：2009-11-13
申请人： Hiroya Ueno , Junji Nakatsuka
发明人： Hiroya Ueno , Junji Nakatsuka
IPC分类号： G01N27/327
CPC分类号： G01N27/3271 , C12Q1/001 , G01N27/30 , G01N27/307 , G01N27/327 , G01N27/3272 , G01N27/3273 , G01N27/416 , G01R19/0092
摘要： A biosensor includes a working electrode 101, a counter electrode 102 opposing the working electrode 101, a working electrode terminal 103 and a working electrode reference terminal 10 connected to the working electrode 101 by wires, and a counter electrode terminal 104 connected to the counter electrode 102 by a wire. By employing a structure with at least three electrodes, it is possible to assay a target substance without being influenced by the line resistance on the working electrode side.
摘要翻译：生物传感器包括工作电极101，与工作电极101相对的对置电极102，通过电线连接到工作电极101的工作电极端子103和工作电极参考端子10以及与对置电极连接的对电极端子104 102用电线。通过采用具有至少三个电极的结构，可以在不受工作电极侧的线电阻的影响的情况下测定目标物质。

6. 发明申请

US20090284315A1 OPERATIONAL AMPLIFIER 有权
标题翻译：操作放大器
公开(公告)号：US20090284315A1
公开(公告)日：2009-11-19
申请号：US12296367
申请日：2007-05-21
申请人： Satoshi Kobayashi , Junji Nakatsuka
发明人： Satoshi Kobayashi , Junji Nakatsuka
IPC分类号： H03F3/45 , H03F1/34
CPC分类号： H03F1/08 , H03F1/34 , H03F3/45192 , H03F3/45475 , H03F3/45632 , H03F2203/45248 , H03F2203/45431 , H03F2203/45466 , H03F2203/45482 , H03F2203/45522 , H03F2203/45524 , H03F2203/45526 , H03F2203/45544 , H03F2203/45631 , H03F2203/45692
摘要： An operational amplifier includes, between an input and an output of an operational amplifier (an operational amplification stage) 10, a feedback capacitor 34 connected in negative feedback, a phase control circuit 100 having a resistor element (a resistor unit) 30 connected in series to the feedback capacitor 34. Load capacitors (load units) 32 are connected on the output side of the operational amplifier 10 and driven by an output signal from the operational amplifier 10. In a case that the capacitance values of the load capacitor 32 and 33 are increased and the phase margin of the operational amplifier becomes excessive in comparison with the optimum value, a resistance value RO of the resistor element 30 is increased to control the phase margin of the operational amplifier so as to fall within the optimum range, and thus accelerated settling properties are realized. This invention thus provides a phase control circuit applicable even to a single-stage operational amplifier, and by enhancing the properties of the operational amplifier itself and enabling the phase margin to be controlled, realizes accelerated settling properties even in a case that a transient response is deteriorated.
摘要翻译：运算放大器包括在运算放大器（运算放大级）10的输入和输出端之间，负反馈端连接的反馈电容器34，具有串联连接的电阻元件（电阻单元）30的相位控制电路100 负载电容器（负载单元）32连接在运算放大器10的输出侧并由运算放大器10的输出信号驱动。在负载电容器32和33的电容值的情况下并且运算放大器的相位裕度与最佳值相比变得过大，电阻元件30的电阻值RO增加，以控制运算放大器的相位裕度落在最佳范围内，因此实现了加速沉降特性。因此，本发明提供了一种甚至可应用于单级运算放大器的相位控制电路，并且通过增强运算放大器本身的性质并使得能够控制相位裕度，即使在瞬态响应为恶化

7. 发明申请

US20120228160A1 BIOSENSOR, BIOSENSOR CHIP AND BIOSENSOR DEVICE 有权
标题翻译：生物传感器，生物传感器芯片和生物传感器设备
公开(公告)号：US20120228160A1
公开(公告)日：2012-09-13
申请号：US13481381
申请日：2012-05-25
申请人： Hiroya UENO , Junji Nakatsuka
发明人： Hiroya UENO , Junji Nakatsuka
IPC分类号： G01N33/50
CPC分类号： G01N27/3271 , C12Q1/001 , G01N27/30 , G01N27/307 , G01N27/327 , G01N27/3272 , G01N27/3273 , G01N27/416 , G01R19/0092
摘要： A biosensor includes a working electrode 101, a counter electrode 102 opposing the working electrode 101, a working electrode terminal 103 and a working electrode reference terminal 10 connected to the working electrode 101 by wires, and a counter electrode terminal 104 connected to the counter electrode 102 by a wire. By employing a structure with at least three electrodes, it is possible to assay a target substance without being influenced by the line resistance on the working electrode side.
摘要翻译：生物传感器包括工作电极101，与工作电极101相对的对置电极102，通过电线连接到工作电极101的工作电极端子103和工作电极参考端子10以及与对置电极连接的对电极端子104 102用电线。通过采用具有至少三个电极的结构，可以在不受工作电极侧的线电阻的影响的情况下测定目标物质。

8. 发明授权

US08035424B2 AC-coupled interface circuit 有权
标题翻译：交流耦合接口电路
公开(公告)号：US08035424B2
公开(公告)日：2011-10-11
申请号：US12526227
申请日：2007-07-23
申请人： Yoshihide Komatsu , Tsuyoshi Ebuchi , Satoshi Hori , Takashi Hirata , Junji Nakatsuka
发明人： Yoshihide Komatsu , Tsuyoshi Ebuchi , Satoshi Hori , Takashi Hirata , Junji Nakatsuka
IPC分类号： H03B1/00
CPC分类号： H04L25/0266 , H04L25/0272
摘要： An AC-coupled interface circuit on a semiconductor integrated circuit apparatus performing a bidirectional data transfer via a differential transmission line includes a differential driver, a differential receiver and a potential setting section. The differential driver includes a pair of output terminals connected to a pair of signal lines. The differential receiver includes a pair of input terminals connected to the pair of signal lines. In a data transmission operation, the differential driver converts transmit data to a differential signal to output the differential signal. In a data reception operation, the differential receiver receives a differential signal transferred to the pair of signal lines and converts the differential signal to receive data. The potential setting section sets a potential of the pair of signal lines to a predetermined stable potential before the differential signal is transferred to the pair of signal lines.
摘要翻译：通过差分传输线执行双向数据传输的半导体集成电路装置上的AC耦合接口电路包括差分驱动器，差分接收器和电位设定部分。差分驱动器包括连接到一对信号线的一对输出端子。差分接收器包括连接到该对信号线的一对输入端子。在数据传输操作中，差分驱动器将发送数据转换为差分信号以输出差分信号。在数据接收操作中，差分接收器接收传送到该对信号线的差分信号，并将差分信号转换为接收数据。电位设定部分将差分信号传送到一对信号线之前，将该对信号线的电位设定为预定的稳定电位。

9. 发明授权

US07852158B2 Operational amplifier 有权
标题翻译：运算放大器
公开(公告)号：US07852158B2
公开(公告)日：2010-12-14
申请号：US12296367
申请日：2007-05-21
申请人： Satoshi Kobayashi , Junji Nakatsuka
发明人： Satoshi Kobayashi , Junji Nakatsuka
IPC分类号： H03F3/45
CPC分类号： H03F1/08 , H03F1/34 , H03F3/45192 , H03F3/45475 , H03F3/45632 , H03F2203/45248 , H03F2203/45431 , H03F2203/45466 , H03F2203/45482 , H03F2203/45522 , H03F2203/45524 , H03F2203/45526 , H03F2203/45544 , H03F2203/45631 , H03F2203/45692
摘要： An operational amplifier includes, between an input and an output of an operational amplifier (an operational amplification stage) 10, a feedback capacitor 34 connected in negative feedback, a phase control circuit 100 having a resistor element (a resistor unit) 30 connected in series to the feedback capacitor 34. Load capacitors (load units) 32 are connected on the output side of the operational amplifier 10 and driven by an output signal from the operational amplifier 10. In a case that the capacitance values of the load capacitor 32 and 33 are increased and the phase margin of the operational amplifier becomes excessive in comparison with the optimum value, a resistance value RO of the resistor element 30 is increased to control the phase margin of the operational amplifier so as to fall within the optimum range, and thus accelerated settling properties are realized. This invention thus provides a phase control circuit applicable even to a single-stage operational amplifier, and by enhancing the properties of the operational amplifier itself and enabling the phase margin to be controlled, realizes accelerated settling properties even in a case that a transient response is deteriorated.
摘要翻译：运算放大器包括在运算放大器（运算放大级）10的输入和输出端之间，负反馈端连接的反馈电容器34，具有串联连接的电阻元件（电阻单元）30的相位控制电路100 负载电容器（负载单元）32连接在运算放大器10的输出侧并由运算放大器10的输出信号驱动。在负载电容器32和33的电容值的情况下并且运算放大器的相位裕度与最佳值相比变得过大，电阻元件30的电阻值RO增加，以控制运算放大器的相位裕度落在最佳范围内，因此实现了加速沉降特性。因此，本发明提供了一种甚至可应用于单级运算放大器的相位控制电路，并且通过增强运算放大器本身的性质并使得能够控制相位裕度，即使在瞬态响应为恶化

10. 发明授权

US06400644B1 Semiconductor control unit 失效
标题翻译：半导体控制单元
公开(公告)号：US06400644B1
公开(公告)日：2002-06-04
申请号：US09616945
申请日：2000-07-14
申请人： Hiroya Ueno , Junji Nakatsuka
发明人： Hiroya Ueno , Junji Nakatsuka
IPC分类号： G11C800
CPC分类号： G11C27/024
摘要： A control unit includes sample-and-hold circuits, their associated switching circuits and a switch controller. Each of the sample-and-hold circuits includes a switch. The switch controller sequentially outputs switch control signals one after another to the sample-and-hold circuits. For example, at a point in time data has been sampled and held in a first one of the sample-and-hold circuits, a first one of the switching circuits outputs a CLOSED signal to a second one of the switching circuits via a signal line. The second switching circuit does not output the switch control signal, received from the switch controller, to a second one of the sample-and-hold circuits until the second switching circuit receives the CLOSED signal from the first switching circuit. Accordingly, while one of the sample-and-hold circuits is sampling and holding the data, none of the other sample-and-hold circuits is allowed to open its switch. As a result, each sample-and-hold circuit can sample and hold the data accurately without being affected by the switching noise caused by the switching of any other sample-and-hold circuit.
摘要翻译：控制单元包括取样和保持电路，它们相关的开关电路和开关控制器。每个采样和保持电路都包括开关。开关控制器依次将开关控制信号依次输出到采样保持电路。例如，在时间点数据被采样并保持在采样和保持电路中的第一个中，开关电路中的第一个经由信号线将一个CLOSED信号输出到第二个开关电路。第二开关电路不将从开关控制器接收的开关控制信号输出到采样保持电路中的第二开关控制信号，直到第二开关电路从第一开关电路接收到闭合信号。因此，当采样保持电路中的一个采样并保持数据时，不允许其他采样保持电路打开其开关。因此，每个采样和保持电路可以准确地采样和保持数据，而不会受到任何其他采样保持电路的切换引起的开关噪声的影响。

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