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    • 3. 发明授权
    • Method and apparatus for tracking uncertain signals
    • 用于跟踪不确定信号的方法和装置
    • US08490037B2
    • 2013-07-16
    • US13280853
    • 2011-10-25
    • Liang ChenYufei LiYong Feng PanJian Yang
    • Liang ChenYufei LiYong Feng PanJian Yang
    • G06F17/50
    • G06F17/5027G06F17/5022G06F17/5081
    • A method and an apparatus for tracking uncertain signals in the simulation of chip design are provided. The method comprises: generating a directed graph which contains sequential logic devices and IO devices from the netlist of chip design, wherein the directed graph illustrates the signal association among the sequential logic devices and IO devices; obtaining the signals related with the sequential logic devices and IO devices from the simulation results, wherein the signals contain a plurality of uncertain signals; and back tracing at least a part of the plurality of uncertain signals along the directed graph to determine the device which firstly generates an uncertain signal. The corresponding apparatus is also provided. With the above method and apparatus, uncertain signals can be traced and their source can be determined, which improves the debugging efficiency.
    • 提供了一种在芯片设计仿真中跟踪不确定信号的方法和装置。 该方法包括:从芯片设计的网表生成包含顺序逻辑器件和IO器件的有向图,其中有向图示出了顺序逻辑器件和IO器件之间的信号关联; 从仿真结果获得与顺序逻辑器件和IO器件相关的信号,其中信号包含多个不确定信号; 并且沿着有向图向后跟踪多个不确定信号的至少一部分,以确定首先产生不确定信号的装置。 还提供了相应的装置。 利用上述方法和装置,可以追踪不确定的信号并确定其来源,从而提高调试效率。
    • 4. 发明授权
    • Content addressable memory and method of searching data thereof
    • 内容可寻址存储器及其数据搜索方法
    • US08914574B2
    • 2014-12-16
    • US13372869
    • 2012-02-14
    • Yong Feng PanYufei LiBo FanLiang Chen
    • Yong Feng PanYufei LiBo FanLiang Chen
    • G06F12/00G06F17/30G06F12/08
    • G06F17/30982G06F12/0864G06F12/0895G06F17/3033G06F2212/1024
    • The present invention discloses a content addressable memory and a method of searching data thereof. The method includes generating a hash index data item from a received input data item; searching the cache for presence of a row tag of the RAM data row corresponding to the data item of hash index; in response to presence, searching the RAM for a RAM data item corresponding to the input data item according to the corresponding row tag of the RAM data row; in response to absence, searching the RAM for a RAM data item corresponding to the input data item by using the data item of hash index; and in response to finding a RAM data item corresponding to the input data item in the RAM, outputting data corresponding to the RAM data item. The method can accelerate data search in the CAM.
    • 本发明公开了一种内容寻址存储器及其数据搜索方法。 该方法包括从接收到的输入数据项生成散列索引数据项; 搜索高速缓存存在对应于散列索引的数据项的RAM数据行的行标签; 响应于存在,根据RAM数据行的相应行标签,在RAM中搜索与输入数据项对应的RAM数据项; 响应于不存在,通过使用散列索引的数据项搜索对应于输入数据项的RAM数据项的RAM; 并且响应于找到与RAM中的输入数据项相对应的RAM数据项,输出对应于RAM数据项的数据。 该方法可以加速CAM中的数据搜索。
    • 5. 发明申请
    • CONTENT ADDRESSABLE MEMORY AND METHOD OF SEARCHING DATA THEREOF
    • 内容可寻址存储器及其数据搜索方法
    • US20130046922A1
    • 2013-02-21
    • US13372869
    • 2012-02-14
    • Yong Feng PanYufei LiBo FanLiang Chen
    • Yong Feng PanYufei LiBo FanLiang Chen
    • G06F12/00
    • G06F17/30982G06F12/0864G06F12/0895G06F17/3033G06F2212/1024
    • The present invention discloses a content addressable memory and a method of searching data thereof. The method includes generating a hash index data item from a received input data item; searching the cache for presence of a row tag of the RAM data row corresponding to the data item of hash index; in response to presence, searching the RAM for a RAM data item corresponding to the input data item according to the corresponding row tag of the RAM data row; in response to absence, searching the RAM for a RAM data item corresponding to the input data item by using the data item of hash index; and in response to finding a RAM data item corresponding to the input data item in the RAM, outputting data corresponding to the RAM data item. The method can accelerate data search in the CAM.
    • 本发明公开了一种内容寻址存储器及其数据搜索方法。 该方法包括从接收到的输入数据项生成散列索引数据项; 搜索高速缓存存在对应于散列索引的数据项的RAM数据行的行标签; 响应于存在,根据RAM数据行的相应行标签,在RAM中搜索与输入数据项对应的RAM数据项; 响应于不存在,通过使用散列索引的数据项搜索对应于输入数据项的RAM数据项的RAM; 并且响应于找到与RAM中的输入数据项相对应的RAM数据项,输出对应于RAM数据项的数据。 该方法可以加速CAM中的数据搜索。
    • 9. 发明授权
    • Frame boundary detection and decoding
    • 帧边界检测和解码
    • US08495478B2
    • 2013-07-23
    • US13108081
    • 2011-05-16
    • Yang LiuBo FanYi Fan LinYufei Li
    • Yang LiuBo FanYi Fan LinYufei Li
    • H03M13/03
    • H03M13/333H03M13/09H03M13/2742H03M13/51H03M13/6561H04L1/0046H04L7/048
    • Disclosed are a method and apparatus for detecting frame boundary for a data stream received at an Ethernet FEC layer, as well as a decoding method and system for the same. The apparatus for detecting frame boundary may comprise: a buffer for buffering data in a data stream, a length of the data in the buffer being greater than one frame; a syndrome generator for calculating a current syndrome based on a first data item, a second data item, and an intermediate calculation result of a previous syndrome, wherein the first data item is the last bit in a current candidate frame, and the second data item is a bit preceding the current candidate frame; and a comparator for using the current syndrome to check whether the bit preceding the current candidate frame is a frame boundary of an Ethernet FEC layer. The apparatus for detecting frame boundary can improve the speed of frame boundary detection.
    • 公开了一种用于检测在以太网FEC层接收的数据流的帧边界的方法和装置,以及用于其的解码方法和系统。 用于检测帧边界的装置可以包括:用于缓冲数据流中的数据的缓冲器,缓冲器中的数据的长度大于一帧; 一种用于基于第一数据项,第二数据项和先前综合征的中间计算结果计算当前综合征的校正子发生器,其中第一数据项是当前候选帧中的最后位,并且第二数据项 在当前候选帧之前有一点; 以及比较器,用于使用当前校正子来检查当前候选帧之前的位是否是以太网FEC层的帧边界。 用于检测帧边界的装置可以提高帧边界检测的速度。
    • 10. 发明申请
    • Method and Apparatus for Tracking Uncertain Signals
    • 用于跟踪不确定信号的方法和装置
    • US20120110526A1
    • 2012-05-03
    • US13280853
    • 2011-10-25
    • Liang ChenYufei LiYong Feng PanJian Yang
    • Liang ChenYufei LiYong Feng PanJian Yang
    • G06F17/50
    • G06F17/5027G06F17/5022G06F17/5081
    • A method and an apparatus for tracking uncertain signals in the simulation of chip design are provided. The method comprises: generating a directed graph which contains sequential logic devices and IO devices from the netlist of chip design, wherein the directed graph illustrates the signal association among the sequential logic devices and IO devices; obtaining the signals related with the sequential logic devices and IO devices from the simulation results, wherein the signals contain a plurality of uncertain signals; and back tracing at least a part of the plurality of uncertain signals along the directed graph to determine the device which firstly generates an uncertain signal. The corresponding apparatus is also provided. With the above method and apparatus, uncertain signals can be traced and their source can be determined, which improves the debugging efficiency.
    • 提供了一种在芯片设计仿真中跟踪不确定信号的方法和装置。 该方法包括:从芯片设计的网表生成包含顺序逻辑器件和IO器件的有向图,其中有向图示出了顺序逻辑器件和IO器件之间的信号关联; 从仿真结果获得与顺序逻辑器件和IO器件相关的信号,其中信号包含多个不确定信号; 并且沿着有向图向后跟踪多个不确定信号的至少一部分,以确定首先产生不确定信号的装置。 还提供了相应的装置。 利用上述方法和装置,可以追踪不确定的信号并确定其来源,从而提高调试效率。