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1. 发明授权

US06939766B1 Method for fabricating a flash memory device 有权
标题翻译：闪存器件的制造方法
公开(公告)号：US06939766B1
公开(公告)日：2005-09-06
申请号：US10616804
申请日：2003-07-09
申请人： Yue-Song He , Richard M. Fastow , Jianshi Wang
发明人： Yue-Song He , Richard M. Fastow , Jianshi Wang
IPC分类号： H01L21/28 , H01L21/8247
CPC分类号： H01L21/28273
摘要： The present invention is a method for fabricating a flash memory device. In one embodiment, a gate structure comprising a tunnel oxide layer, a floating gate layer, an oxide layer, and a control gate layer is fabricated on a semiconductor substrate. A rapid thermal oxidation (RTO) process is then performed to repair the tunnel oxide layer.
摘要翻译：本发明是一种制造闪存装置的方法。在一个实施例中，在半导体衬底上制造包括隧道氧化物层，浮动栅极层，氧化物层和控制栅极层的栅极结构。然后进行快速热氧化（RTO）处理以修复隧道氧化物层。

2. 发明授权

US07084458B1 Semiconductor device having triple LDD structure and lower gate resistance formed with a single implant process 有权
标题翻译：半导体器件具有三重LDD结构和较低的栅极电阻，由单一的注入工艺形成
公开(公告)号：US07084458B1
公开(公告)日：2006-08-01
申请号：US11120690
申请日：2005-05-02
申请人： Imran Khan , Jianshi Wang , Yue-Song He , Jun Kang
发明人： Imran Khan , Jianshi Wang , Yue-Song He , Jun Kang
IPC分类号： H01L29/76
CPC分类号： H01L29/665 , H01L29/66598
摘要： A method of fabricating a semiconductor device having a triple LDD (lateral diffused dopants) structure is disclosed. This fabrication method requires a single implant process, leading to reduction in fabrication costs and fabrication time. Moreover, this fabrication method increases the surface area of the gate structure of the semiconductor device that is available for silicide to be formed, leading to lower gate resistance.
摘要翻译：公开了一种制造具有三重LDD（横向漫射掺杂剂）结构的半导体器件的方法。这种制造方法需要单个注入工艺，导致制造成本和制造时间的降低。此外，该制造方法增加可用于要形成的硅化物的半导体器件的栅极结构的表面积，导致较低的栅极电阻。

3. 发明授权

US06939770B1 Method of fabricating semiconductor device having triple LDD structure and lower gate resistance formed with a single implant process 失效
标题翻译：制造具有三重LDD结构的半导体器件的方法和用单个注入工艺形成的较低的栅极电阻
公开(公告)号：US06939770B1
公开(公告)日：2005-09-06
申请号：US10618514
申请日：2003-07-11
申请人： Imran Khan , Jianshi Wang , Yue-Song He , Jun Kang
发明人： Imran Khan , Jianshi Wang , Yue-Song He , Jun Kang
IPC分类号： H01L21/336
CPC分类号： H01L29/665 , H01L29/66598
摘要： A method of fabricating a semiconductor device having a triple LDD (lateral diffused dopants) structure is disclosed. This fabrication method requires a single implant process, leading to reduction in fabrication costs and fabrication time. Moreover, this fabrication method increases the surface area of the gate structure of the semiconductor device that is available for silicide to be formed, leading to lower gate resistance.
摘要翻译：公开了一种制造具有三重LDD（横向漫射掺杂剂）结构的半导体器件的方法。这种制造方法需要单个注入工艺，导致制造成本和制造时间的降低。此外，该制造方法增加可用于要形成的硅化物的半导体器件的栅极结构的表面积，导致较低的栅极电阻。

4. 发明授权

US06751146B1 System and method for charge restoration in a non-volatile memory device 有权
标题翻译：用于非易失性存储器件中的电荷恢复的系统和方法
公开(公告)号：US06751146B1
公开(公告)日：2004-06-15
申请号：US10338333
申请日：2003-01-07
申请人： Zhigang Wang , Jianshi Wang , Imran Khan
发明人： Zhigang Wang , Jianshi Wang , Imran Khan
IPC分类号： G11C700
CPC分类号： G11C16/3431 , G11C11/406 , G11C11/56 , G11C11/5621 , G11C16/3418
摘要： A non-volatile memory device comprising logic for charge restoration. The restore logic controls a read circuit for determining a value associated with the threshold voltage of a memory cell selected from a memory cell array, and compares the value to one or more boundary values to determine whether or not the memory cell value is out of bounds. In the event that the memory cell value is out of bounds, a target value for the memory cell is established. The restore logic controls a write circuit that applies a write pulse to the memory cell. The read and write process is repeated as necessary until the target value for the memory cell is achieved. The restore logic may include a processor for performing a statistical analysis on the memory cell array in order to determine target restoration values. Memory cells within the array may be reserved for use by the restore logic.
摘要翻译：一种包括用于电荷恢复的逻辑的非易失性存储器件。恢复逻辑控制用于确定与从存储单元阵列选择的存储单元的阈值电压相关联的值的读取电路，并将该值与一个或多个边界值进行比较，以确定存储器单元值是否超出界限。在存储单元值超出范围的情况下，建立存储单元的目标值。恢复逻辑控制将写入脉冲施加到存储器单元的写入电路。必要时重复读取和写入过程，直到达到存储单元的目标值。恢复逻辑可以包括用于对存储器单元阵列执行统计分析以便确定目标恢复值的处理器。阵列内的存储单元可能被保留供恢复逻辑使用。

5. 发明授权

US06177345B1 Method of silicide film formation onto a semiconductor substrate 失效
标题翻译：在半导体衬底上形成硅化物膜的方法
公开(公告)号：US06177345B1
公开(公告)日：2001-01-23
申请号：US09080405
申请日：1998-05-18
申请人： Guarionex Morales , Jianshi Wang , Judith Q. Rizzuto , Hao Fang
发明人： Guarionex Morales , Jianshi Wang , Judith Q. Rizzuto , Hao Fang
IPC分类号： H01L2144
CPC分类号： H01L21/28518 , H01L21/32053
摘要： A method of depositing metal silicide onto a semiconductor substrate includes a step of depositing, by a CVD process, a first metal silicide layer with silane gas onto the semiconductor substrate. The method also includes a step of thermally treating and chemically cleaning the semiconductor substrate. The method further includes a step of depositing, by the CVD process, a second metal silicide layer with silane gas onto the semiconductor substrate. By this method, cracks in the metal silicide formed on the semiconductor substrate are minimized.
摘要翻译：将金属硅化物沉积到半导体衬底上的方法包括通过CVD工艺将具有硅烷气体的第一金属硅化物层沉积到半导体衬底上的步骤。该方法还包括对半导体衬底进行热处理和化学清洗的步骤。该方法还包括通过CVD工艺将具有硅烷气体的第二金属硅化物层沉积到半导体衬底上的步骤。通过这种方法，在半导体衬底上形成的金属硅化物中的裂纹被最小化。

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