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    • 7. 发明授权
    • Protective seal ring for preventing die-saw induced stress
    • 用于防止模锯引起的应力的保护密封环
    • US08334582B2
    • 2012-12-18
    • US12347026
    • 2008-12-31
    • Shin-Puu JengHsien-Wei ChenShang-Yun HouHao-Yi TsaiAnbiarshy N. F. WuYu-Wen Liu
    • Shin-Puu JengHsien-Wei ChenShang-Yun HouHao-Yi TsaiAnbiarshy N. F. WuYu-Wen Liu
    • H01L23/544
    • H01L21/78H01L23/562H01L23/564H01L23/585H01L2924/0002H01L2924/00
    • A semiconductor chip includes a semiconductor substrate; a plurality of low-k dielectric layers over the semiconductor substrate; a first passivation layer over the plurality of low-k dielectric layers; and a second passivation layer over the first passivation layer. A first seal ring is adjacent to an edge of the semiconductor chip, wherein the first seal ring has an upper surface substantially level to a bottom surface of the first passivation layer. A second seal ring is adjacent to the first seal ring and on an inner side of the semiconductor chip than the first seal ring. The second seal ring includes a pad ring in the first passivation layer and the second passivation layer. A trench ring includes at least a portion directly over the first seal ring. The trench ring extends from a top surface of the second passivation layer down to at least an interface between the first passivation layer and the second passivation layer.
    • 半导体芯片包括半导体衬底; 半导体衬底上的多个低k电介质层; 在所述多个低k电介质层上的第一钝化层; 以及在所述第一钝化层上的第二钝化层。 第一密封环邻近半导体芯片的边缘,其中第一密封环具有基本上平坦于第一钝化层的底表面的上表面。 第二密封环与第一密封环相邻,并且在半导体芯片的内侧与第一密封环相邻。 第二密封环包括在第一钝化层和第二钝化层中的焊盘环。 沟槽环包括直接在第一密封环上的至少一部分。 沟槽环从第二钝化层的顶表面延伸到至少第一钝化层和第二钝化层之间的界面。