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1. 发明授权

US08666338B2 Multi-mode bypass driver amplifier with tunable load matching 有权
标题翻译：具有可调负载匹配的多模式旁路驱动放大器
公开(公告)号：US08666338B2
公开(公告)日：2014-03-04
申请号：US13356492
申请日：2012-01-23
申请人： Yu Zhao , Nathan M. Pletcher
发明人： Yu Zhao , Nathan M. Pletcher
IPC分类号： H01Q11/12
CPC分类号： H03F1/0277 , H03F1/565 , H03F3/195 , H03F3/211 , H03F3/245 , H03F3/72 , H03F2200/213 , H03F2200/222 , H03F2200/318 , H03F2200/378 , H03F2200/387 , H03F2200/411 , H03F2203/21136 , H03F2203/21175 , H03F2203/7233 , H03F2203/7239
摘要： A multi-mode driver amplifier with tunable load matching is disclosed. In an exemplary design, an apparatus includes a multi-mode driver amplifier and a tunable impedance matching circuit. The driver amplifier amplifies an input radio frequency (RF) signal and provides an amplified RF signal. The tunable impedance matching circuit matches an output impedance of the driver amplifier. The apparatus may include a main transmit path and a bypass transmit path. The bypass transmit path may include the driver amplifier and the tunable impedance matching circuit and no power amplifier. The main transmit path may include a second driver amplifier and a power amplifier. The main transmit path may be selected for transmit power levels higher than a threshold level, and the bypass transmit path may be selected for transmit power levels lower than the threshold level.
摘要翻译：公开了一种具有可调负载匹配的多模驱动放大器。在示例性设计中，装置包括多模式驱动器放大器和可调谐阻抗匹配电路。驱动器放大器放大输入射频（RF）信号并提供放大的RF信号。可调阻抗匹配电路匹配驱动器放大器的输出阻抗。该装置可以包括主发射路径和旁路发射路径。旁路发射路径可以包括驱动放大器和可调谐阻抗匹配电路，而不包括功率放大器。主发射路径可以包括第二驱动放大器和功率放大器。可以为高于阈值电平的发射功率电平选择主发射路径，并且可以选择低于阈值电平的发射功率电平的旁路发射路径。

2. 发明授权

US08847689B2 Stacked amplifier with diode-based biasing 有权
标题翻译：具有基于二极管的偏置的堆叠放大器
公开(公告)号：US08847689B2
公开(公告)日：2014-09-30
申请号：US12711858
申请日：2010-02-24
申请人： Yu Zhao , Nathan M. Pletcher
发明人： Yu Zhao , Nathan M. Pletcher
IPC分类号： H03F3/04
CPC分类号： H03F1/0283 , H03F1/301 , H03F3/189
摘要： Techniques for improving linearity of amplifiers are described. In an exemplary design, an amplifier (e.g., a power amplifier) may include a plurality of transistors coupled in a stack and at least one diode. The plurality of transistors may receive and amplify an input signal and provide an output signal. The at least one diode may be operatively coupled to at least one transistor in the stack. Each diode may provide a variable bias voltage to an associated transistor in the stack. Each diode may have a lower voltage drop across the diode at high input power and may provide a higher bias voltage to the associated transistor at high input power. The at least one transistor may have higher gain at high input power due to the higher bias voltage from the at least one diode. The higher gain may improve the linearity of the amplifier.
摘要翻译：描述了用于提高放大器线性度的技术。在示例性设计中，放大器（例如，功率放大器）可以包括耦合在堆叠中的多个晶体管和至少一个二极管。多个晶体管可以接收和放大输入信号并提供输出信号。至少一个二极管可以可操作地耦合到堆叠中的至少一个晶体管。每个二极管可以向堆叠中的相关联的晶体管提供可变偏置电压。每个二极管可以在高输入功率下在二极管上具有较低的电压降，并且可以在高输入功率下向相关联的晶体管提供更高的偏置电压。由于来自至少一个二极管的较高偏置电压，至少一个晶体管可能在高输入功率下具有更高的增益。较高的增益可以提高放大器的线性度。

3. 发明申请

US20100327976A1 INTEGRATED POWER AMPLIFIER WITH LOAD INDUCTOR LOCATED UNDER IC DIE 有权
标题翻译：集成功率放大器与负载电感位于IC DIE下
公开(公告)号：US20100327976A1
公开(公告)日：2010-12-30
申请号：US12705493
申请日：2010-02-12
申请人： Guy Klemens , Thomas A. Myers , Norman L. Frederick, JR. , Yu Zhao , Babak Nejati , Nathan M. Pletcher , Aristoteie Hadjichristos
发明人： Guy Klemens , Thomas A. Myers , Norman L. Frederick, JR. , Yu Zhao , Babak Nejati , Nathan M. Pletcher , Aristoteie Hadjichristos
IPC分类号： H03F3/16
CPC分类号： H03F3/195 , H01L23/645 , H01L23/66 , H01L2223/6655 , H01L2223/6661 , H01L2224/16225 , H01L2924/00011 , H01L2924/00014 , H01L2924/1305 , H01L2924/19015 , H01L2924/3011 , H01L2924/00 , H01L2224/0401
摘要： A compact integrated power amplifier is described herein. In an exemplary design, an apparatus includes (i) an integrated circuit (IC) die having at least one transistor for a power amplifier and (ii) an IC package having a load inductor for the power amplifier. The IC die is mounted on the IC package with the transistor(s) located over the load inductor. In an exemplary design, the IC die includes a transistor manifold that is placed over the load inductor on the IC package. The transistor(s) are fabricated in the transistor manifold, have a drain connection in the center of the transistor manifold, and have source connections on two sides of the transistor manifold. The IC die and the IC package may include one or more additional power amplifiers. The transistor(s) for each power amplifier may be located over the load inductor for that power amplifier.
摘要翻译：这里描述了紧凑的集成功率放大器。在示例性设计中，装置包括（i）具有用于功率放大器的至少一个晶体管的集成电路（IC）管芯，以及（ii）具有用于功率放大器的负载电感器的IC封装。 IC芯片安装在IC封装上，晶体管位于负载感应器上方。在示例性设计中，IC管芯包括放置在IC封装上的负载电感器上的晶体管歧管。晶体管制造在晶体管歧管中，在晶体管歧管的中心具有漏极连接，并且在晶体管歧管的两侧具有源极连接。 IC芯片和IC封装可以包括一个或多个附加的功率放大器。每个功率放大器的晶体管可以位于该功率放大器的负载电感上。

4. 发明申请

US20110043285A1 DIGITAL TUNABLE INTER-STAGE MATCHING CIRCUIT 有权
标题翻译：数字可调节间歇匹配电路
公开(公告)号：US20110043285A1
公开(公告)日：2011-02-24
申请号：US12715254
申请日：2010-03-01
申请人： Yu Zhao , Babak Nejati , Nathan M. Pletcher , Aristotele Hadjichristos
发明人： Yu Zhao , Babak Nejati , Nathan M. Pletcher , Aristotele Hadjichristos
IPC分类号： H03F3/16
CPC分类号： H03F1/42 , H03F1/223 , H03F3/193 , H03F2200/318 , H03H7/40
摘要： A tunable inter-stage matching circuit that can improve performance is described. In an exemplary design, an apparatus includes a first active circuit (e.g., a driver amplifier), a second active circuit (e.g., a power amplifier), and a tunable inter-stage matching circuit coupled between the first and second active circuits. The tunable inter-stage matching circuit includes a tunable capacitor that can be varied in discrete steps to adjust impedance matching between the first and second active circuits. In an exemplary design, the tunable capacitor includes (i) a plurality of capacitors coupled in parallel and (ii) a plurality of switches coupled to the plurality of capacitors, one switch for each capacitor. Each switch may be turned on to select an associated capacitor or turned off to unselect the associated capacitor. The tunable capacitor may further include a fixed capacitor coupled in parallel with the plurality of capacitors.
摘要翻译：描述了可以提高性能的可调谐级间匹配电路。在示例性设计中，装置包括耦合在第一和第二有源电路之间的第一有源电路（例如，驱动器放大器），第二有源电路（例如，功率放大器）和可调谐级间匹配电路。可调谐级间匹配电路包括可以在离散步骤中变化的可调谐电容器，以调整第一和第二有源电路之间的阻抗匹配。在示例性设计中，可调谐电容器包括（i）并联耦合的多个电容器和（ii）耦合到多个电容器的多个开关，用于每个电容器的一个开关。每个开关可以被接通以选择一个相关联的电容器或关闭以取消选择相关联的电容器。可调谐电容器还可以包括与多个电容器并联耦合的固定电容器。

5. 发明授权

US08779857B2 Amplifier with variable matching circuit to improve linearity 有权
标题翻译：具有可变匹配电路的放大器，以提高线性度
公开(公告)号：US08779857B2
公开(公告)日：2014-07-15
申请号：US12699659
申请日：2010-02-03
申请人： Nathan M. Pletcher , Yu Zhao
发明人： Nathan M. Pletcher , Yu Zhao
IPC分类号： H03F3/191
CPC分类号： H03F1/565 , H03F1/086 , H03F3/193
摘要： Techniques for reducing distortion and improving linearity of amplifiers are described. In an exemplary design, an apparatus includes a driver amplifier, a variable matching circuit, and a power amplifier. The driver amplifier amplifies a first RF signal and provides a second RF signal. The variable matching circuit receives the second RF signal and provides a third RF signal. The power amplifier amplifies the third RF signal and provides a fourth RF signal. The variable matching circuit matches a fixed impedance at the output of the driver amplifier to a variable impedance at the input of the power amplifier in order to improve the linearity of the amplifiers. In an exemplary design, the power amplifier includes a first transistor (e.g., an NMOS transistor) of a first type, and the variable matching circuit includes a second transistor (e.g., a PMOS transistor) of a second type that is different from the first type.
摘要翻译：描述了减小失真和提高放大器线性度的技术。在示例性设计中，装置包括驱动器放大器，可变匹配电路和功率放大器。驱动器放大器放大第一RF信号并提供第二RF信号。可变匹配电路接收第二RF信号并提供第三RF信号。功率放大器放大第三RF信号并提供第四RF信号。可变匹配电路将驱动放大器输出端的固定阻抗与功率放大器输入端的可变阻抗相匹配，以提高放大器的线性度。在示例性设计中，功率放大器包括第一类型的第一晶体管（例如，NMOS晶体管），并且可变匹配电路包括与第一类型不同的第二类型的第二晶体管（例如，PMOS晶体管）类型。

6. 发明申请

US20130190036A1 MULTI-MODE BYPASS DRIVER AMPLIFIER WITH TUNABLE LOAD MATCHING 有权
标题翻译：多模式旁路驱动放大器，具有可调载荷匹配
公开(公告)号：US20130190036A1
公开(公告)日：2013-07-25
申请号：US13356492
申请日：2012-01-23
申请人： Yu Zhao , Nathan M. Pletcher
发明人： Yu Zhao , Nathan M. Pletcher
IPC分类号： H04W88/02
CPC分类号： H03F1/0277 , H03F1/565 , H03F3/195 , H03F3/211 , H03F3/245 , H03F3/72 , H03F2200/213 , H03F2200/222 , H03F2200/318 , H03F2200/378 , H03F2200/387 , H03F2200/411 , H03F2203/21136 , H03F2203/21175 , H03F2203/7233 , H03F2203/7239
摘要： A multi-mode driver amplifier with tunable load matching is disclosed. In an exemplary design, an apparatus includes a multi-mode driver amplifier and a tunable impedance matching circuit. The driver amplifier amplifies an input radio frequency (RF) signal and provides an amplified RF signal. The tunable impedance matching circuit matches an output impedance of the driver amplifier. The apparatus may include a main transmit path and a bypass transmit path. The bypass transmit path may include the driver amplifier and the tunable impedance matching circuit and no power amplifier. The main transmit path may include a second driver amplifier and a power amplifier. The main transmit path may be selected for transmit power levels higher than a threshold level, and the bypass transmit path may be selected for transmit power levels lower than the threshold level.
摘要翻译：公开了一种具有可调负载匹配的多模驱动放大器。在示例性设计中，装置包括多模式驱动器放大器和可调谐阻抗匹配电路。驱动器放大器放大输入射频（RF）信号并提供放大的RF信号。可调阻抗匹配电路匹配驱动器放大器的输出阻抗。该装置可以包括主发射路径和旁路发射路径。旁路发射路径可以包括驱动放大器和可调谐阻抗匹配电路，而不包括功率放大器。主发射路径可以包括第二驱动放大器和功率放大器。可以为高于阈值电平的发射功率电平选择主发射路径，并且可以选择低于阈值电平的发射功率电平的旁路发射路径。

7. 发明申请

US20110037519A1 AMPLIFIER WITH VARIABLE MATCHING CIRCUIT TO IMPROVE LINEARITY 有权
标题翻译：具有可变匹配电路的放大器，以提高线性度
公开(公告)号：US20110037519A1
公开(公告)日：2011-02-17
申请号：US12699659
申请日：2010-02-03
申请人： Nathan M. Pletcher , Yu Zhao
发明人： Nathan M. Pletcher , Yu Zhao
IPC分类号： H03F3/16
CPC分类号： H03F1/565 , H03F1/086 , H03F3/193
摘要： Techniques for reducing distortion and improving linearity of amplifiers are described. In an exemplary design, an apparatus includes a driver amplifier, a variable matching circuit, and a power amplifier. The driver amplifier amplifies a first RF signal and provides a second RF signal. The variable matching circuit receives the second RF signal and provides a third RF signal. The power amplifier amplifies the third RF signal and provides a fourth RF signal. The variable matching circuit matches a fixed impedance at the output of the driver amplifier to a variable impedance at the input of the power amplifier in order to improve the linearity of the amplifiers. In an exemplary design, the power amplifier includes a first transistor (e.g., an NMOS transistor) of a first type, and the variable matching circuit includes a second transistor (e.g., a PMOS transistor) of a second type that is different from the first type.
摘要翻译：描述了减小失真和提高放大器线性度的技术。在示例性设计中，装置包括驱动器放大器，可变匹配电路和功率放大器。驱动器放大器放大第一RF信号并提供第二RF信号。可变匹配电路接收第二RF信号并提供第三RF信号。功率放大器放大第三RF信号并提供第四RF信号。可变匹配电路将驱动放大器输出端的固定阻抗与功率放大器输入端的可变阻抗相匹配，以提高放大器的线性度。在示例性设计中，功率放大器包括第一类型的第一晶体管（例如，NMOS晶体管），并且可变匹配电路包括与第一类型不同的第二类型的第二晶体管（例如，PMOS晶体管）类型。

8. 发明申请

US20110316636A1 DIGITAL TUNABLE INTER-STAGE MATCHING CIRCUIT 有权
标题翻译：数字可调节间歇匹配电路
公开(公告)号：US20110316636A1
公开(公告)日：2011-12-29
申请号：US13226397
申请日：2011-09-06
申请人： Yu Zhao , Babak Nejati , Nathan M. Pletcher , Aristotele Hadjichristos
发明人： Yu Zhao , Babak Nejati , Nathan M. Pletcher , Aristotele Hadjichristos
IPC分类号： H03H11/28 , H03F3/04
CPC分类号： H03F1/42 , H03F1/223 , H03F3/193 , H03F2200/318 , H03H7/40
摘要： A tunable inter-stage matching circuit that can improve performance is described. In an exemplary design, an apparatus comprises a driver amplifier and a power amplifier. The apparatus may further include an inter-stage matching circuit tunable in discrete steps for matching impedances between the driver amplifier and the power amplifier. The tunable inter-stage matching circuit may include a bank of capacitors, each capacitor of the bank coupled in series with a switch for coupling the capacitor to a ground voltage.
摘要翻译：描述了可以提高性能的可调谐级间匹配电路。在示例性设计中，装置包括驱动器放大器和功率放大器。该装置还可以包括可以在离散步骤中调节的级间匹配电路，用于匹配驱动器放大器和功率放大器之间的阻抗。可调谐级间匹配电路可以包括一组电容器，该组的每个电容器与用于将电容器耦合到接地电压的开关串联耦合。

9. 发明申请

US20110043284A1 STACKED AMPLIFIER WITH DIODE-BASED BIASING 有权
标题翻译：基于二极管偏置的堆叠放大器
公开(公告)号：US20110043284A1
公开(公告)日：2011-02-24
申请号：US12711858
申请日：2010-02-24
申请人： Yu Zhao , Nathan M. Pletcher
发明人： Yu Zhao , Nathan M. Pletcher
IPC分类号： H03F3/16
CPC分类号： H03F1/0283 , H03F1/301 , H03F3/189
摘要： Techniques for improving linearity of amplifiers are described. In an exemplary design, an amplifier (e.g., a power amplifier) may include a plurality of transistors coupled in a stack and at least one diode. The plurality of transistors may receive and amplify an input signal and provide an output signal. The at least one diode may be operatively coupled to at least one transistor in the stack. Each diode may provide a variable bias voltage to an associated transistor in the stack. Each diode may have a lower voltage drop across the diode at high input power and may provide a higher bias voltage to the associated transistor at high input power. The at least one transistor may have higher gain at high input power due to the higher bias voltage from the at least one diode. The higher gain may improve the linearity of the amplifier.
摘要翻译：描述了用于提高放大器线性度的技术。在示例性设计中，放大器（例如，功率放大器）可以包括耦合在堆叠中的多个晶体管和至少一个二极管。多个晶体管可以接收和放大输入信号并提供输出信号。至少一个二极管可以可操作地耦合到堆叠中的至少一个晶体管。每个二极管可以向堆叠中的相关联的晶体管提供可变偏置电压。每个二极管可以在高输入功率下在二极管上具有较低的电压降，并且可以在高输入功率下向相关联的晶体管提供更高的偏置电压。由于来自至少一个二极管的较高偏置电压，至少一个晶体管可能在高输入功率下具有更高的增益。较高的增益可以提高放大器的线性度。

10. 发明申请

US20110037516A1 MULTI-STAGE IMPEDANCE MATCHING 有权
标题翻译：多级阻抗匹配
公开(公告)号：US20110037516A1
公开(公告)日：2011-02-17
申请号：US12641228
申请日：2009-12-17
申请人： Babak Nejati , Yu Zhao , Nathan M. Pletcher , Aristotele Hadjichristos , Puay Hoe See
发明人： Babak Nejati , Yu Zhao , Nathan M. Pletcher , Aristotele Hadjichristos , Puay Hoe See
IPC分类号： H03F3/68
CPC分类号： H03F1/565 , H03F3/211 , H03F3/72
摘要： Exemplary techniques for performing impedance matching are described. In an exemplary embodiment, the apparatus may include an amplifier (e.g., a power amplifier) coupled to first and second matching circuits. The first matching circuit may include multiple stages coupled to a first node and may provide input impedance matching for the amplifier. The second matching circuit may include multiple stages coupled to a second node and may provide output impedance matching for the amplifier. At least one switch may be coupled between the first and second nodes and may bypass or select the amplifier. The first and second nodes may have a common impedance. The apparatus may further include a second amplifier coupled in parallel with the amplifier and further to the matching circuits. The second matching circuit may include a first input stage coupled to the amplifier, a second input stage coupled to the second amplifier, and a second stage coupled to the two input stages via switches.
摘要翻译：描述了用于执行阻抗匹配的示例性技术。在示例性实施例中，该装置可以包括耦合到第一和第二匹配电路的放大器（例如，功率放大器）。第一匹配电路可以包括耦合到第一节点的多个级并且可以为放大器提供输入阻抗匹配。第二匹配电路可以包括耦合到第二节点的多个级并且可以为放大器提供输出阻抗匹配。至少一个开关可以耦合在第一和第二节点之间，并且可以旁路或选择放大器。第一和第二节点可以具有公共阻抗。该装置还可以包括与放大器并联并且进一步耦合到匹配电路的第二放大器。第二匹配电路可以包括耦合到放大器的第一输入级，耦合到第二放大器的第二输入级，以及经由开关耦合到两个输入级的第二级。

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