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1. 发明申请

US20090289823A1 Sigma-delta analog-to-digital converter and solid-state image pickup device 有权
标题翻译： Sigma-delta模数转换器和固态图像拾取器件
公开(公告)号：US20090289823A1
公开(公告)日：2009-11-26
申请号：US12453845
申请日：2009-05-26
申请人： Youngcheol Chae , In Hee Lee , Gunhee Han , Seog Heon Ham
发明人： Youngcheol Chae , In Hee Lee , Gunhee Han , Seog Heon Ham
IPC分类号： H03M3/00
CPC分类号： H03M3/384 , H03M3/424
摘要： A sigma-delta analog-to-digital converter may include a sigma-delta modulator and a decimation filter. The sigma-delta modulator may convert a first analog input signal into a first bit stream having a first pattern using sigma-delta modulation and convert a second analog input signal into a second bit stream having a second pattern using the sigma-delta modulation. The decimation filter may integrate the number of bits having a particular value in the first bit stream, output a first digital value, calculate a bitwise complement value of the first digital value, integrate the number of bits having the particular value in the second bit stream with the bitwise complement value of the first digital value as an initial value of a second digital value, and output the second digital value.
摘要翻译： Σ-Δ模数转换器可以包括Σ-Δ调制器和抽取滤波器。 Σ-Δ调制器可以使用Σ-Δ调制将第一模拟输入信号转换成具有第一模式的第一比特流，并且使用Σ-Δ调制将第二模拟输入信号转换成具有第二模式的第二比特流。抽取滤波器可以将具有特定值的比特数量集成在第一比特流中，输出第一数字值，计算第一数字值的按位补码，将具有特定值的比特数集成在第二比特流中以第一数字值的按位补码作为第二数字值的初始值，并输出第二数字值。

2. 发明授权

US07773018B2 Sigma-delta analog-to-digital converter and solid-state image pickup device 有权
标题翻译： Sigma-delta模数转换器和固态图像拾取器件
公开(公告)号：US07773018B2
公开(公告)日：2010-08-10
申请号：US12453845
申请日：2009-05-26
申请人： Youngcheol Chae , In Hee Lee , Gunhee Han , Seog Heon Ham
发明人： Youngcheol Chae , In Hee Lee , Gunhee Han , Seog Heon Ham
IPC分类号： H03M3/00
CPC分类号： H03M3/384 , H03M3/424
摘要： A sigma-delta analog-to-digital converter may include a sigma-delta modulator and a decimation filter. The sigma-delta modulator may convert a first analog input signal into a first bit stream having a first pattern using sigma-delta modulation and convert a second analog input signal into a second bit stream having a second pattern using the sigma-delta modulation. The decimation filter may integrate the number of bits having a particular value in the first bit stream, output a first digital value, calculate a bitwise complement value of the first digital value, integrate the number of bits having the particular value in the second bit stream with the bitwise complement value of the first digital value as an initial value of a second digital value, and output the second digital value.
摘要翻译： Σ-Δ模数转换器可以包括Σ-Δ调制器和抽取滤波器。 Σ-Δ调制器可以使用Σ-Δ调制将第一模拟输入信号转换成具有第一模式的第一比特流，并且使用Σ-Δ调制将第二模拟输入信号转换成具有第二模式的第二比特流。抽取滤波器可以将具有特定值的比特数量集成在第一比特流中，输出第一数字值，计算第一数字值的按位补码，将具有特定值的比特数集成在第二比特流中以第一数字值的按位补码作为第二数字值的初始值，并输出第二数字值。

3. 发明申请

US20090261998A1 APPARATUS AND METHOD FOR SIGMA-DELTA ANALOG TO DIGITAL CONVERSION 有权
标题翻译： SIGMA-DELTA模拟数字转换的装置和方法
公开(公告)号：US20090261998A1
公开(公告)日：2009-10-22
申请号：US12427303
申请日：2009-04-21
申请人： Youngcheol Chae , In Hee Lee , Jimin Cheon , Gunhee Han , Seog Heon Ham
发明人： Youngcheol Chae , In Hee Lee , Jimin Cheon , Gunhee Han , Seog Heon Ham
IPC分类号： H03M1/12 , H03M1/34 , H03M3/00 , H03M1/06
CPC分类号： H03M3/46 , H03M1/56 , H03M3/43 , H03M3/456
摘要： A method and apparatus are provided for sigma-delta (ΣΔ) analog to digital conversion, the method including receiving an analog signal, sampling the received signal, comparing the sampled signal with a constant reference voltage, providing at least one high-order bit responsive to the constant reference comparison, comparing the sampled signal with a variable reference voltage, providing at least one low-order bit responsive to the variable reference comparison, and combining the at least one high-order bit with the at least one low-order bit; and the apparatus including a comparator, a first ADC portion supplying the comparator with a constant reference voltage for providing at least one high-order bit, and a second ADC portion supplying the comparator with a variable reference voltage for providing at least One low-order bit.
摘要翻译：提供了一种用于Σ-Δ（SigmaDelta）模数转换的方法和装置，该方法包括接收模拟信号，对接收信号进行采样，将采样信号与恒定参考电压进行比较，提供至少一个高阶位响应对所述恒定参考比较进行比较，将所述采样信号与可变参考电压进行比较，提供响应于所述可变参考比较的至少一个低阶位，以及将所述至少一个高位位与所述至少一个低位位 ; 并且所述装置包括比较器，向所述比较器提供用于提供至少一个高位的恒定参考电压的第一ADC部分和向比较器提供可变参考电压的第二ADC部分，用于提供至少一个低阶位。

4. 发明授权

US08233068B2 Decimation filters, analog-to-digital converters including the same, and image sensors including the converters 有权
标题翻译：抽取滤波器，包括相同的模数转换器和包括转换器的图像传感器
公开(公告)号：US08233068B2
公开(公告)日：2012-07-31
申请号：US12453593
申请日：2009-05-15
申请人： Youngcheol Chae , In Hee Lee , Jimin Cheon , Gunhee Han , Seog Heon Ham
发明人： Youngcheol Chae , In Hee Lee , Jimin Cheon , Gunhee Han , Seog Heon Ham
IPC分类号： H04N5/335
CPC分类号： H04N5/37455 , H03H17/0664 , H03M3/424 , H03M3/462
摘要： An image sensor includes an analog-to-digital converter (ADC) and a decimation filter. The decimation filter includes a first digital data generator and a second digital data generator. The first digital data generator is configured to integrate sigma-delta modulated M-bit pixel data and output N-bit pixel data based on an integration result. The second digital data generator is configured to integrate the N-bit pixel data, generate P-bit pixel data based on an integration result, and output the P-bit pixel data as decimated data.
摘要翻译：图像传感器包括模数转换器（ADC）和抽取滤波器。抽取滤波器包括第一数字数据发生器和第二数字数据发生器。第一数字数据发生器被配置为基于积分结果来集成Σ-Δ调制的M位像素数据和输出N位像素数据。第二数字数据发生器被配置为集成N位像素数据，基于积分结果产生P位像素数据，并将P位像素数据输出为抽取数据。

5. 发明授权

US07916061B2 Apparatus and method for sigma-delta analog to digital conversion 有权
标题翻译：用于Σ-Δ模数转换的装置和方法
公开(公告)号：US07916061B2
公开(公告)日：2011-03-29
申请号：US12427303
申请日：2009-04-21
申请人： Youngcheol Chae , In Hee Lee , Jimin Cheon , Gunhee Han , Seog Heon Ham
发明人： Youngcheol Chae , In Hee Lee , Jimin Cheon , Gunhee Han , Seog Heon Ham
IPC分类号： H03M1/12
CPC分类号： H03M3/46 , H03M1/56 , H03M3/43 , H03M3/456
摘要： A method and apparatus are provided for sigma-delta (ΣΔ) analog to digital conversion, the method including receiving an analog signal, sampling the received signal, comparing the sampled signal with a constant reference voltage, providing at least one high-order bit responsive to the constant reference comparison, comparing the sampled signal with a variable reference voltage, providing at least one low-order bit responsive to the variable reference comparison, and combining the at least one high-order bit with the at least one low-order bit; and the apparatus including a comparator, a first ADC portion supplying the comparator with a constant reference voltage for providing at least one high-order bit, and a second ADC portion supplying the comparator with a variable reference voltage for providing at least one low-order bit.
摘要翻译：提供了一种用于Σ-Δ（＆Sgr＆amp; Dgr）模数转换的方法和装置，该方法包括接收模拟信号，对接收信号进行采样，将采样信号与恒定参考电压进行比较，响应于常数参考比较，将采样信号与可变参考电压进行比较，提供响应于可变参考比较的至少一个低阶位，以及将至少一个高位位与至少一个低位比较顺序位并且所述装置包括比较器，为比较器提供用于提供至少一个高位的恒定参考电压的第一ADC部分和向比较器提供可变参考电压的第二ADC部分，用于提供至少一个低阶位。

6. 发明申请

US20090295956A1 Decimation filters, analog-to-digital converters including the same, and image sensors including the converters 有权
标题翻译：抽取滤波器，包括相同的模数转换器和包括转换器的图像传感器
公开(公告)号：US20090295956A1
公开(公告)日：2009-12-03
申请号：US12453593
申请日：2009-05-15
申请人： Youngcheol Chae , In Hee Lee , Jimin Cheon , Gunhee Han , Seog Heon Ham
发明人： Youngcheol Chae , In Hee Lee , Jimin Cheon , Gunhee Han , Seog Heon Ham
IPC分类号： H04N3/14 , G06F17/17 , H03M1/12
CPC分类号： H04N5/37455 , H03H17/0664 , H03M3/424 , H03M3/462
摘要： An image sensor includes an analog-to-digital converter (ADC) and a decimation filter. The decimation filter includes a first digital data generator and a second digital data generator. The first digital data generator is configured to integrate sigma-delta modulated M-bit pixel data and output N-bit pixel data based on an integration result. The second digital data generator is configured to integrate the N-bit pixel data, generate P-bit pixel data based on an integration result, and output the P-bit pixel data as decimated data.
摘要翻译：图像传感器包括模数转换器（ADC）和抽取滤波器。抽取滤波器包括第一数字数据发生器和第二数字数据发生器。第一数字数据发生器被配置为基于积分结果来集成Σ-Δ调制的M位像素数据和输出N位像素数据。第二数字数据发生器被配置为集成N位像素数据，基于积分结果产生P位像素数据，并将P位像素数据输出为抽取数据。

7. 发明授权

US08203477B2 Analog-to-digital conversion and implementations thereof 有权
标题翻译：模数转换及其实现
公开(公告)号：US08203477B2
公开(公告)日：2012-06-19
申请号：US12662449
申请日：2010-04-19
申请人： Jeonghwan Lee , Gunhee Han , Kwi Sung Yoo , Seog Heon Ham
发明人： Jeonghwan Lee , Gunhee Han , Kwi Sung Yoo , Seog Heon Ham
IPC分类号： H03M1/56
CPC分类号： H03M1/1225 , H03M1/144 , H03M1/56
摘要： In one embodiment, an analog-to-digital converter (ADC) includes a comparator and a supply circuit. The comparator is configured to compare an input signal to a reference signal. The supply circuit is configured to supply the reference signal. The supply circuit is configured to provide different circuit configurations for supplying the reference signal during different stages of analog-to-digital conversion such that the reference signal is scaled in substantially a same manner during at least two of the stages.
摘要翻译：在一个实施例中，模数转换器（ADC）包括比较器和电源电路。比较器被配置为将输入信号与参考信号进行比较。供电电路被配置为提供参考信号。供电电路被配置为提供不同的电路配置，用于在模数转换的不同阶段期间提供参考信号，使得参考信号在至少两个阶段期间以基本上相同的方式缩放。

8. 发明申请

US20100265114A1 Analog-to-digital conversion and implementations thereof 有权
标题翻译：模数转换及其实现
公开(公告)号：US20100265114A1
公开(公告)日：2010-10-21
申请号：US12662449
申请日：2010-04-19
申请人： Jeonghwan Lee , Gunhee Han , Kwi Sung Yoo , Seog Heon Ham
发明人： Jeonghwan Lee , Gunhee Han , Kwi Sung Yoo , Seog Heon Ham
IPC分类号： H03M1/12
CPC分类号： H03M1/1225 , H03M1/144 , H03M1/56
摘要： In one embodiment, an analog-to-digital converter (ADC) includes a comparator and a supply circuit. The comparator is configured to compare an input signal to a reference signal. The supply circuit is configured to supply the reference signal. The supply circuit is configured to provide different circuit configurations for supplying the reference signal during different stages of analog-to-digital conversion such that the reference signal is scaled in substantially a same manner during at least two of the stages.
摘要翻译：在一个实施例中，模数转换器（ADC）包括比较器和电源电路。比较器被配置为将输入信号与参考信号进行比较。供电电路被配置为提供参考信号。供电电路被配置为提供不同的电路配置，用于在模数转换的不同阶段期间提供参考信号，使得参考信号在至少两个阶段期间以基本上相同的方式缩放。

9. 发明授权

US08514306B2 Correlated double sampling circuit, image sensor including the same, and image processing system including the image sensor 有权
标题翻译：相关的双采样电路，包括图像传感器的图像传感器和图像处理系统
公开(公告)号：US08514306B2
公开(公告)日：2013-08-20
申请号：US12801999
申请日：2010-07-07
申请人： Wun-Ki Jung , Seog Heon Ham , Dong Hun Lee , Kwi Sung Yoo , Min Ho Kwon
发明人： Wun-Ki Jung , Seog Heon Ham , Dong Hun Lee , Kwi Sung Yoo , Min Ho Kwon
IPC分类号： H04N5/20
CPC分类号： H04N5/3575 , H04N5/374 , H04N5/378
摘要： A correlated double sampling (CDS) circuit is provided. The CDS circuit is configured to perform a CDS on a reset signal and an image signal during a CDS phase respectively. The CDS circuit includes a sampling circuit configured to output a difference between a correlated double sampled reset signal and a correlated double sampled image signal, and a feedback unit configured to feedback the difference output from the sampling circuit during a PGA phase to an input of the sampling circuit.
摘要翻译：提供了相关的双重采样（CDS）电路。 CDS电路被配置为在CDS阶段期间在复位信号和图像信号上执行CDS。 CDS电路包括：采样电路，被配置为输出相关的双采样复位信号和相关的双采样图像信号之间的差;以及反馈单元，被配置为将在PGA阶段期间从采样电路输出的差值反馈到采样电路。

10. 发明授权

US08159589B2 Image sensor for high-speed data readout 有权
标题翻译：用于高速数据读出的图像传感器
公开(公告)号：US08159589B2
公开(公告)日：2012-04-17
申请号：US12427214
申请日：2009-04-21
申请人： Seung Hyun Lim , Gun Hee Han , Seog Heon Ham
发明人： Seung Hyun Lim , Gun Hee Han , Seog Heon Ham
IPC分类号： H04N5/335
CPC分类号： H04N5/37455 , G11C7/16
摘要： An image sensor for high-speed data readout is provided. The image sensor includes a line memory block temporarily storing a digital signal in unit of lines which is generated based on an analog signal output from a pixel array. The line memory block includes a plurality of line memories, a plurality of data line pairs respectively connecting the line memories to a sense amplifying unit, and a plurality of data line prechargers each including at least two precharge units separately connected with a corresponding one of the data line pairs to precharge the corresponding data line pair with a predetermined precharge voltage. Accordingly, the image sensor performs high-speed digital signal readout based on precharge operation of the data line prechargers.
摘要翻译：提供了用于高速数据读出的图像传感器。该图像传感器包括一个行存储块，其临时存储基于从像素阵列输出的模拟信号产生的行单位的数字信号。行存储块包括多个行存储器，分别将行存储器连接到读出放大单元的多个数据线对，以及多个数据线预充电器，每个数据线预充电器包括分别与相应的一个数据线对以预定的预充电电压对相应的数据线对进行预充电。因此，图像传感器基于数据线预充电器的预充电操作来执行高速数字信号读出。

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