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    • 3. 发明授权
    • Cooking appliance
    • 烹饪用具
    • US08826809B2
    • 2014-09-09
    • US13318078
    • 2009-09-09
    • Young Jun Lee
    • Young Jun Lee
    • A47J37/10H05B3/10H05B3/16H05B3/70
    • H05B3/70
    • A cooking appliance includes: an input part for inputting manipulations for cooking; a cooking grill formed with a controller for outputting a control signal according to the input from the input part and a grill section for contacting food; and a panel heater in the shape of a panel formed in the cooking grill to be controlled by the controller for supplying heat to the grill section, wherein the heat of the panel heater is transmitted concentratedly to the grill section of the cooking grill and the grill section is heated concentratedly so as to cook the food, thereby minimizing the loss of heat and making grill marks appear more clearly on the object.
    • 烹饪器具包括:用于输入烹调操作的输入部分; 烹饪格栅,其形成有控制器,用于根据来自输入部分的输入和用于接触食物的格栅部分输出控制信号; 以及形成在烹饪格栅中的面板形式的面板加热器,由控制器控制,用于向烤架部分供热,其中面板加热器的热量集中地传送到烹饪格栅和格栅的格栅部分 该部分被集中地加热以便烹饪食物,从而使热量的损失最小化,并使得烧烤标记在物体上更清楚地显现。
    • 6. 发明申请
    • DRIVING CIRCUIT OF PLASMA DISPLAY PANEL AND DRIVING METHOD THEREOF
    • 等离子显示面板的驱动电路及其驱动方法
    • US20100194729A1
    • 2010-08-05
    • US12733717
    • 2008-09-19
    • Yong Duk KimYoung Jun LeeSu Sam Choi
    • Yong Duk KimYoung Jun LeeSu Sam Choi
    • G06F3/038
    • G09G3/294G09G3/2927G09G3/2965G09G2310/066
    • Disclosed are a driving circuit of a plasma display panel (PDP) driving circuit and a driving method thereof, which can simplify the driving circuit and stably secure a sustain discharge waveform. The PDP includes a first electrode applying a ramp-up voltage, a ramp-down voltage, a scan pulse voltage and a sustain discharge voltage; a second electrode applying a ground voltage GND and a level voltage of a second electrode; and a third electrode applying a data voltage for selecting discharge cells in an address period. In the driving method using a driving waveform divided into a reset period, an address period and a sustain period, positive and negative sustain discharge voltages are alternately applied to the first electrode and the ground voltage GND is applied to the second electrode in the sustain period.
    • 公开了等离子体显示面板(PDP)驱动电路的驱动电路及其驱动方法,其可以简化驱动电路并稳定地确保维持放电波形。 PDP包括施加斜升电压,斜降电压,扫描脉冲电压和维持放电电压的第一电极; 施加接地电压GND的第二电极和第二电极的电平电压; 以及在寻址周期中施加用于选择放电单元的数据电压的第三电极。 在使用划分为复位周期,寻址周期和维持期间的驱动波形的驱动方法中,将正,负维持放电电压交替施加到第一电极,并且在维持周期中向第二电极施加接地电压GND 。
    • 8. 发明授权
    • Method for fabricating dynamic random access memory cell
    • 制造动态随机存取存储单元的方法
    • US06281073B1
    • 2001-08-28
    • US09617312
    • 2000-07-14
    • Young Jun Lee
    • Young Jun Lee
    • H01L218242
    • H01L27/10855H01L27/10885H01L27/10888H01L28/91
    • The present invention relates to a method for fabricating a semiconductor device, and in particular to a method for fabricating a bit line and a capacitor of a DRAM cell including: a step of forming contact holes on a first insulation film formed on a semiconductor substrate; a step of forming plugs in the contact hole; a step of forming a contact hole on a second insulation film formed on the first insulation film; a step of forming a bit line and a third insulation film pattern on the second insulation film; a step of forming spacers at the side portions of the third insulation film pattern and the contact holes; a step of forming a fourth insulation film pattern; a step of sequentially forming a third conductive film and a fifth insulation film; a step of removing the third conductive film and the fifth insulation film in order to expose the upper surface of the fourth insulation film pattern; a step of removing the fourth insulation film and the fifth insulation film; and a step of sequentially forming a sixth insulation film and a fourth conductive film.
    • 本发明涉及一种用于制造半导体器件的方法,特别涉及一种用于制造DRAM单元的位线和电容器的方法,包括:在形成在半导体衬底上的第一绝缘膜上形成接触孔的步骤; 在接触孔中形成插塞的步骤; 在形成在第一绝缘膜上的第二绝缘膜上形成接触孔的步骤; 在所述第二绝缘膜上形成位线和第三绝缘膜图案的步骤; 在第三绝缘膜图案和接触孔的侧部形成间隔物的步骤; 形成第四绝缘膜图案的步骤; 依次形成第三导电膜和第五绝缘膜的步骤; 去除第三导电膜和第五绝缘膜以便暴露第四绝缘膜图案的上表面的步骤; 去除第四绝缘膜和第五绝缘膜的步骤; 以及顺序地形成第六绝缘膜和第四导电膜的步骤。