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    • 2. 发明授权
    • Method of manufacturing CMOS device with implantation shielding layer
    • 制造具有植入屏蔽层的CMOS器件的方法
    • US06750123B2
    • 2004-06-15
    • US09847288
    • 2001-05-03
    • Yasuaki Kawai
    • Yasuaki Kawai
    • H01L21425
    • H01L29/66772H01L29/78618
    • A shielding layer 23 is selectively formed on a single crystal silicon layer, an active area 25 is formed in the single crystal silicon layer by using the shielding layer 23 as a mask and an impurity layer 26 is formed at the edges at the sides of the active area 25 by using the shielding layer 23 as a mask and implanting an impurity diagonally from above. As a result, since an impurity layer can be formed by implanting ions of the impurity at the edges at the sides of the active area even when the size of the active area is reduced to the absolute limit, the occurrence of the parasitic transistor phenomenon or the edge transistor phenomenon along the edges at the sides of the active area can be prevented.
    • 在单晶硅层上选择性地形成屏蔽层23,通过使用屏蔽层23作为掩模在单晶硅层中形成有源区25,并且在该层的边的边缘处形成杂质层26 通过使用屏蔽层23作为掩模并且从上方对角地注入杂质来生成有源区25。 结果,由于可以通过在有源区的侧面的边缘处注入杂质的离子来形成杂质层,即使当有源区的尺寸减小到绝对极限时,发生寄生晶体管现象或 可以防止沿着有效区域的边缘的边缘的边缘晶体管现象。