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1. 发明授权

US07514343B2 Method for manufacturing SIMOX wafer and SIMOX wafer 失效
标题翻译：制造SIMOX晶圆和SIMOX晶圆的方法
公开(公告)号：US07514343B2
公开(公告)日：2009-04-07
申请号：US11450562
申请日：2006-06-08
申请人： Yoshiro Aoki , Yukio Komatsu , Tetsuya Nakai , Seiichi Nakamura
发明人： Yoshiro Aoki , Yukio Komatsu , Tetsuya Nakai , Seiichi Nakamura
IPC分类号： H01L21/425
CPC分类号： H01L21/26533 , H01L21/76243
摘要： This method for manufacturing a SIMOX wafer includes: heating a silicon wafer to 300° C. or more and implanting oxygen ions so as to form a high oxygen concentration layer within the silicon wafer; subjecting the silicon wafer to a cooling to less than 300° C. and an implanting of oxygen ions so as to form an amorphous layer; and subjecting the silicon wafer to a heat-treating in a mixed gas atmosphere containing oxygen so as to form a buried oxide layer. In the forming of the buried oxide layer, a starting temperature is less than 1350° C. and a maximum temperature is 1350° C. or more. This SIMOX wafer is manufactured by the above method and includes a BOX layer and a SOI layer on the BOX layer. The BOX layer has a thickness of 1300 Å or more and a breakdown voltage of 7 MV/cm or more, and the surface of the SOI layer and the interface between the SOI layer and the BOX layer have a roughness over a 10-μm square area of 4 Å rms or less.
摘要翻译：该制造SIMOX晶片的方法包括：将硅晶片加热至300℃以上并注入氧离子以在硅晶片内形成高氧浓度层; 使硅晶片冷却至小于300℃，并注入氧离子以形成非晶层; 并在含氧气的混合气体气氛中对硅晶片进行热处理，以形成掩埋氧化物层。在掩埋氧化物层的形成中，起始温度低于1350℃，最高温度为1350℃以上。该SIMOX晶片通过上述方法制造，并且在BOX层上包括BOX层和SOI层。 BOX层的厚度为1300以上，击穿电压为7MV / cm以上，SOI层的表面和SOI层与BOX层之间的界面的平均粗糙度为10μm 面积为4Årms以下。

2. 发明申请

US20070178680A1 Method for Manufacturing Simox Wafer 失效
标题翻译：制造Simox晶圆的方法
公开(公告)号：US20070178680A1
公开(公告)日：2007-08-02
申请号：US11670636
申请日：2007-02-02
申请人： Yoshiro Aoki , Yukio Komatsu , Tetsuya Nakai , Seiichi Nakamura
发明人： Yoshiro Aoki , Yukio Komatsu , Tetsuya Nakai , Seiichi Nakamura
IPC分类号： H01L21/425 , H01L21/31
CPC分类号： H01L21/76243
摘要： A SIMOX wafer having a BOX layer with a thin film thickness is obtained without a reduction in productivity or deterioration in quality. In a method for manufacturing a SIMOX wafer comprising: a step of forming a first ion-implanted layer in a silicon wafer; a step of forming a second ion-implanted layer that is in an amorphous state; and a high-temperature heat treatment step of maintaining the wafer in an oxygen contained atmosphere at a temperature that is not lower than 1300° C. but less than a silicon melting point for 6 to 36 hours to change the first and the second ion-implanted layers into a BOX layer, a gas containing chlorine that is not less than 0.1 volume % but less than 1.0 volume % is mixed into an atmosphere during temperature elevation in the high-temperature heat treatment.
摘要翻译：获得具有薄膜厚度的BOX层的SIMOX晶片，而不会降低生产率或质量劣化。一种用于制造SIMOX晶片的方法，包括：在硅晶片中形成第一离子注入层的步骤; 形成处于非晶态的第二离子注入层的步骤; 以及将晶片保持在含氧气氛中的不低于1300℃但小于硅熔点6〜36小时的高温热处理步骤，以改变第一和第二离子交换树脂，将注入层置于BOX层中，在高温热处理的升温过程中将含有不少于0.1体积％但小于1.0体积％的氯的气体混入大气中。

3. 发明授权

US07807545B2 Method for manufacturing SIMOX wafer 失效
标题翻译：制造SIMOX晶圆的方法
公开(公告)号：US07807545B2
公开(公告)日：2010-10-05
申请号：US11670636
申请日：2007-02-02
申请人： Yoshiro Aoki , Yukio Komatsu , Tetsuya Nakai , Seiichi Nakamura
发明人： Yoshiro Aoki , Yukio Komatsu , Tetsuya Nakai , Seiichi Nakamura
IPC分类号： H01L21/76 , H01L21/265 , H01L21/31 , H01L21/469
CPC分类号： H01L21/76243
摘要： A SIMOX wafer having a BOX layer with a thin film thickness is obtained without a reduction in productivity or deterioration in quality. In a method for manufacturing a SIMOX wafer comprising: a step of forming a first ion-implanted layer in a silicon wafer; a step of forming a second ion-implanted layer that is in an amorphous state; and a high-temperature heat treatment step of maintaining the wafer in an oxygen contained atmosphere at a temperature that is not lower than 1300° C. but less than a silicon melting point for 6 to 36 hours to change the first and the second ion-implanted layers into a BOX layer, a gas containing chlorine that is not less than 0.1 volume % but less than 1.0 volume % is mixed into an atmosphere during temperature elevation in the high-temperature heat treatment.
摘要翻译：获得具有薄膜厚度的BOX层的SIMOX晶片，而不会降低生产率或质量劣化。一种用于制造SIMOX晶片的方法，包括：在硅晶片中形成第一离子注入层的步骤; 形成处于非晶态的第二离子注入层的步骤; 以及将晶片保持在含氧气氛中的不低于1300℃但小于硅熔点6〜36小时的高温热处理步骤，以改变第一和第二离子交换树脂，将注入层置于BOX层中，在高温热处理的升温过程中将含有不少于0.1体积％但小于1.0体积％的氯的气体混入大气中。

4. 发明申请

US20090152671A1 METHOD FOR MANUFACTURING SIMOX WAFER AND SIMOX WAFER 审中-公开
标题翻译：制造SIMOX WAFER和SIMOX WAFER的方法
公开(公告)号：US20090152671A1
公开(公告)日：2009-06-18
申请号：US12389299
申请日：2009-02-19
申请人： Yoshiro Aoki , Yukio Komatsu , Tetsuya Nakai , Seiichi Nakamura
发明人： Yoshiro Aoki , Yukio Komatsu , Tetsuya Nakai , Seiichi Nakamura
IPC分类号： H01L27/12
CPC分类号： H01L21/26533 , H01L21/76243
摘要： This method for manufacturing a SIMOX wafer includes: heating a silicon wafer to 300° C. or more and implanting oxygen ions so as to form a high oxygen concentration layer within the silicon wafer; subjecting the silicon wafer to a cooling to less than 300° C. and an implanting of oxygen ions so as to form an amorphous layer; and subjecting the silicon wafer to a heat-treating in a mixed gas atmosphere containing oxygen so as to form a buried oxide layer. In the forming of the buried oxide layer, a starting temperature is less than 1350° C. and a maximum temperature is 1350° C. or more. This SIMOX wafer is manufactured by the above method and includes a BOX layer and a SOI layer on the BOX layer. The BOX layer has a thickness of 1300 Å or more and a breakdown voltage of 7 MV/cm or more, and the surface of the SOI layer and the interface between the SOI layer and the BOX layer have a roughness over a 10-μm square area of 4 Å rms or less.
摘要翻译：该制造SIMOX晶片的方法包括：将硅晶片加热至300℃以上并注入氧离子以在硅晶片内形成高氧浓度层; 使硅晶片冷却至小于300℃，并注入氧离子以形成非晶层; 并在含氧的混合气体气氛中对硅晶片进行热处理，以形成掩埋氧化物层。在掩埋氧化物层的形成中，起始温度低于1350℃，最高温度为1350℃以上。该SIMOX晶片通过上述方法制造，并且在BOX层上包括BOX层和SOI层。 BOX层的厚度为1300以上，击穿电压为7MV / cm以上，SOI层的表面和SOI层与BOX层之间的界面的平均粗糙度为10μm 面积为4Årms以下。

5. 发明申请

US20060281233A1 Method for manufacturing SIMOX wafer and SIMOX wafer 失效
公开(公告)号：US20060281233A1
公开(公告)日：2006-12-14
申请号：US11450562
申请日：2006-06-08
申请人： Yoshiro Aoki , Yukio Komatsu , Tetsuya Nakai , Seiichi Nakamura
发明人： Yoshiro Aoki , Yukio Komatsu , Tetsuya Nakai , Seiichi Nakamura
IPC分类号： H01L21/84
CPC分类号： H01L21/26533 , H01L21/76243
摘要： This method for manufacturing a SIMOX wafer includes: heating a silicon wafer to 300° C. or more and implanting oxygen ions so as to form a high oxygen concentration layer within the silicon wafer; subjecting the silicon wafer to a cooling to less than 300° C. and an implanting of oxygen ions so as to form an amorphous layer; and subjecting the silicon wafer to a heat-treating in a mixed gas atmosphere containing oxygen so as to form a buried oxide layer. In the forming of the buried oxide layer, a starting temperature is less than 1350° C. and a maximum temperature is 1350° C. or more. This SIMOX wafer is manufactured by the above method and includes a BOX layer and a SOI layer on the BOX layer. The BOX layer has a thickness of 1300 Å or more and a breakdown voltage of 7 MV/cm or more, and the surface of the SOI layer and the interface between the SOI layer and the BOX layer have a roughness over a 10-μm square area of 4 Å rms or less.

6. 发明申请

US20060228492A1 Method for manufacturing SIMOX wafer 审中-公开
标题翻译：制造SIMOX晶圆的方法
公开(公告)号：US20060228492A1
公开(公告)日：2006-10-12
申请号：US11100610
申请日：2005-04-07
申请人： Yoshiro Aoki , Mitsuru Sudo , Tetsuya Nakai
发明人： Yoshiro Aoki , Mitsuru Sudo , Tetsuya Nakai
IPC分类号： C23C14/00 , B05D3/02
CPC分类号： C23C8/80 , C23C8/12 , C23C14/48 , C30B29/06 , C30B33/005 , H01L21/76243
摘要： In the method for manufacturing a SIMOX wafer, oxygen ions are implanted into a silicon wafer, then the silicon wafer is subjected to a prescribed heat treatment so as to form a buried oxide layer in the silicon wafer. The prescribed heat treatment includes: a step of ramping up a temperature of the silicon wafer in a low oxygen partial pressure gas atmosphere having an oxygen partial pressure ratio of less than 5%; either or both of a step of oxidizing the silicon wafer in a high oxygen partial pressure gas atmosphere having an oxygen partial pressure ratio of 5% or more and a step of annealing the silicon wafer in a low oxygen partial pressure gas atmosphere having an oxygen partial pressure ratio of less than 5%; and a step of ramping down the temperature of the silicon wafer in a low oxygen partial pressure gas atmosphere having an oxygen partial pressure ratio of less than 5%. A hydrogen chloride gas is mixed with the low oxygen partial pressure gas having an oxygen partial pressure ratio of less than 5% in at least one step from among the ramp-up step, the anneal step and the ramp-down step.
摘要翻译：在制造SIMOX晶片的方法中，将氧离子注入到硅晶片中，然后对硅晶片进行规定的热处理，以在硅晶片中形成掩埋氧化物层。规定的热处理包括：在氧分压比小于5％的低氧分压气氛中升高硅晶片的温度的步骤; 在氧分压比为5％以上的高氧分压气氛中氧化硅晶片的步骤中的一个或两个，以及在具有氧部分的低氧分压气氛中退火硅晶片的步骤压力比小于5％; 以及在氧分压比小于5％的低氧分压气体气氛中降低硅晶片的温度的步骤。从斜坡上升步骤，退火步骤和斜坡下降步骤至少一个步骤，将氯化氢气体与氧分压比小于5％的低氧分压气体混合。

7. 发明授权

US07655315B2 SOI substrate, silicon substrate therefor and it's manufacturing method 有权
标题翻译： SOI衬底，硅衬底及其制造方法
公开(公告)号：US07655315B2
公开(公告)日：2010-02-02
申请号：US11331216
申请日：2006-01-13
申请人： Eiji Kamiyama , Seiichi Nakamura , Tetsuya Nakai
发明人： Eiji Kamiyama , Seiichi Nakamura , Tetsuya Nakai
IPC分类号： B32B13/04 , B32B9/00 , B32B19/00
CPC分类号： H01L21/76243
摘要： A silicon wafer includes a principal face for forming electronic devices; an end region; and a tapered region which is located between the principal face and the end region, in which the thickness of the silicon wafer is gradually reduced, and which has a slope that makes an angle of greater than zero degree and less than 9.5 degrees or an angle of greater than 19 degrees with the principal face. An SOI wafer prepared by forming a buried oxide layer in a silicon wafer includes a principal face, end region, and tapered region that are substantially the same as those described above. A method for manufacturing an SOI wafer includes the steps of implanting oxygen ions into a silicon wafer; and heat-treating the resulting silicon wafer such that a buried oxide layer is formed in the silicon wafer.
摘要翻译：硅晶片包括用于形成电子器件的主面; 末端区域以及位于主面和端部区域之间的锥形区域，其中硅晶片的厚度逐渐减小，并且具有大于零度且小于9.5度的角度的倾斜度或角度与主面大于19度。通过在硅晶片中形成掩埋氧化物层制备的SOI晶片包括与上述基本相同的主面，端部区域和锥形区域。一种制造SOI晶片的方法包括将氧离子注入到硅晶片中的步骤; 并对所得到的硅晶片进行热处理，使得在硅晶片中形成掩埋氧化物层。

8. 发明授权

US07838387B2 Method for manufacturing SOI wafer 失效
标题翻译：制造SOI晶圆的方法
公开(公告)号：US07838387B2
公开(公告)日：2010-11-23
申请号：US12118928
申请日：2008-05-12
申请人： Eiji Kamiyama , Seiichi Nakamura , Tetsuya Nakai
发明人： Eiji Kamiyama , Seiichi Nakamura , Tetsuya Nakai
IPC分类号： H01L21/762
CPC分类号： H01L21/76243 , Y10S438/978
摘要： A silicon wafer includes a principal face for forming electronic devices; an end region; and a tapered region which is located between the principal face and the end region, in which the thickness of the silicon wafer is gradually reduced, and which has a slope that makes an angle of greater than zero degree and less than 9.5 degrees or an angle of greater than 19 degrees with the principal face. An SOI wafer prepared by forming a buried oxide layer in a silicon wafer includes a principal face, end region, and tapered region that are substantially the same as those described above. A method for manufacturing an SOI wafer includes the steps of implanting oxygen ions into a silicon wafer; and heat-treating the resulting silicon wafer such that a buried oxide layer is formed in the silicon wafer.
摘要翻译：硅晶片包括用于形成电子器件的主面; 末端区域以及位于主面和端部区域之间的锥形区域，其中硅晶片的厚度逐渐减小，并且具有大于零度且小于9.5度的角度的倾斜度或角度与主面大于19度。通过在硅晶片中形成掩埋氧化物层制备的SOI晶片包括与上述基本相同的主面，端部区域和锥形区域。一种制造SOI晶片的方法包括将氧离子注入到硅晶片中的步骤; 并对所得到的硅晶片进行热处理，使得在硅晶片中形成掩埋氧化物层。

9. 发明申请

US20080213989A1 SILICON WAFER FOR MANUFACTURING SOI WAFER, SOI WAFER, AND METHOD FOR MANUFACTURING SOI WAFER 失效
标题翻译：用于制造SOI波形的硅波形，SOI波形和制造SOI波形的方法
公开(公告)号：US20080213989A1
公开(公告)日：2008-09-04
申请号：US12118928
申请日：2008-05-12
申请人： Eiji Kamiyama , Seiichi Nakamura , Tetsuya Nakai
发明人： Eiji Kamiyama , Seiichi Nakamura , Tetsuya Nakai
IPC分类号： H01L21/425
CPC分类号： H01L21/76243 , Y10S438/978
摘要： A silicon wafer includes a principal face for forming electronic devices; an end region; and a tapered region which is located between the principal face and the end region, in which the thickness of the silicon wafer is gradually reduced, and which has a slope that makes an angle of greater than zero degree and less than 9.5 degrees or an angle of greater than 19 degrees with the principal face. An SOI wafer prepared by forming a buried oxide layer in a silicon wafer includes a principal face, end region, and tapered region that are substantially the same as those described above. A method for manufacturing an SOI wafer includes the steps of implanting oxygen ions into a silicon wafer; and heat-treating the resulting silicon wafer such that a buried oxide layer is formed in the silicon wafer.
摘要翻译：硅晶片包括用于形成电子器件的主面; 末端区域以及位于主面和端部区域之间的锥形区域，其中硅晶片的厚度逐渐减小，并且具有大于零度且小于9.5度的角度的倾斜度或角度与主面大于19度。通过在硅晶片中形成掩埋氧化物层制备的SOI晶片包括与上述基本相同的主面，端部区域和锥形区域。一种制造SOI晶片的方法包括将氧离子注入到硅晶片中的步骤; 并对所得到的硅晶片进行热处理，使得在硅晶片中形成掩埋氧化物层。

10. 发明授权

US08222124B2 Method for manufacturing SIMOX wafer and SIMOX wafer 失效
标题翻译：制造SIMOX晶圆和SIMOX晶圆的方法
公开(公告)号：US08222124B2
公开(公告)日：2012-07-17
申请号：US12822323
申请日：2010-06-24
申请人： Tetsuya Nakai
发明人： Tetsuya Nakai
IPC分类号： H01L21/266 , H01L21/426
CPC分类号： H01L21/76243
摘要： This method for manufacturing a SIMOX wafer includes: forming a mask layer on one surface side of a silicon single crystal wafer, which has an opening on a region where a BOX layer is to be formed; implanting oxygen ions through the opening of the mask layer into the silicon single crystal wafer to a predetermined depth, and locally forming an oxygen implantation region; annealing the silicon single crystal wafer with the mask layer, and oxidizing the oxygen implantation region so as to form the BOX layer; and removing a coated oxide film that covers the whole silicon single crystal wafer which is formed in the annealing of the silicon single crystal wafer, wherein the mask layer has a lamination comprising an oxide film and either one or both of a polysilicon film and an amorphous silicon film.
摘要翻译：该SIMOX晶片的制造方法包括在形成BOX层的区域上具有开口的硅单晶晶片的一个表面侧形成掩模层; 将氧离子通过掩模层的开口注入硅单晶晶片至预定深度，并局部形成氧注入区; 用掩模层退火硅单晶晶片，氧化氧注入区域以形成BOX层; 并且除去覆盖在单晶硅晶片的退火中形成的整个硅单晶晶片的涂覆氧化物膜，其中所述掩模层具有包括氧化物膜和多晶硅膜和非晶形态之一或两者的层压体硅膜。

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