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1. 发明授权

US09256835B2 Information processing apparatus enabling discriminator to learn and method thereof 有权
标题翻译：使鉴别器学习的信息处理装置及其方法
公开(公告)号：US09256835B2
公开(公告)日：2016-02-09
申请号：US12683982
申请日：2010-01-07
申请人： Yoshinori Ito , Katsuhiko Mori , Takahisa Yamamoto , Osamu Nomura , Masami Kato
发明人： Yoshinori Ito , Katsuhiko Mori , Takahisa Yamamoto , Osamu Nomura , Masami Kato
IPC分类号： G06F15/18 , G06N99/00 , G06K9/00 , G06K9/62
CPC分类号： G06N99/005 , G06K9/00248 , G06K9/6257
摘要： An information processing apparatus and method enables a pattern discriminator to learn. The apparatus establishes a branch structure appropriate for learning a discriminator having the branch structure without increasing processing time. The apparatus includes a preliminary learning unit to learn a preliminary discriminator for a respective one of a plurality of combinations of variations in variation categories in a discrimination target pattern. A branch structure determination unit is provided to perform discrimination processing using the preliminary discriminator and to determine a branch structure of a main discriminator based on a result of the discrimination processing. A main learning unit is included to learn the main discriminator based on the branch structure.
摘要翻译：信息处理装置和方法使图案鉴别器能够学习。该装置建立适于在不增加处理时间的情况下学习具有分支结构的鉴别器的分支结构。该装置包括初步学习单元，用于在鉴别目标图形中学习变化类别的变化的多个组合中的相应一个的初步鉴别器。分支结构确定单元被提供以使用初步鉴别器执行鉴别处理，并且基于鉴别处理的结果来确定主鉴别器的分支结构。包括一个主要学习单元，以学习基于分支结构的主要鉴别器。

2. 发明授权

US08472721B2 Pattern identification unit generation method, information processing apparatus, computer program, and storage medium 有权
标题翻译：模式识别单元生成方法，信息处理装置，计算机程序和存储介质
公开(公告)号：US08472721B2
公开(公告)日：2013-06-25
申请号：US12330514
申请日：2008-12-09
申请人： Yoshinori Ito , Masami Kato , Takahisa Yamamoto , Katsuhiko Mori , Osamu Nomura
发明人： Yoshinori Ito , Masami Kato , Takahisa Yamamoto , Katsuhiko Mori , Osamu Nomura
IPC分类号： G06K9/00 , G06K9/62
CPC分类号： G06K9/6256 , G06K9/00973
摘要： A pattern identification unit generation method of generating a pattern identification unit in which a weak discriminator array obtained by cascade-connecting a plurality of weak discriminators branches, and weak discriminator arrays are connected to respective arms after branching, evaluates based on a processing result obtained by inputting a set of evaluation data to the weak discriminator array whether or not a weak discriminator array after branching reaches the number of stages to be connected. The number of stages of weak discriminators to be connected without branching as the weak discriminator array is determined based on this evaluation result.
摘要翻译：一种图案识别单元产生方法，其产生一个模式识别单元，其中通过级联连接多个弱鉴别器分支而获得的弱鉴别器阵列和弱鉴别器阵列在分支之后连接到相应的臂，根据由向微弱鉴别器阵列输入一组评估数据，判断分支后的弱鉴别器阵列是否达到要连接的级数。基于该评估结果确定要连接无分支的弱鉴别器的级数作为弱鉴别器阵列的级数。

3. 发明申请

US20110010317A1 INFORMATION PROCESSING APPARATUS ENABLING DISCRIMINATOR TO LEARN AND METHOD THEREOF 有权
标题翻译：信息处理设备使得辨识者了解其方法
公开(公告)号：US20110010317A1
公开(公告)日：2011-01-13
申请号：US12683982
申请日：2010-01-07
申请人： Yoshinori Ito , Katsuhiko Mori , Takahisa Yamamoto , Osamu Nomura , Masami Kato
发明人： Yoshinori Ito , Katsuhiko Mori , Takahisa Yamamoto , Osamu Nomura , Masami Kato
IPC分类号： G06F15/18
CPC分类号： G06N99/005 , G06K9/00248 , G06K9/6257
摘要： An information processing apparatus includes a preliminary learning unit configured to learn a preliminary discriminator for a respective one of a plurality of combinations of variations in variation categories in a discrimination target pattern, a branch structure determination unit configured to perform discrimination processing using the preliminary discriminator and to determine a branch structure of a main discriminator based on a result of the discrimination processing, and a main learning unit configured to learn the main discriminator based on the branch structure.
摘要翻译：一种信息处理设备，包括：初步学习单元，被配置为在鉴别目标图形中学习变化类别的变化的多个组合的各自的初步鉴别器;分支结构确定单元，被配置为使用所述初步鉴别器进行鉴别处理;以及基于鉴别处理的结果来确定主鉴别器的分支结构，以及主学习单元，被配置为基于分支结构学习主鉴别器。

4. 发明申请

US20090157707A1 PATTERN IDENTIFICATION UNIT GENERATION METHOD, INFORMATION PROCESSING APPARATUS, COMPUTER PROGRAM, AND STORAGE MEDIUM 有权
标题翻译：模式识别单元生成方法，信息处理装置，计算机程序和存储介质
公开(公告)号：US20090157707A1
公开(公告)日：2009-06-18
申请号：US12330514
申请日：2008-12-09
申请人： Yoshinori Ito , Masami Kato , Takahisa Yamamoto , Katsuhiko Mori , Osamu Nomura
发明人： Yoshinori Ito , Masami Kato , Takahisa Yamamoto , Katsuhiko Mori , Osamu Nomura
IPC分类号： G06F17/30
CPC分类号： G06K9/6256 , G06K9/00973
摘要： A pattern identification unit generation method of generating a pattern identification unit in which a weak discriminator array obtained by cascade-connecting a plurality of weak discriminators branches, and weak discriminator arrays are connected to respective arms after branching, evaluates based on a processing result obtained by inputting a set of evaluation data to the weak discriminator array whether or not a weak discriminator array after branching reaches the number of stages to be connected. The number of stages of weak discriminators to be connected without branching as the weak discriminator array is determined based on this evaluation result.
摘要翻译：一种图案识别单元产生方法，其产生一个模式识别单元，其中通过级联连接多个弱鉴别器分支而获得的弱鉴别器阵列和弱鉴别器阵列在分支之后连接到相应的臂，根据由向微弱鉴别器阵列输入一组评估数据，判断分支后的弱鉴别器阵列是否达到要连接的级数。基于该评估结果确定要连接无分支的弱鉴别器的级数作为弱鉴别器阵列的级数。

5. 发明授权

US08385649B2 Information processing apparatus and method for detecting object in image data 有权
标题翻译：用于检测图像数据中的对象的信息处理装置和方法
公开(公告)号：US08385649B2
公开(公告)日：2013-02-26
申请号：US12765190
申请日：2010-04-22
申请人： Masami Kato , Yoshinori Ito , Osamu Nomura , Takahisa Yamamoto
发明人： Masami Kato , Yoshinori Ito , Osamu Nomura , Takahisa Yamamoto
IPC分类号： G06K9/62
CPC分类号： G06K9/6257 , G06K9/00986 , G06K9/4604 , G06K9/4614
摘要： Learning is sequentially executed with respect to weak discriminators based on learning data held in a storage device. Upon learning, an evaluation value for the weak discriminator is calculated. It is discriminated, based on a shift of the evaluation value, whether or not the learning is overlearning. If it is discriminated that the learning is overlearning, new learning data is added. Thus, the overlearning is easily detected and the learning is efficiently executed.
摘要翻译：基于保存在存储装置中的学习数据，相对于弱识别器依次执行学习。在学习时，计算弱鉴别器的评估值。基于评估值的转移，是否对学习过度学习进行歧视。如果歧视学习过度学习，则添加新的学习数据。因此，容易检测到过度学习，并且有效地执行学习。

6. 发明申请

US20100272351A1 INFORMATION PROCESSING APPARATUS AND METHOD FOR DETECTING OBJECT IN IMAGE DATA 有权
标题翻译：用于检测图像数据中的对象的信息处理装置和方法
公开(公告)号：US20100272351A1
公开(公告)日：2010-10-28
申请号：US12765190
申请日：2010-04-22
申请人： Masami Kato , Yoshinori Ito , Osamu Nomura , Takahisa Yamamoto
发明人： Masami Kato , Yoshinori Ito , Osamu Nomura , Takahisa Yamamoto
IPC分类号： G06K9/62
CPC分类号： G06K9/6257 , G06K9/00986 , G06K9/4604 , G06K9/4614
摘要： Learning is sequentially executed with respect to weak discriminators based on learning data held in a storage device. Upon learning, an evaluation value for the weak discriminator is calculated. It is discriminated, based on a shift of the evaluation value, whether or not the learning is overlearning. If it is discriminated that the learning is overlearning, new learning data is added. Thus, the overlearning is easily detected and the learning is efficiently executed.
摘要翻译：基于保存在存储装置中的学习数据，相对于弱识别器依次执行学习。在学习时，计算弱鉴别器的评估值。基于评估值的转移，是否对学习过度学习进行歧视。如果歧视学习过度学习，则添加新的学习数据。因此，容易检测到过度学习，并且有效地执行学习。

7. 发明授权

US07039233B2 Pattern recognition apparatus for detecting predetermined pattern contained in input signal 有权
标题翻译：用于检测包含在输入信号中的预定图案的图案识别装置
公开(公告)号：US07039233B2
公开(公告)日：2006-05-02
申请号：US10156118
申请日：2002-05-29
申请人： Katsuhiko Mori , Masakazu Matsugu , Osamu Nomura
发明人： Katsuhiko Mori , Masakazu Matsugu , Osamu Nomura
IPC分类号： G06K9/00 , G06K9/54
CPC分类号： G06K9/4628 , G06K9/00973
摘要： A pattern recognition apparatus for detecting a predetermined pattern contained in an input signal is provided with plural detecting processing parts and for detecting respectively different features for a same input, plural integrating processing parts for spatially integrating, for each process results, the features detected by the plural detecting processing parts, plural detecting memories for retaining the process results of the detecting processing parts, plural integrating memories for retaining the process results of the integrating processing parts, a global data line 1030 to which all the predetermined detecting processing parts and all the predetermined integrating memories are connected at a certain timing, and plural local data lines each of which is connected to a predetermined set of the detecting processing parts, the integrating processing parts and the detecting memory.
摘要翻译：用于检测包含在输入信号中的预定图案的模式识别装置设置有多个检测处理部分，并且用于分别检测相同输入的不同特征，用于对于每个处理结果来对每个处理结果进行空间积分的多个积分处理部分，多个检测处理部分，用于保持检测处理部分的处理结果的多个检测存储器，用于保持积分处理部分的处理结果的多个积分存储器，全部数据线1030，所有预定检测处理部分和全部预定检测处理部分积分存储器在一定时间连接，多个本地数据线连接到预定的检测处理部分组，积分处理部分和检测存储器。

8. 发明授权

US07088860B2 Dynamically reconfigurable signal processing circuit, pattern recognition apparatus, and image processing apparatus 有权
公开(公告)号：US07088860B2
公开(公告)日：2006-08-08
申请号：US10105309
申请日：2002-03-26
申请人： Masakazu Matsugu , Katsuhiko Mori , Osamu Nomura
发明人： Masakazu Matsugu , Katsuhiko Mori , Osamu Nomura
IPC分类号： G06K9/00
CPC分类号： G06K9/4628 , G06K9/00281 , G06K9/00973 , G06N3/049 , G06N3/063
摘要： A plurality of signal processing functions are achieved with the same arithmetic processing circuit by controlling wiring arrangements or signal modulation in accordance with a predetermined arrangement control signal that is output based on circuit arrangement information read from a circuit arrangement information storage unit. Hierarchical parallel processing is realized with small-scale circuit configuration. Further, detection of a predetermined feature and integration of the detection results can be efficiently performed.

9. 发明授权

US07512271B2 Dynamically reconfigurable signal processing circuit, pattern recognition apparatus, and image processing apparatus 有权
公开(公告)号：US07512271B2
公开(公告)日：2009-03-31
申请号：US11449780
申请日：2006-06-09
申请人： Masakazu Matsugu , Katsuhiko Mori , Osamu Nomura
发明人： Masakazu Matsugu , Katsuhiko Mori , Osamu Nomura
IPC分类号： G06K9/00
CPC分类号： G06K9/4628 , G06K9/00281 , G06K9/00973 , G06N3/049 , G06N3/063
摘要： A plurality of signal processing functions are achieved with the same arithmetic processing circuit by controlling wiring arrangements or signal modulation in accordance with a predetermined arrangement control signal that is output based on circuit arrangement information read from a circuit arrangement information storage unit. Hierarchical parallel processing is realized with small-scale circuit configuration. Further, detection of a predetermined feature and integration of the detection results can be efficiently performed.

10. 发明申请

US20060228027A1 Dynamically reconfigurable signal processing circuit, pattern recognition apparatus, and image processing apparatus 有权
公开(公告)号：US20060228027A1
公开(公告)日：2006-10-12
申请号：US11449780
申请日：2006-06-09
申请人： Masakazu Matsugu , Katsuhiko Mori , Osamu Nomura
发明人： Masakazu Matsugu , Katsuhiko Mori , Osamu Nomura
IPC分类号： G06K9/00
CPC分类号： G06K9/4628 , G06K9/00281 , G06K9/00973 , G06N3/049 , G06N3/063
摘要： A plurality of signal processing functions are achieved with the same arithmetic processing circuit by controlling wiring arrangements or signal modulation in accordance with a predetermined arrangement control signal that is output based on circuit arrangement information read from a circuit arrangement information storage unit. Hierarchical parallel processing is realized with small-scale circuit configuration. Further, detection of a predetermined feature and integration of the detection results can be efficiently performed.

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