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    • 6. 发明申请
    • ESD PROTECTIVE ELEMENT, SEMICONDUCTOR DEVICE, AND PLASMA DISPLAY
    • ESD保护元件,半导体器件和等离子体显示器
    • US20110169092A1
    • 2011-07-14
    • US12941616
    • 2010-11-08
    • Teruhisa IKUTAYoshinobu Satou
    • Teruhisa IKUTAYoshinobu Satou
    • H01L29/739
    • H01L27/0259H01L2924/0002H01L2924/00
    • The present invention mainly provides an ESD protective element which can be built in high voltage semiconductor integrated circuit devices without increasing the chip area. An ESD protective element according to one embodiment has a construction comprising a semiconductor layer, a first region of a first conduction type formed in the semiconductor layer, a first region of a second conduction type formed in the semiconductor layer away from the first region of the first conduction type, a second region of the second conduction type formed in the first region of the second conduction type and has a higher impurity concentration than it, and a second region of the first conduction type formed in the second region of the second conduction type and has a high impurity concentration. The first and second regions of the second conduction type are in an electrically floating state.
    • 本发明主要提供一种ESD保护元件,可以在不增加芯片面积的情况下内置在高压半导体集成电路器件中。 根据一个实施例的ESD保护元件具有包括半导体层,形成在半导体层中的第一导电类型的第一区域的第一区域,形成在半导体层中的远离第一区域的第二导电类型的第一区域 第一导电类型,第二导电类型的第二区域形成在第二导电类型的第一区域中并且具有比其高的杂质浓度,以及形成在第二导电类型的第二区域中的第一导电类型的第二区域 并且杂质浓度高。 第二导电类型的第一和第二区域处于电浮动状态。
    • 7. 发明授权
    • ESD protective element and plasma display including the ESD protective element
    • ESD保护元件和包括ESD保护元件的等离子体显示器
    • US08823106B2
    • 2014-09-02
    • US12941616
    • 2010-11-08
    • Teruhisa IkutaYoshinobu Satou
    • Teruhisa IkutaYoshinobu Satou
    • H01L23/62H01L27/02
    • H01L27/0259H01L2924/0002H01L2924/00
    • The present invention mainly provides an ESD protective element which can be built in high voltage semiconductor integrated circuit devices without increasing the chip area. An ESD protective element according to one embodiment has a construction comprising a semiconductor layer, a first region of a first conduction type formed in the semiconductor layer, a first region of a second conduction type formed in the semiconductor layer away from the first region of the first conduction type, a second region of the second conduction type formed in the first region of the second conduction type and has a higher impurity concentration than it, and a second region of the first conduction type formed in the second region of the second conduction type and has a high impurity concentration. The first and second regions of the second conduction type are in an electrically floating state.
    • 本发明主要提供一种ESD保护元件,可以在不增加芯片面积的情况下内置在高压半导体集成电路器件中。 根据一个实施例的ESD保护元件具有包括半导体层,形成在半导体层中的第一导电类型的第一区域的第一区域,形成在半导体层中的远离第一区域的第二导电类型的第一区域 第一导电类型,第二导电类型的第二区域形成在第二导电类型的第一区域中并且具有比其高的杂质浓度,以及形成在第二导电类型的第二区域中的第一导电类型的第二区域 并且杂质浓度高。 第二导电类型的第一和第二区域处于电浮动状态。