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    • 3. 发明授权
    • IC card
    • IC卡
    • US4748320A
    • 1988-05-31
    • US923216
    • 1986-10-27
    • Yoshikazu YorimotoMasashi Takahashi
    • Yoshikazu YorimotoMasashi Takahashi
    • B42D15/02B42D15/10G06F11/10G06F15/78G06F17/30G06K19/07G11C29/00G06K19/06
    • G11C29/765G06F15/7814G06F11/1068
    • In an IC (integrated circuit) card, a CPU (central processing unit) is connected to a data bus and an address bus. A data memory is connected to the data bus and the address bus. The data memory is a rewritable memory, such as EEPROM (electrically erasable programmable read only memory) or battery backed-up RAM (random access memory). The data memory is segmented into a predetermined number of sectors each consisting of predetermined bytes. An external processing device, such as a terminal device is connected to the data bus and the address bus, via a one-bit I/O line and a port. The terminal device supplies a processing instruction via the I/O line to the third port. The CPU receives the processing instruction via the data bus, analyzes the instruction, and reads out and executes the necessary program. The CPU supplies the results of each processing to the terminal device, by way of the data bus, the port and the I/O bus.
    • 在IC(集成电路)卡中,CPU(中央处理单元)连接到数据总线和地址总线。 数据存储器连接到数据总线和地址总线。 数据存储器是可重写存储器,例如EEPROM(电可擦除可编程只读存储器)或电池备份RAM(随机存取存储器)。 数据存储器被分割成预定数量的扇区,每个扇区由预定字节组成。 诸如终端设备的外部处理设备经由一位I / O线路和端口连接到数据总线和地址总线。 终端设备通过I / O线向第三端口提供处理指令。 CPU通过数据总线接收处理指令,分析指令,读出并执行必要的程序。 CPU通过数据总线,端口和I / O总线向终端设备提供每个处理的结果。