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1. 发明授权

US5731247A Method for manufacturing a semiconductor device including pre-oxidation process 失效
标题翻译：包括预氧化工艺的半导体器件的制造方法
公开(公告)号：US5731247A
公开(公告)日：1998-03-24
申请号：US498755
申请日：1995-07-06
申请人： Yoshihiro Ueno , Tsutomu Amai , Shuichi Samata
发明人： Yoshihiro Ueno , Tsutomu Amai , Shuichi Samata
IPC分类号： H01L21/70 , H01L21/02 , H01L21/28 , H01L21/306 , H01L21/316 , H01L21/322
CPC分类号： H01L21/28211 , H01L21/02046 , H01L21/02238 , H01L21/02255 , H01L21/02299 , H01L21/31662 , Y10S438/974
摘要： A method for manufacturing a semiconductor device can reduce a micro-roughness and does not change a construction and electric characteristics of elements formed in the semiconductor device. In the method for manufacturing the semiconductor device including a pre-oxidation process in which an oxide layer is first formed on a silicon wafer, and the oxide layer is secondly eliminated to eliminate impurities on a surface of the silicon wafer, a formation of the oxide layer in the pre-oxidation process is performed in an oxidization atmosphere including H.sub.2 O and gas including germanium hydride (german --GeH.sub.4 --). Since german (GeH.sub.4) is included in the oxidization atmosphere, it is possible to reduce a softening temperature of the silicon dioxide formed in pre-oxidation, thereby decreasing the micro-roughness on the surface of the silicon wafer. Furthermore, since it is possible to perform the pre-oxidation process in a low temperature and in a short time, there is no change of a construction and electric characteristics of elements formed in the semiconductor device.
摘要翻译：半导体器件的制造方法可以减小微粗糙度，并且不会改变形成在半导体器件中的元件的结构和电特性。在制造半导体器件的方法中，包括首先在硅晶片上形成氧化物层的预氧化工艺，并且第二次除去氧化物层以消除硅晶片表面上的杂质，形成氧化物包括H 2 O和包括氢化锗（锗-GeH 4 - ）在内的气体的氧化气氛中进行预氧化处理。由于锗（GeH 4）被包含在氧化气氛中，所以可以降低在预氧化中形成的二氧化硅的软化温度，从而降低硅晶片表面的微粗糙度。此外，由于可以在低温和短时间内进行预氧化处理，所以在半导体器件中形成的元件的结构和电特性没有变化。

2. 发明授权

US5738942A Semiconductor silicon wafer and process for producing it 失效
标题翻译：半导体硅晶片及其生产工艺
公开(公告)号：US5738942A
公开(公告)日：1998-04-14
申请号：US580926
申请日：1995-12-29
申请人： Atsuko Kubota , Masakatu Kojima , Norihiko Tsuchiya , Shuichi Samata , Masanori Numano , Yoshihiro Ueno
发明人： Atsuko Kubota , Masakatu Kojima , Norihiko Tsuchiya , Shuichi Samata , Masanori Numano , Yoshihiro Ueno
IPC分类号： H01L21/304 , C30B15/00 , C30B33/00 , H01L21/322 , H01L21/332 , B32B9/00 , H01L21/306 , H01L23/58 , H01L29/04
CPC分类号： C30B29/06 , C30B15/00 , C30B33/00 , H01L21/3221 , H01L21/3225 , H01L29/66393 , Y10S148/06 , Y10S148/061
摘要： Provided is a process for producing a semiconductor silicon wafer by which an intrinsic gettering effect can be improved and at the same time the top side can be made free from faults. A silicon ingot is produced and sliced to obtain silicon wafers. Then, a polycrystal silicon depositing film is formed on one side of a silicon wafer, which is subjected to a heat treatment in an inert gas, a reducing gas or a mixture thereof to discharge oxygen from the vicinity of the other side. Alternatively, after discharging oxygen from the silicon wafer by a heat treatment, a polycrystal silicon depositing film may be formed on one side of the silicon wafer.
摘要翻译：本发明提供一种半导体硅晶片的制造方法，其特征在于能够提高固有的吸杂效果，同时能够使上侧无缺陷。生产硅锭并切片以获得硅晶片。然后，在硅晶片的一侧上形成多晶硅沉积膜，该硅晶片在惰性气体，还原气体或其混合物中进行热处理，以从另一侧附近排出氧气。或者，在通过热处理从硅晶片中排出氧之后，可以在硅晶片的一侧上形成多晶硅沉积膜。

3. 发明授权

US5534294A Process for producing Semiconductor silicon wafer 失效
标题翻译：制造半导体硅片的工艺
公开(公告)号：US5534294A
公开(公告)日：1996-07-09
申请号：US279007
申请日：1994-07-22
申请人： Atsuko Kubota , Masakatu Kojima , Norihiko Tsuchiya , Shuichi Samata , Masanori Numano , Yoshihiro Ueno
发明人： Atsuko Kubota , Masakatu Kojima , Norihiko Tsuchiya , Shuichi Samata , Masanori Numano , Yoshihiro Ueno
IPC分类号： H01L21/304 , C30B15/00 , C30B33/00 , H01L21/322 , H01L21/332 , C23C16/24
CPC分类号： C30B29/06 , C30B15/00 , C30B33/00 , H01L21/3221 , H01L21/3225 , H01L29/66393 , Y10S148/06 , Y10S148/061
摘要： Provided is a process for producing a semiconductor silicon wafer by which an intrinsic gettering effect can be improved and at the same time the top side can be made free from faults. A silicon ingot is produced and sliced to obtain silicon wafers. Then, a polycrystal silicon depositing film is formed on one side of a silicon wafer, which is subjected to a heat treatment in an inert gas, a reducing gas or a mixture thereof to discharge oxygen from the vicinity of the other side. Alternatively, after discharging oxygen from the silicon wafer by a heat treatment, a polycrystal silicon depositing film may be formed on one side of the silicon wafer.
摘要翻译：本发明提供一种半导体硅晶片的制造方法，其特征在于能够提高固有的吸杂效果，同时能够使上侧无缺陷。生产硅锭并切片以获得硅晶片。然后，在硅晶片的一侧上形成多晶硅沉积膜，该硅晶片在惰性气体，还原气体或其混合物中进行热处理，以从另一侧附近排出氧气。或者，在通过热处理从硅晶片中排出氧之后，可以在硅晶片的一侧上形成多晶硅沉积膜。

4. 发明授权

US06944572B2 Apparatus for predicting life of rotary machine and equipment using the same 失效
标题翻译：用于预测旋转机器和使用其的设备的寿命的装置
公开(公告)号：US06944572B2
公开(公告)日：2005-09-13
申请号：US10752816
申请日：2004-01-08
申请人： Yukihiro Ushiku , Tsunetoshi Arikado , Shuichi Samata , Takashi Nakao , Yuuichi Mikata
发明人： Yukihiro Ushiku , Tsunetoshi Arikado , Shuichi Samata , Takashi Nakao , Yuuichi Mikata
IPC分类号： F04D27/00 , F04B37/16 , F04B49/06 , F04B49/10 , F04B51/00 , G01M13/00 , H01L21/00 , G06F101/21
CPC分类号： F04B51/00 , F04B49/065 , F04D19/04 , F04D27/001 , G01M13/00
摘要： An apparatus for predicting life expectancy of a rotary machine includes: a load recipe input module acquiring loading conditions of a rotary machine; a characterizing feature input module obtaining characterizing feature data of a rotary machine; and a life expectancy prediction module calculating life expectancy of the rotary machine in conformity with the loading conditions and the characterizing feature data.
摘要翻译：一种用于预测旋转机器的预期寿命的装置包括：负载配方输入模块，其获取旋转机器的负载条件; 特征特征输入模块获得旋转机器的特征特征数据; 以及根据负载条件和特征特征数据计算旋转机器的预期寿命的预期寿命预测模块。

5. 发明授权

US06885972B2 Method for predicting life span of rotary machine used in manufacturing apparatus and life predicting system 失效
标题翻译：用于生产设备和寿命预测系统的旋转机寿命预测方法
公开(公告)号：US06885972B2
公开(公告)日：2005-04-26
申请号：US10229005
申请日：2002-08-28
申请人： Shuichi Samata , Yukihiro Ushiku , Takeo Furuhata , Takashi Nakao , Ken Ishii
发明人： Shuichi Samata , Yukihiro Ushiku , Takeo Furuhata , Takashi Nakao , Ken Ishii
IPC分类号： F04B51/00 , G05B19/4065 , H01L21/02 , G06F19/00
CPC分类号： G05B19/4065 , G05B2219/37252 , Y02P90/86
摘要： A method for predicting life span of a rotary machine used in a manufacturing apparatus, includes: measuring rotary machine acceleration evaluation time series data with a sampling interval being less than a half the cycle of an analysis target frequency, a number of samplings being at least four times the analysis target frequency; generating evaluation diagnosis data based on variations in characteristics corresponding to the analysis target frequency by subjecting the evaluation time series data to frequency analysis; and determining the life span of the rotary machine using the evaluation diagnosis data.
摘要翻译：一种用于预测制造装置中使用的旋转机械的使用寿命的方法，包括：以取样间隔小于分析对象频率的周期的一半来测量旋转机械加速度评价时间序列数据，取样次数至少为四倍分析目标频率; 通过对评价时间序列数据进行频率分析，生成基于与分析对象频率对应的特性的变化的评价诊断数据; 以及使用评估诊断数据确定所述旋转机器的使用寿命。

6. 发明授权

US5508800A Semiconductor substrate, method of manufacturing semiconductor substrate and semiconductor device, and method of inspecting and evaluating semiconductor substrate 失效
标题翻译：半导体衬底，半导体衬底和半导体器件的制造方法以及半导体衬底的检查和评估方法
公开(公告)号：US5508800A
公开(公告)日：1996-04-16
申请号：US31924
申请日：1993-03-16
申请人： Moriya Miyashita , Hachiro Hiratsuka , Atsuko Kubota , Shuichi Samata , Masanori Numano , Hiroyuki Fukui
发明人： Moriya Miyashita , Hachiro Hiratsuka , Atsuko Kubota , Shuichi Samata , Masanori Numano , Hiroyuki Fukui
IPC分类号： H01L21/66 , G01N1/28 , G01N21/84 , G01N21/95 , H01L21/306 , G01N21/88
CPC分类号： H01L21/02046 , G01N21/9501 , H01L21/02019 , H01L21/02052 , H01L21/30608
摘要： There are provided a method of inspecting and evaluating semiconductor substrates, good quality semiconductor substrates, a method of manufacturing good quality semiconductor substrates, and a method of manufacturing semiconductor devices using good quality semiconductor substrates.A semiconductor substrate is processed with aqueous basic solution. In this process, the substrate is dipped in the aqueous solution or exposed to a vapor of the aqueous solution. With this process, the surface of the substrate is selectively etched. The substrate surface after the etching process is radiated with a laser beam to measure a light scattered point density. The quality of the substrate can be judged in accordance with the measured density. A thermal treatment may be carried out before or after processing the substrate with the aqueous basic solution. The thermal treatment considerably changes the fine defect density on the surface of the substrate. In accordance with such a change, the quality of the substrate may be judged. If a substrate judged as having a good quality is used, a semiconductor device having a good quality substrate can be obtained.
摘要翻译：提供了一种检查和评估半导体衬底，优质半导体衬底，制造优质半导体衬底的方法以及使用优质半导体衬底制造半导体器件的方法。用碱性水溶液处理半导体衬底。在该方法中，将基材浸渍在水溶液中或暴露于水溶液的蒸气中。通过该工艺，选择性地蚀刻衬底的表面。蚀刻处理后的基板表面用激光束照射以测量光散射点密度。可以根据测量的密度来判断基板的质量。热处理可以在用碱性水溶液处理基材之前或之后进行。热处理显着地改变了衬底表面上的细小缺陷密度。根据这样的变化，可以判断基板的质量。如果使用判断为质量好的基板，则可以获得具有优质基板的半导体器件。

7. 发明授权

US5291058A Semiconductor device silicon via fill formed in multiple dielectric layers 失效
标题翻译：半导体器件硅通孔填充物形成在多个电介质层中
公开(公告)号：US5291058A
公开(公告)日：1994-03-01
申请号：US921685
申请日：1992-07-30
申请人： Shuichi Samata , Yuuichi Mikata , Toshiro Usami
发明人： Shuichi Samata , Yuuichi Mikata , Toshiro Usami
IPC分类号： H01L21/285 , H01L23/532 , H01L29/417 , H01L29/45 , H01L29/34 , H01L21/225 , H01L23/48 , H01L29/46
CPC分类号： H01L21/28525 , H01L23/5329 , H01L29/41725 , H01L29/456 , H01L2924/0002
摘要： A semiconductor device with an electrode wiring structure comprises at least one diffused region provided in a semiconductor substrate, a silicon oxide layer covering the substrate surface, a silicon nitride layer provided on the silicon oxide layer, a through-hole reaching the diffused region through the silicon oxide layer from an upper surface of the silicon nitride layer, a silicon semiconductor layer filled in the through-hole and serving as an electrode wiring layer, and an interconnection layer electrically connected to the diffused region through the silicon semiconductor layer. According to the structure, since the silicon oxide layer is covered with the silicon nitride layer, unwanted contaminations such as phosphorus, boron, etc., previously contained in the silicon oxide layer are not added to the silicon semiconductor layer during its growth process. Therefore, the electrode wiring layer of silicon semiconductor having controlled conductivity can be provided.
摘要翻译：具有电极布线结构的半导体器件包括设置在半导体衬底中的至少一个扩散区域，覆盖衬底表面的氧化硅层，设置在氧化硅层上的氮化硅层，通过所述扩散区域的通孔从氮化硅层的上表面的氧化硅层，填充在通孔中并用作电极布线层的硅半导体层，以及通过硅半导体层与扩散区电连接的布线层。根据该结构，由于氧化硅层被氮化硅层覆盖，因此在硅生长过程中，硅氧化物层中预先含有的诸如磷，硼等的不需要的污染物不会添加到硅半导体层。因此，可以提供具有受控导电性的硅半导体的电极布线层。

8. 发明授权

US5124276A Filling contact hole with selectively deposited EPI and poly silicon 失效
标题翻译：用选择性沉积的EPI和多晶硅填充接触孔
公开(公告)号：US5124276A
公开(公告)日：1992-06-23
申请号：US724906
申请日：1991-07-02
申请人： Shuichi Samata , Yoshiaki Matsushita
发明人： Shuichi Samata , Yoshiaki Matsushita
IPC分类号： H01L21/28 , H01L21/285 , H01L23/532 , H01L29/43
CPC分类号： H01L21/28525 , H01L23/53271 , H01L2924/0002 , Y10S148/026 , Y10S148/164
摘要： A semiconductor device includes a semiconductor layer, an insulating layer on the semiconductor layer, including a discontinuity therein, a monocrystalline silicon layer on a portion of semiconductor layer defined by the discontinuity, a non-monocrystalline silicon layer on the monocrystalline silicon layer, and a wiring layer on the non-monocrystalline silicon layer.
摘要翻译：半导体器件包括半导体层，半导体层上的绝缘层，其中包含不连续性，在由不连续性限定的半导体层的一部分上的单晶硅层，单晶硅层上的非单晶硅层和布线层在非单晶硅层上。

9. 发明申请

US20070061049A1 System, method and program for designing a utility facility and method for manufacturing a product by the utility facility 有权
标题翻译：用于设计公用事业设施的系统，方法和程序以及由公用设施制造产品的方法
公开(公告)号：US20070061049A1
公开(公告)日：2007-03-15
申请号：US11510601
申请日：2006-08-28
申请人： Toshikatsu Masuda , Toshinori Shinki , Shuichi Samata , Yuuichi Mikata
发明人： Toshikatsu Masuda , Toshinori Shinki , Shuichi Samata , Yuuichi Mikata
IPC分类号： G05B19/418
CPC分类号： G05B19/41865 , G05B2219/31455 , G05B2219/32365 , G06Q10/06 , Y02P90/20 , Y02P90/26 , Y02P90/265
摘要： A system for designing a utility facility includes a state analyzer analyzing operational states of tools included in a production line, an extraction module extracting an operational period and a standby period of each of the tools, a calculator calculating changes in a quantity of utilities consumed by the tools in operation and in standby, based on the operational periods and the standby periods, and a facility design module designing at least any of a utility facility for supplying utilities to the tools and a utility facility for disposing of utilities discharged from the tools.
摘要翻译：用于设计公用事业设施的系统包括分析生产线中包括的工具的运行状态的状态分析器，提取每个工具的操作周期和待机时间的提取模块，计算器计算由操作和待机的工具，基于操作周期和待机时段，以及设计设计模块，至少设计用于向工具供应公用设施的公用设施和用于处理从工具排放的设施的公用设施。

10. 发明授权

US5378652A Method of making a through hole in multi-layer insulating films 失效
标题翻译：在多层绝缘膜中制作通孔的方法
公开(公告)号：US5378652A
公开(公告)日：1995-01-03
申请号：US680781
申请日：1991-04-03
申请人： Shuichi Samata , Yuuichi Mikata , Toshiro Usami
发明人： Shuichi Samata , Yuuichi Mikata , Toshiro Usami
IPC分类号： H01L21/285 , H01L23/532 , H01L29/417 , H01L29/45 , H01L29/54 , H01L21/20
CPC分类号： H01L21/28525 , H01L23/5329 , H01L29/41725 , H01L29/456 , H01L2924/0002 , Y10S438/902 , Y10S438/971
摘要： A semiconductor device with an electrode wiring structure comprises at least one diffused region provided in a semiconductor substrate, a silicon oxide layer covering the substrate surface, a silicon nitride layer provided on the silicon oxide layer, a through-hole reaching the diffused region through the silicon oxide layer from an upper surface of the silicon nitride layer, a silicon semiconductor layer filled in the through-hole and serving as an electrode wiring layer, and an interconnection layer electrically connected to the diffused region through the silicon semiconductor layer. According to the structure, since the silicon oxide layer is covered with the silicon nitride layer, unwanted contaminations such as phosphorus, boron, etc., previously contained in the silicon oxide layer are not added to the silicon semiconductor layer during its growth process. Therefore, the electrode wiring layer of silicon semiconductor having controlled conductivity can be provided.
摘要翻译：具有电极布线结构的半导体器件包括设置在半导体衬底中的至少一个扩散区域，覆盖衬底表面的氧化硅层，设置在氧化硅层上的氮化硅层，通过所述扩散区域的通孔从氮化硅层的上表面的氧化硅层，填充在通孔中并用作电极布线层的硅半导体层，以及通过硅半导体层与扩散区电连接的布线层。根据该结构，由于氧化硅层被氮化硅层覆盖，因此在硅生长过程中，硅氧化物层中预先含有的诸如磷，硼等的不需要的污染物不会添加到硅半导体层。因此，可以提供具有受控导电性的硅半导体的电极布线层。

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