专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06260151B1 Computer system capable of controlling the power supplied to specific modules 失效
标题翻译：能够控制提供给特定模块的电源的计算机系统
公开(公告)号：US06260151B1
公开(公告)日：2001-07-10
申请号：US09038628
申请日：1998-03-12
申请人： Takashi Omizo , Yoshihiko Okazaki , Shigeki Muratake
发明人： Takashi Omizo , Yoshihiko Okazaki , Shigeki Muratake
IPC分类号： G06F1300
CPC分类号： G06F1/3237 , G06F1/3203 , G06F1/324 , G06F1/325 , G06F1/3253 , G06F1/3287 , G06F1/3296 , Y02D10/126 , Y02D10/128 , Y02D10/151 , Y02D10/171 , Y02D10/172
摘要： In a computer system, a control signal line directly connecting a processor to a power sequence controller is provided and a PSC interface for exchanging a control signal with the power sequence controller is built in the processor. When all the devices connected to a specific IO bus have been out of use for a long time, the processor transmits a control signal to stop the supply of power to the IO bus to the power sequence controller. This stops power from being supplied to not only the devices connected to the IO bus but also the IO bus. As a result, the unnecessarily consumed power in the computer system is reduced remarkably.
摘要翻译：在计算机系统中，提供将处理器直接连接到功率控制器的控制信号线，并且在处理器中内置有用于与控制信号交换控制信号的PSC接口。当连接到特定IO总线的所有设备长时间不再使用时，处理器发送一个控制信号，以停止向该功率控制器向IO总线供电。这不仅可以将电源不仅提供给连接到IO总线的设备，还可以提供给IO总线。结果，计算机系统中不必要的消耗功率显着降低。

2. 发明授权

US5214330A Bi-directional signal buffering circuit 失效
标题翻译：双向信号缓冲电路
公开(公告)号：US5214330A
公开(公告)日：1993-05-25
申请号：US855530
申请日：1992-03-20
申请人： Yoshihiko Okazaki
发明人： Yoshihiko Okazaki
IPC分类号： G06F13/38 , G06F13/40 , H03K5/02
CPC分类号： H03K5/023
摘要： When a signal A is input to a bi-directional buffer from a bus A, a first buffer detects the level of the signal A and supplies an OE control signal to a second buffer to disable an output therefrom. The output from the second buffer is set to a predetermined value by a bias circuit, and this predetermined value is supplied to the bi-directional buffer as a direction control signal via a direction designator together with output signal from the first buffer. In this circuit operation, when the signal A is input to the bi-directional buffer, it is immediately transmitted from the bus A side to the bus B side since the bi-directional buffer is set in an initial state by the bias circuit so as to transmit a signal in two directions.
摘要翻译：当信号A从总线A输入到双向缓冲器时，第一缓冲器检测信号A的电平，并将OE控制信号提供给第二缓冲器以禁用其输出。通过偏置电路将来自第二缓冲器的输出设置为预定值，并且该预定值与来自第一缓冲器的输出信号一起经由方向指示器作为方向控制信号提供给双向缓冲器。在该电路操作中，当信号A被输入到双向缓冲器时，它立即从总线A侧发送到总线B侧，因为双向缓冲器被偏置电路设置在初始状态，以便以在两个方向上发送信号。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式