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1. 发明申请

US20080182369A1 T-gate forming method and metamorphic high electron mobility transistor fabricating method using the same 审中-公开
标题翻译： T型栅极形成方法和使用其的变质高电子迁移率晶体管制造方法
公开(公告)号：US20080182369A1
公开(公告)日：2008-07-31
申请号：US11896660
申请日：2007-09-05
申请人： Yoon-Ha Jeong , Kang-Sung Lee , Young-Su Kim , Yun-Ki Hong
发明人： Yoon-Ha Jeong , Kang-Sung Lee , Young-Su Kim , Yun-Ki Hong
IPC分类号： H01L21/338
CPC分类号： H01L29/7783 , H01L21/28587 , H01L29/42316 , H01L29/66462
摘要： A method for forming a T-gate of a metamorphic high electron mobility transistor is provided. The method includes sequentially laminating a plurality of resist films on a substrate; forming a T-shaped pattern in the laminated resist films using electron beam lithography; forming a gate metal layer on the substrate where the T-shaped pattern has been formed; attaching an adhesion member to the gate metal layer formed on a top surface of the laminated resist films and detaching the adhesion member to thereby remove the gate metal layer; and removing the laminated resist films.
摘要翻译：提供了一种用于形成变质高电子迁移率晶体管的T栅极的方法。该方法包括在基板上依次层叠多个抗蚀剂膜; 使用电子束光刻在层压的抗蚀剂膜中形成T形图案; 在已经形成T形图案的基板上形成栅极金属层; 将附着构件附接到形成在层压抗蚀剂膜的顶表面上的栅极金属层，并分离粘合构件，从而去除栅极金属层; 并除去层叠的抗蚀膜。

2. 发明授权

US07932540B2 T-gate forming method for high electron mobility transistor and gate structure thereof 有权
标题翻译：用于高电子迁移率晶体管的T型栅极形成方法及其栅极结构
公开(公告)号：US07932540B2
公开(公告)日：2011-04-26
申请号：US11700946
申请日：2007-02-01
申请人： Yoon-Ha Jeong , Kang-Sung Lee , Young-Su Kim , Yun-Ki Hong , Sung-Woo Jung
发明人： Yoon-Ha Jeong , Kang-Sung Lee , Young-Su Kim , Yun-Ki Hong , Sung-Woo Jung
IPC分类号： H01L29/66
CPC分类号： H01L29/7787 , H01L29/42316 , H01L29/66462
摘要： A T-gate forming method for a high electron mobility transistor includes the steps of: coating a first, a second and a third resist, each having an electron beam sensitivity different from each other, on a semiconductor substrate; performing a first exposure process by using an electron beam on the semiconductor substrate and then selectively developing the third resist; defining a gate head area by selectively developing the second resist to have a developed width wider than that of the third resist; performing a second exposure process by using an electron beam on the semiconductor substrate and then selectively developing the first resist in a bent shape at a temperature lower than in the development of the second and the third steps; and depositing metallic materials on the resists and then removing them to form a T-gate.
摘要翻译：一种用于高电子迁移率晶体管的T形栅形成方法包括以下步骤：在半导体衬底上涂覆各自具有彼此不同的电子束灵敏度的第一，第二和第三抗蚀剂; 通过在半导体衬底上使用电子束然后选择性地显影第三抗蚀剂来执行第一曝光处理; 通过选择性地显影所述第二抗蚀剂来限定栅极头区域，以具有比所述第三抗蚀剂宽的显影宽度; 通过在半导体衬底上使用电子束进行第二曝光处理，然后在低于第二和第三步骤的显影的温度下，以弯曲形状选择性地显影第一抗蚀剂; 并将金属材料沉积在抗蚀剂上，然后去除它们以形成T形栅极。

3. 发明申请

US20080108188A1 T-gate forming method for high electron mobility transistor and gate structure thereof 有权
标题翻译：用于高电子迁移率晶体管的T型栅极形成方法及其栅极结构
公开(公告)号：US20080108188A1
公开(公告)日：2008-05-08
申请号：US11700946
申请日：2007-02-01
申请人： Yoon-Ha Jeong , Kang-Sung Lee , Young-Su Kim , Yun-Ki Hong , Sung-Woo Jung
发明人： Yoon-Ha Jeong , Kang-Sung Lee , Young-Su Kim , Yun-Ki Hong , Sung-Woo Jung
IPC分类号： H01L21/338
CPC分类号： H01L29/7787 , H01L29/42316 , H01L29/66462
摘要： A T-gate forming method for a high electron mobility transistor includes the steps of: coating a first, a second and a third resist, each having an electron beam sensitivity different from each other, on a semiconductor substrate; performing a first exposure process by using an electron beam on the semiconductor substrate and then selectively developing the third resist; defining a gate head area by selectively developing the second resist to have a developed width wider than that of the third resist; performing a second exposure process by using an electron beam on the semiconductor substrate and then selectively developing the first resist in a bent shape at a temperature lower than in the development of the second and the third steps; and depositing metallic materials on the resists and then removing them to form a T-gate.
摘要翻译：一种用于高电子迁移率晶体管的T形栅形成方法包括以下步骤：在半导体衬底上涂覆各自具有彼此不同的电子束灵敏度的第一，第二和第三抗蚀剂; 通过在半导体衬底上使用电子束然后选择性地显影第三抗蚀剂来执行第一曝光处理; 通过选择性地显影所述第二抗蚀剂来限定栅极头区域，以具有比所述第三抗蚀剂宽的显影宽度; 通过在半导体衬底上使用电子束进行第二曝光处理，然后在低于第二和第三步骤的显影的温度下，以弯曲形状选择性地显影第一抗蚀剂; 并将金属材料沉积在抗蚀剂上，然后去除它们以形成T形栅极。

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