专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20080078443A1 DYE-SENSITIZED SOLAR CELL AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：透明的太阳能电池及其制造方法
公开(公告)号：US20080078443A1
公开(公告)日：2008-04-03
申请号：US11751674
申请日：2007-05-22
申请人： Yongseok JUN , Mangu KANG , Jong Dae KIM
发明人： Yongseok JUN , Mangu KANG , Jong Dae KIM
IPC分类号： H01L31/0224 , H01L31/0216
CPC分类号： H01G9/2031 , H01L51/0086 , Y02E10/542 , Y02P70/521
摘要： A dye-sensitized solar cell in which an insulating layer is formed on exposed surfaces of a semiconductor oxide layer in a semiconductor electrode and a conductive substrate, and a method of manufacturing the dye-sensitized solar cell are provided. The dye-sensitized solar cell includes a semiconductor electrode and an opposing electrode disposed to face each other, and an electrolyte solution interposed between the electrodes. The semiconductor electrode includes a conductive substrate, a semiconductor oxide layer formed on the semiconductor electrode, a dye molecule layer adhered to the surface of the semiconductor oxide layer, and an insulating layer formed on the surfaces of the semiconductor oxide layer exposed through the dye molecule layer and the conductive substrate. The insulating layer is formed of a self-assembling organic layer which is self-assembled on the surfaces of the semiconductor oxide layer and the conductive substrate by a chemical bond.
摘要翻译：提供了在半导体电极和导电性基板中的半导体氧化物层的露出面上形成绝缘层的染料敏化太阳能电池，以及染料敏化太阳能电池的制造方法。染料敏化太阳能电池包括设置成彼此面对的半导体电极和相对电极，以及插在电极之间的电解质溶液。半导体电极包括导电基板，形成在半导体电极上的半导体氧化物层，粘附到半导体氧化物层的表面的染料分子层，以及形成在通过染料分子暴露的半导体氧化物层的表面上的绝缘层层和导电基板。绝缘层由自组装有机层形成，其通过化学键自组装在半导体氧化物层和导电基板的表面上。

2. 发明申请

US20120324721A1 VACUUM-SEALING-TYPE FLEXIBLE-FILM PRIMARY BATTERY AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：真空密封型柔性电池一次电池及其制造方法
公开(公告)号：US20120324721A1
公开(公告)日：2012-12-27
申请号：US13607645
申请日：2012-09-07
申请人： Young Gi LEE , Kwang Man KIM , Min Gyu CHOI , Sang Hyo LEE , Jong Dae KIM
发明人： Young Gi LEE , Kwang Man KIM , Min Gyu CHOI , Sang Hyo LEE , Jong Dae KIM
IPC分类号： H01M6/00
CPC分类号： H01M6/40 , H01M4/366 , H01M4/76 , H01M6/02 , H01M6/181 , H01M10/0472
摘要： A method of manufacturing a flexible-film primary battery includes forming a first conductive carbon layer on a surface-treated inner surface of a first pouch film to form a positive electrode collector, and forming a positive electrode layer on the first conductive carbon layer to form a positive electrode plate. A second conductive carbon layer is formed on a surface-treated inner surface of a second pouch film to form a negative electrode collector, and a negative electrode layer is formed on the second conductive carbon layer to form a negative electrode plate. An adhesion/post-injection polymer electrolyte layer is inserted between the positive electrode plate and the negative electrode plate to manufacture a battery assembly. An electrolyte is injected into the polymer electrolyte layer of the battery assembly. The battery assembly is sealed completely to form a primary battery.
摘要翻译：制造柔性膜一次电池的方法包括：在第一袋膜的表面处理内表面上形成第一导电性碳层，形成正极集电体，在第一导电性碳层上形成正极层，形成正极板。在第二袋膜的表面处理内表面上形成第二导电性碳层，形成负极集电体，在第二导电性碳层上形成负极层，形成负极板。在正极板和负极板之间插入粘合/后注入聚合物电解质层以制造电池组件。将电解质注入到电池组件的聚合物电解质层中。电池组件被完全密封以形成一次电池。

3. 发明申请

US20080294875A1 PARALLEL PROCESSOR FOR EFFICIENT PROCESSING OF MOBILE MULTIMEDIA 有权
标题翻译：并行处理器对移动多媒体的高效处理
公开(公告)号：US20080294875A1
公开(公告)日：2008-11-27
申请号：US12045844
申请日：2008-03-11
申请人： Chun Gi LYUH , Yil Suk YANG , Se Wan HEO , Soon Il YEO , Tae Moon ROH , Jong Dae KIM , Ki Chul KIM , Se Hoon YOO
发明人： Chun Gi LYUH , Yil Suk YANG , Se Wan HEO , Soon Il YEO , Tae Moon ROH , Jong Dae KIM , Ki Chul KIM , Se Hoon YOO
IPC分类号： G06F15/76 , G06F9/02
CPC分类号： G06F15/8007
摘要： Provided is a parallel processor for supporting a floating-point operation. The parallel processor has a flexible structure for easy development of a parallel algorithm involving multimedia computing, requires low hardware cost, and consumes low power. To support floating-point operations, the parallel processor uses floating-point accumulators and a flag for floating-point multiplication. Using the parallel processor, it is possible to process a geometric transformation operation in a 3-dimensional (3D) graphics process at low cost. Also, the cost of a bus width for instructions can be minimized by a partitioned Single-Instruction Multiple-Data (SIMD) method and a method of conditionally executing instructions.
摘要翻译：提供了一种用于支持浮点运算的并行处理器。并行处理器具有灵活的结构，便于开发涉及多媒体计算的并行算法，需要较低的硬件成本，并且消耗低功耗。为了支持浮点运算，并行处理器使用浮点累加器和浮点乘法的标志。使用并行处理器，可以以低成本在三维（3D）图形处理中处理几何变换操作。此外，可以通过分区单指令多数据（SIMD）方法和有条件执行指令的方法来最小化用于指令的总线宽度的成本。

4. 发明申请

US20080132052A1 METHOD OF FABRICATING ELECTRONIC DEVICE USING NANOWIRES 有权
标题翻译：使用纳米级制造电子器件的方法
公开(公告)号：US20080132052A1
公开(公告)日：2008-06-05
申请号：US11947139
申请日：2007-11-29
申请人： Seung Eon MOON , Eun Kyoung KIM , Hong Yeol LEE , Jong Hyurk PARK , Kang Ho PARK , Jong Dae KIM , So Jeong PARK , Gyu Tae KIM
发明人： Seung Eon MOON , Eun Kyoung KIM , Hong Yeol LEE , Jong Hyurk PARK , Kang Ho PARK , Jong Dae KIM , So Jeong PARK , Gyu Tae KIM
IPC分类号： H01L21/44
CPC分类号： H01L21/76892 , H01L2221/1094
摘要： A method of fabricating an electronic device using nanowires, minimizing the number of E-beam processing steps and thus improving a yield, includes the steps of: forming electrodes on a substrate; depositing a plurality of nanowires on the substrate including the electrodes; capturing an image of the substrate including the nanowires and the electrodes; drawing virtual connection lines for connecting the nanowires with the electrodes on the image using an electrode pattern simulated through a computer program, after capturing the image; coating an E-beam photoresist on the substrate; removing the photoresist from regions corresponding to the virtual connection lines and the electrode pattern using E-beam lithography; depositing a metal layer on the substrate after removing the photoresist from the regions of the virtual connection lines; and removing remaining photoresist from the substrate using a lift-off process. It is possible to reduce the time and cost associated with fabricating electronic devices with nanowires because the number of E-beam processing steps remarkably decreases compared to the conventional method that fabricates electronic devices only by means of the E-beam lithography processes. After calling upon an image of the substrate having nanowires on a computer program, the electronic devices are fabricated with reference to the substrate image, thus enhancing the product yield.
摘要翻译：使用纳米线制造电子器件的方法，使电子束处理步骤的数量最小化并因此提高产量，包括以下步骤：在衬底上形成电极; 在包括电极的基板上沉积多个纳米线; 捕获包括纳米线和电极的衬底的图像; 绘制虚拟连接线，用于在捕获图像之后，使用通过计算机程序模拟的电极图案将纳米线与图像上的电极连接; 在基板上涂覆电子束光致抗蚀剂; 使用电子束光刻从与虚拟连接线对应的区域和电极图案中去除光致抗蚀剂; 在从虚拟连接线的区域去除光致抗蚀剂之后，在基板上沉积金属层; 以及使用剥离工艺从衬底去除剩余的光致抗蚀剂。与仅通过电子束光刻工艺制造电子器件的常规方法相比，电子束处理步骤的数量显着降低，可以减少与制造具有纳米线的电子器件相关联的时间和成本。在计算机程序上调用具有纳米线的衬底的图像之后，参考衬底图像制造电子器件，从而提高产品产量。

5. 发明申请

US20110140579A1 ACTIVE PIEZOELECTRIC ENERGY HARVESTER WITH EMBEDDED VARIABLE CAPACITANCE LAYER AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：具有嵌入式可变电容层的有源压电式收发器及其制造方法
公开(公告)号：US20110140579A1
公开(公告)日：2011-06-16
申请号：US12899499
申请日：2010-10-06
申请人： Seung Eon MOON , Sung Q. LEE , Sang Kyun LEE , Yil Suk YANG , Kang Ho PARK , Jong Dae KIM
发明人： Seung Eon MOON , Sung Q. LEE , Sang Kyun LEE , Yil Suk YANG , Kang Ho PARK , Jong Dae KIM
IPC分类号： H02N2/18 , H01L41/22
CPC分类号： H02N2/186 , H01L41/1136 , H02N2/188 , Y10T29/42
摘要： Provided is an active piezoelectric energy harvester, which can control a direct current voltage applied to an embedded variable capacitance layer to precisely adjust a resonance frequency in real time, and thus achieve a simpler structure and a smaller size compared to a conventional one that adjusts the resonance frequency using a separate variable capacitor provided outside. Further, the active piezoelectric energy harvester can precisely adjust the resonance frequency even when the frequency of vibration varies over time as in a real natural vibration environment or when it is degraded to undergo a variation in its own resonance frequency, and thus can continuously maintain optimal energy conversion characteristics.
摘要翻译：提供了一种有源压电能量收集器，其可以控制施加到嵌入式可变电容层的直流电压，以实时精确地调节谐振频率，从而实现比传统调节器的传统电容器更简单的结构和更小的尺寸谐振频率使用外部提供的单独的可变电容器。此外，即使在真实的自然振动环境中，随着时间的推移，振动频率随时间而变化，或者当其自身的谐振频率变差而发生变化时，有源压电能量收集器也可以精确地调节谐振频率，从而可以持续保持最佳能量转换特性。

6. 发明申请

US20080128817A1 ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT USING TRIPLE WELLED SILICON CONTROLLED RECTIFIER 有权
标题翻译：静电放电保护电路，采用三重硅片控制整流器
公开(公告)号：US20080128817A1
公开(公告)日：2008-06-05
申请号：US12018317
申请日：2008-01-23
申请人： Kwi Dong KIM , Chong Ki KWON , Jong Dae KIM
发明人： Kwi Dong KIM , Chong Ki KWON , Jong Dae KIM
IPC分类号： H01L23/62
CPC分类号： H01L29/7436 , H01L29/749 , H01L29/87 , H01L2924/0002 , H01L2924/00
摘要： Provided is an electrostatic discharge (ESD) protection circuit using a silicon controlled rectifier (SCR), which is applied to a semiconductor integrated circuit (IC). A semiconductor substrate has a triple well structure such that a bias is applied to a p-well corresponding to a substrate of a ggNMOS device. Thus, a trigger voltage of the SCR is reduced. In addition, two discharge paths are formed using two SCRs including PNP and NPN bipolar transistors. As a result, the ESD protection circuit can have greater discharge capacity.
摘要翻译：提供了一种应用于半导体集成电路（IC）的使用可控硅整流器（SCR）的静电放电（ESD）保护电路。半导体衬底具有三重阱结构，使得偏置被施加到对应于ggNMOS器件的衬底的p阱。因此，SCR的触发电压降低。此外，使用包括PNP和NPN双极晶体管的两个SCR形成两个放电路径。因此，ESD保护电路可以具有更大的放电容量。

7. 发明申请

US20080128285A1 ELECTROCHEMICAL GAS SENSOR CHIP AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：电化学气体传感器芯片及其制造方法
公开(公告)号：US20080128285A1
公开(公告)日：2008-06-05
申请号：US11944232
申请日：2007-11-21
申请人： Seung Eon MOON , Eun Kyoung KIM , Hong Yeol LEE , Jong Hyurk PARK , Kang Ho PARK , Jong Dae KIM , Seok Hong MIN , Byung Gil JUNG , Seung Chul HA
发明人： Seung Eon MOON , Eun Kyoung KIM , Hong Yeol LEE , Jong Hyurk PARK , Kang Ho PARK , Jong Dae KIM , Seok Hong MIN , Byung Gil JUNG , Seung Chul HA
IPC分类号： G01N27/407 , C23C14/24 , C23C14/34
CPC分类号： G01N27/4045
摘要： An electrochemical gas sensor and a method of manufacturing the same are provided. The electrochemical gas sensor includes: a substrate; an electrode patterned on the substrate; a solid electrolyte layer having proton conductivity formed on the substrate having the patterned electrode; and a hydrophobic microporous membrane formed on the solid electrolyte layer. The gas sensor chip is easily integrated with a driving circuit and uses a solid electrolyte layer, and thus it can be manufactured in a smaller size and in a large area process.
摘要翻译：提供一种电化学气体传感器及其制造方法。电化学气体传感器包括：基板; 在基板上图案化的电极; 在具有图案化电极的基板上形成具有质子传导性的固体电解质层; 和形成在固体电解质层上的疏水性微孔膜。气体传感器芯片易于与驱动电路集成，并且使用固体电解质层，因此可以以较小的尺寸和大面积的工艺制造。

8. 发明申请

US20100257342A1 ROW OF FLOATING POINT ACCUMULATORS COUPLED TO RESPECTIVE PES IN UPPERMOST ROW OF PE ARRAY FOR PERFORMING ADDITION OPERATION 审中-公开
标题翻译：浮动点累积器与适用于执行添加操作的PE阵列的更高层次的PES相关联的方法
公开(公告)号：US20100257342A1
公开(公告)日：2010-10-07
申请号：US12817407
申请日：2010-06-17
申请人： Chun Gi LYUH , Yil Suk YANG , Se Wan HEO , Soon Il YEO , Tae Moon ROH , Jong Dae KIM , Ki Chul KIM , Se Hoon YOO
发明人： Chun Gi LYUH , Yil Suk YANG , Se Wan HEO , Soon Il YEO , Tae Moon ROH , Jong Dae KIM , Ki Chul KIM , Se Hoon YOO
IPC分类号： G06F9/302
CPC分类号： G06F15/8007
摘要： Provided is a parallel processor for supporting a floating-point operation. The parallel processor has a flexible structure for easy development of a parallel algorithm involving multimedia computing, requires low hardware cost, and consumes low power. To support floating-point operations, the parallel processor uses floating-point accumulators and a flag for floating-point multiplication. Using the parallel processor, it is possible to process a geometric transformation operation in a 3-dimensional (3D) graphics process at low cost. Also, the cost of a bus width for instructions can be minimized by a partitioned Single-Instruction Multiple-Data (SIMD) method and a method of conditionally executing instructions.
摘要翻译：提供了一种用于支持浮点运算的并行处理器。并行处理器具有灵活的结构，便于开发涉及多媒体计算的并行算法，需要较低的硬件成本，并且消耗低功耗。为了支持浮点运算，并行处理器使用浮点累加器和浮点乘法的标志。使用并行处理器，可以以低成本在三维（3D）图形处理中处理几何变换操作。此外，可以通过分区单指令多数据（SIMD）方法和有条件执行指令的方法来最小化用于指令的总线宽度的成本。

9. 发明申请

US20100019321A1 MULTIPLE-GATE MOS TRANSISTOR USING Si SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：使用Si衬底的多门MOS晶体管及其制造方法
公开(公告)号：US20100019321A1
公开(公告)日：2010-01-28
申请号：US12556666
申请日：2009-09-10
申请人： Young Kyun CHO , Tae Moon ROH , Jong Dae KIM
发明人： Young Kyun CHO , Tae Moon ROH , Jong Dae KIM
IPC分类号： H01L29/78
CPC分类号： H01L29/785 , H01L29/66818 , H01L29/7851
摘要： Provided are a multiple-gate MOS (metal oxide semiconductor) transistor and a method of manufacturing the same. The transistor includes a single crystalline active region having a channel region having an upper portion of a streamlined shape (∩) obtained by patterning an upper portion of a bulk silicon substrate with an embossed pattern, and having a thicker and wider area than the channel region; a nitride layer formed at both side surfaces of the single crystalline active region to expose an upper portion of the single crystalline active region at a predetermined height; and a gate electrode formed to be overlaid with the exposed upper portion of the single crystalline active region of the channel region.
摘要翻译：提供一种多栅极MOS（金属氧化物半导体）晶体管及其制造方法。晶体管包括具有通道区域的单晶有源区域，沟道区域具有通过用压花图案图案化体硅衬底的上部并且具有比沟道区域更厚和更宽的面积而获得的流线型形状（∩）的上部 ; 形成在所述单晶有源区的两个侧表面处的氮化物层，以在预定高度暴露所述单晶有源区的上部; 以及形成为与通道区域的单晶有源区域的暴露的上部分重叠的栅电极。

10. 发明申请

US20090144523A1 MULTIPLE-SIMD PROCESSOR FOR PROCESSING MULTIMEDIA DATA AND ARITHMETIC METHOD USING THE SAME 审中-公开
标题翻译：用于处理多媒体数据的多SIMD处理器和使用它的算术方法
公开(公告)号：US20090144523A1
公开(公告)日：2009-06-04
申请号：US12174988
申请日：2008-07-17
申请人： Chun Gi LYUH , Tae Moon ROH , Jong Dae KIM
发明人： Chun Gi LYUH , Tae Moon ROH , Jong Dae KIM
IPC分类号： G06F15/80 , G06F9/02
CPC分类号： G06F15/8007 , G06F9/30181 , G06F9/3851 , G06F9/3885 , G06F9/3887 , G06F9/3889
摘要： A multiple-single instruction multiple data (SIMD) processor and an arithmetic method using the same are disclosed. When various arithmetic operations should be individually carried out by SIMD arithmetic units, control right is sub-divided to perform the arithmetic operations, such that the time of the arithmetic operations can be shortened and the efficiency thereof can be raised. When sub-divided control is not required, the control right is withdrawn and the arithmetic operations are carried out using a minimum number of program memories and a minimum number of SIMD arithmetic units, such that memory and power consumption thereof can be reduced.
摘要翻译：公开了一种多单指令多数据（SIMD）处理器及其运算方法。当通过SIMD算术单元分别进行各种算术运算时，控制权被细分，进行算术运算，可以缩短算术运算的时间，提高效率。当不需要分分割控制时，撤回控制权，并且使用最少数量的程序存储器和最小数量的SIMD运算单元执行算术运算，从而可以减少存储器和功耗。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式