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1. 发明申请

US20060029176A1 Data transmission synchronization 有权
标题翻译：数据传输同步
公开(公告)号：US20060029176A1
公开(公告)日：2006-02-09
申请号：US10912943
申请日：2004-08-06
申请人： Yongmin Ge , Ming Qu , Zhengyu Yuan
发明人： Yongmin Ge , Ming Qu , Zhengyu Yuan
IPC分类号： H03D3/24 , H04L7/00
CPC分类号： H03M9/00 , H03K5/135 , H04J3/047 , H04J3/0685
摘要： Systems and methods provide synchronization techniques across a number of communication channels. For example, in accordance with an embodiment of the present invention, a synchronization scheme is disclosed for synchronizing across multiple data transmission channels, with each transmission channel multiplexing parallel data into serial data.
摘要翻译：系统和方法提供跨越多个通信信道的同步技术。例如，根据本发明的实施例，公开了同步方案，用于跨多个数据传输信道同步，每个传输信道将并行数据复用为串行数据。

2. 发明授权

US07471752B2 Data transmission synchronization 有权
标题翻译：数据传输同步
公开(公告)号：US07471752B2
公开(公告)日：2008-12-30
申请号：US10912943
申请日：2004-08-06
申请人： Yongmin Ge , Ming Qu , Zhengyu Yuan
发明人： Yongmin Ge , Ming Qu , Zhengyu Yuan
IPC分类号： H04L7/00
CPC分类号： H03M9/00 , H03K5/135 , H04J3/047 , H04J3/0685
摘要： Systems and methods provide synchronization techniques across a number of communication channels. For example, in accordance with an embodiment of the present invention, a synchronization scheme is disclosed for synchronizing across multiple data transmission channels, with each transmission channel multiplexing parallel data into serial data.
摘要翻译：系统和方法提供跨越多个通信信道的同步技术。例如，根据本发明的实施例，公开了同步方案，用于跨多个数据传输信道同步，每个传输信道将并行数据复用为串行数据。

3. 发明申请

US20110150055A1 Active Auxiliary Channel Buffering 有权
标题翻译：主动辅助通道缓冲
公开(公告)号：US20110150055A1
公开(公告)日：2011-06-23
申请号：US12645240
申请日：2009-12-22
申请人： Ming Qu , Zhengyu Yuan , Kochung Lee
发明人： Ming Qu , Zhengyu Yuan , Kochung Lee
IPC分类号： H04B1/38
CPC分类号： G09G5/006 , G09G2330/021 , G09G2350/00 , G09G2370/045 , G09G2370/10 , H04L65/4023 , H04L65/4092 , H04L67/34
摘要： A system and a method for communicating configuration data between a source device and a sink are described. An active buffer receives data from an auxiliary communication channel which communicates data between the source device and the sink device. The active buffer modifies data received from the auxiliary communication channel. For example, the active buffer amplifies the received data or electrically reshapes the received data. The modified data is then transmitted from the active buffer to a destination device. In one embodiment, the auxiliary communication channel is bi-directional and upon receiving data from a first device, the active buffer is modified to permit uni-directional transmission of data from the first device to a second device.
摘要翻译：描述用于在源设备和宿之间传送配置数据的系统和方法。主动缓冲器从辅助通信信道接收数据，该辅助通信信道在源设备和宿设备之间传送数据。主动缓冲器修改从辅助通信信道接收到的数据。例如，有源缓冲器放大所接收的数据或电接收数据。然后将修改的数据从活动缓冲器发送到目的地设备。在一个实施例中，辅助通信信道是双向的，并且在从第一设备接收数据时，主动缓冲器被修改以允许将数据从第一设备单向传输到第二设备。

4. 发明授权

US07081781B2 Charge pump for a low-voltage wide-tuning range phase-locked loop 有权
标题翻译：用于低压宽调谐范围锁相环的电荷泵
公开(公告)号：US07081781B2
公开(公告)日：2006-07-25
申请号：US10817215
申请日：2004-04-02
申请人： Xiang Zhu , Ming Qu , Yongmin Ge
发明人： Xiang Zhu , Ming Qu , Yongmin Ge
IPC分类号： H03L7/06
CPC分类号： H03L7/0896 , H03L7/18
摘要： A charge pump for a differential phase-locked loop (PLL) is provided. The charge pump includes a current switch configured to voltage to source and sink a current in a complementary fashion from a pair of differential output nodes. The charge pump includes a common-mode feedback loop to maintain the charging and discharging of the differential output nodes with respect to a common-mode voltage. Transconductance amplifiers are provided within the common-mode feedback loop to provide greater dynamic range to the charging and discharging of the differential output nodes.
摘要翻译：提供了一种用于差分锁相环（PLL）的电荷泵。电荷泵包括电流开关，其配置为以一对差分输出节点的互补方式对电流进行电压和吸收电流。电荷泵包括共模反馈回路，以保持差分输出节点相对于共模电压的充电和放电。在共模反馈回路内提供跨导放大器，为差分输出节点的充电和放电提供更大的动态范围。

5. 发明申请

US20050218948A1 Charge pump for a low-voltage wide-tuning range phase-locked loop 有权
标题翻译：用于低压宽调谐范围锁相环的电荷泵
公开(公告)号：US20050218948A1
公开(公告)日：2005-10-06
申请号：US10817215
申请日：2004-04-02
申请人： Xiang Zhu , Ming Qu , Yongmin Ge
发明人： Xiang Zhu , Ming Qu , Yongmin Ge
IPC分类号： H03L7/00 , H03L7/089 , H03L7/18
CPC分类号： H03L7/0896 , H03L7/18
摘要： A charge pump for a differential phase-locked loop (PLL) is provided. The charge pump includes a current switch configured to voltage to source and sink a current in a complementary fashion from a pair of differential output nodes. The charge pump includes a common-mode feedback loop to maintain the charging and discharging of the differential output nodes with respect to a common-mode voltage. Transconductance amplifiers are provided within the common-mode feedback loop to provide greater dynamic range to the charging and discharging of the differential output nodes.
摘要翻译：提供了一种用于差分锁相环（PLL）的电荷泵。电荷泵包括电流开关，其配置为以一对差分输出节点的互补方式对电流进行电压和吸收电流。电荷泵包括共模反馈回路，以保持差分输出节点相对于共模电压的充电和放电。在共模反馈回路内提供跨导放大器，为差分输出节点的充电和放电提供更大的动态范围。

6. 发明授权

US08982932B2 Active auxiliary channel buffering 有权
标题翻译：主动辅助通道缓冲
公开(公告)号：US08982932B2
公开(公告)日：2015-03-17
申请号：US12645240
申请日：2009-12-22
申请人： Ming Qu , Zhengyu Yuan , Kochung Lee
发明人： Ming Qu , Zhengyu Yuan , Kochung Lee
IPC分类号： H04B1/38 , H04L5/16 , G09G5/00 , H04L29/06 , H04L29/08
CPC分类号： G09G5/006 , G09G2330/021 , G09G2350/00 , G09G2370/045 , G09G2370/10 , H04L65/4023 , H04L65/4092 , H04L67/34
摘要： A system and a method for communicating configuration data between a source device and a sink are described. An active buffer receives data from an auxiliary communication channel which communicates data between the source device and the sink device. The active buffer modifies data received from the auxiliary communication channel. For example, the active buffer amplifies the received data or electrically reshapes the received data. The modified data is then transmitted from the active buffer to a destination device. In one embodiment, the auxiliary communication channel is bi-directional and upon receiving data from a first device, the active buffer is modified to permit uni-directional transmission of data from the first device to a second device.
摘要翻译：描述用于在源设备和宿之间传送配置数据的系统和方法。主动缓冲器从辅助通信信道接收数据，该辅助通信信道在源设备和宿设备之间传送数据。主动缓冲器修改从辅助通信信道接收到的数据。例如，有源缓冲器放大所接收的数据或电接收数据。然后将修改的数据从活动缓冲器发送到目的地设备。在一个实施例中，辅助通信信道是双向的，并且在从第一设备接收数据时，主动缓冲器被修改以允许将数据从第一设备单向传输到第二设备。

7. 发明授权

US08144625B2 DisplayPort auxiliary channel active buffer with auxiliary channel/display data channel combiner for fast auxiliary channel 有权
标题翻译： DisplayPort辅助通道主动缓冲器，辅助通道/显示数据通道组合器，用于快速辅助通道
公开(公告)号：US08144625B2
公开(公告)日：2012-03-27
申请号：US12643759
申请日：2009-12-21
申请人： Ming Qu , Zhengyu Yuan , Kochung Lee
发明人： Ming Qu , Zhengyu Yuan , Kochung Lee
IPC分类号： H04L12/28 , H04L1/00 , H04L12/26 , H03K5/01 , G06F13/00
CPC分类号： G06F3/14 , G09G5/003 , G09G5/363 , G09G2370/047 , G09G2370/12 , H04L43/16
摘要： A system and a method for exchanging communication data between devices using a bi-directional communication channel are disclosed. A combiner is coupled to a source device via first bi-directional configuration channel and to a sink device via a second bi-directional configuration channel. Upon receiving data from the first bi-directional configuration channel and not receiving data from the second bi-directional configuration channel, the combiner transmits the received data to the sink device using the second bi-directional configuration channel and prevents data transmission from the sink device to the source device using the second bi-directional configuration channel. Similarly, upon receiving data from the second bi-directional configuration channel and not receiving from the first bi-directional configuration channel, the combiner prevents data transmission from the source device to the sink device and transmits the received data to the source device using the first bi-directional configuration channel.
摘要翻译：公开了一种使用双向通信信道在设备之间交换通信数据的系统和方法。组合器经由第一双向配置信道耦合到源设备，并经由第二双向配置信道耦合到宿设备。在从第一双向配置信道接收数据并且没有从第二双向配置信道接收数据时，组合器使用第二双向配置信道将接收的数据发送到宿设备，并且防止从宿设备的数据传输使用第二双向配置信道到源设备。类似地，当从第二双向配置信道接收到数据并且没有从第一双向配置信道接收时，组合器防止从源设备到宿设备的数据传输，并且使用第一双向配置信道将接收到的数据发送到源设备双向配置通道。

8. 发明授权

US07212051B1 Control signal generation for a low jitter switched-capacitor frequency synthesizer 有权
标题翻译：低抖动开关电容频率合成器的控制信号产生
公开(公告)号：US07212051B1
公开(公告)日：2007-05-01
申请号：US11260097
申请日：2005-10-26
申请人： Xiang Zhu , Ming Qu , Zhengyu Yuan
发明人： Xiang Zhu , Ming Qu , Zhengyu Yuan
IPC分类号： H03L7/06 , G01R25/00
CPC分类号： H03L7/093 , H03L7/0893
摘要： A phase detector and control signal generator responds to a reference signal and a feedback signal to produce a non-delayed up and down signal. A programmable delay unit delays the non-delayed up and down signal to provide up and down signals for a charge pump. A divider configured to respond to the up and down signals provides a divided clock signal. A non-overlapped clock generator configured to respond to the divided clock signal to provide non-overlapped hold even and hold odd signals for the switched-capacitor ripple-smoothing filter.
摘要翻译：相位检测器和控制信号发生器响应于参考信号和反馈信号以产生非延迟上升和下降信号。可编程延迟单元延迟非延迟上升和下降信号以提供电荷泵的上下信号。配置为响应上升和下降信号的分频器提供分频时钟信号。非重叠时钟发生器被配置为响应分频时钟信号以提供非重叠保持均衡，并保持用于开关电容器纹波平滑滤波器的奇数信号。

9. 发明授权

US09106770B2 Column drivers with embedded high-speed video interface timing controller 有权
标题翻译：列驱动器具有嵌入式高速视频接口时序控制器
公开(公告)号：US09106770B2
公开(公告)日：2015-08-11
申请号：US13165749
申请日：2011-06-21
申请人： Xin Jin , Zhengyu Yuan , Ming Qu
发明人： Xin Jin , Zhengyu Yuan , Ming Qu
IPC分类号： G09G5/00 , H04N5/00 , G09G3/20
CPC分类号： H04N5/00 , G09G3/20 , G09G5/006 , G09G2310/0221 , G09G2310/027 , G09G2310/0281 , G09G2330/02 , G09G2330/028 , G09G2370/04 , G09G2370/08 , G09G2370/10
摘要： A system and method are disclosed for embedding a timing controller on column drivers which, among other advantages, reduces power consumption and size constraints. A standalone timing controller is eliminated by splitting a video input signal and delivering the signal to each of the column drivers. Timing controller functionality is embedded in each of the column drivers to allow the column drivers to process the received video signal. An auxiliary input used for communication between column drivers and an external system is received by a master column driver. The master column driver communicates with slave column drivers to enable point to point communication between each column driver and the external system.
摘要翻译：公开了一种用于将时序控制器嵌入列驱动器的系统和方法，其特征在于降低功耗和尺寸限制。通过分割视频输入信号并将信号传递给每个列驱动器来消除独立定时控制器。定时控制器功能嵌入在每个列驱动器中，以允许列驱动器处理接收到的视频信号。用于列驱动器和外部系统之间通信的辅助输入由主列驱动器接收。主列驱动程序与从列驱动程序通信，以实现每个列驱动程序和外部系统之间的点对点通信。

10. 发明授权

US09100555B2 Hybrid mode repeater/re-driver for high speed digital video signaling 有权
标题翻译：用于高速数字视频信号的混合模式中继器/重新驱动器
公开(公告)号：US09100555B2
公开(公告)日：2015-08-04
申请号：US13153245
申请日：2011-06-03
申请人： Hongquan Wang , Hongrong Zhang , Zhengyu Yuan , Ming Qu
发明人： Hongquan Wang , Hongrong Zhang , Zhengyu Yuan , Ming Qu
IPC分类号： H04N5/21 , G09G5/00
CPC分类号： H04N5/21 , G09G5/008 , G09G2330/022 , G09G2370/12
摘要： A system and a method are disclosed for a hybrid mode re-driver which, among other advantages, reduces power consumption while maintaining signal integrity. Equalization is performed on a signal to remove distortions such as inter-symbol interference. The signal is then analyzed and the quality of the signal is assessed. In some cases, retiming is then performed on the signal to remove additional signal distortions. In other cases, retiming is not performed and is transmitted to a driver while bypassing retiming components. When retiming components are bypassed, the retiming components are placed in a state of reduced power consumption to reduce system power consumption.
摘要翻译：公开了一种用于混合模式重新驱动器的系统和方法，除了其他优点之外，还能够在维持信号完整性的同时降低功耗。对信号执行均衡，以消除诸如符号间干扰的失真。然后分析信号并评估信号的质量。在某些情况下，对信号进行重新定时以消除额外的信号失真。在其他情况下，不执行重新定时，并在绕过重新定时组件的同时将其发送到驱动程序。当重新定时组件被旁路时，重新定时组件被置于降低功耗的状态以降低系统功耗。

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