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1. 发明申请

US20100224923A1 Semiconductor memory device and method of manufacturing the same 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20100224923A1
公开(公告)日：2010-09-09
申请号：US12659326
申请日：2010-03-04
申请人： Yong-Hoon Son , Jongwook Lee , Jung Ho Kim , SungWoo Hyun
发明人： Yong-Hoon Son , Jongwook Lee , Jung Ho Kim , SungWoo Hyun
IPC分类号： H01L27/108
CPC分类号： H01L27/108 , H01L27/10802 , H01L27/10844
摘要： Provided are a semiconductor memory device and a method of manufacturing the same. The semiconductor memory device may include a plurality of active pillars projecting from a semiconductor substrate, a gate pattern disposed on at least a portion of each of the active pillars with a gate insulator interposed therebetween, and a conductive line disposed on each of the active pillars and below the corresponding gate pattern, the conductive line may be insulated from the semiconductor substrate and the gate pattern, wherein each of the active pillars may include a drain region above the corresponding gate pattern, a body region adjacent to the corresponding gate pattern, and a source region that is in contact with the conductive line below the gate pattern.
摘要翻译：提供半导体存储器件及其制造方法。半导体存储器件可以包括从半导体衬底突出的多个有源柱，设置在每个有源柱的至少一部分上的栅极图案，其间插入栅极绝缘体，以及设置在每个有源柱上的导线并且在对应的栅极图案之下，导电线可以与半导体衬底和栅极图案绝缘，其中每个有源柱可以包括在相应的栅极图案上方的漏极区域，与相应的栅极图案相邻的主体区域，以及与栅极图案下方的导电线路接触的源极区域。

2. 发明授权

US08338873B2 Semiconductor memory device including active pillars and gate pattern 有权
标题翻译：半导体存储器件包括有源柱和栅极图案
公开(公告)号：US08338873B2
公开(公告)日：2012-12-25
申请号：US12659326
申请日：2010-03-04
申请人： Yong-Hoon Son , Jongwook Lee , Jung Ho Kim , SungWoo Hyun
发明人： Yong-Hoon Son , Jongwook Lee , Jung Ho Kim , SungWoo Hyun
IPC分类号： H01L27/108 , H01L21/336
CPC分类号： H01L27/108 , H01L27/10802 , H01L27/10844
摘要： Provided are a semiconductor memory device and a method of manufacturing the same. The semiconductor memory device may include a plurality of active pillars projecting from a semiconductor substrate, a gate pattern disposed on at least a portion of each of the active pillars with a gate insulator interposed therebetween, and a conductive line disposed on each of the active pillars and below the corresponding gate pattern, the conductive line may be insulated from the semiconductor substrate and the gate pattern, wherein each of the active pillars may include a drain region above the corresponding gate pattern, a body region adjacent to the corresponding gate pattern, and a source region that is in contact with the conductive line below the gate pattern.
摘要翻译：提供半导体存储器件及其制造方法。半导体存储器件可以包括从半导体衬底突出的多个有源柱，设置在每个有源柱的至少一部分上的栅极图案，其间插入栅极绝缘体，以及设置在每个有源柱上的导线并且在对应的栅极图案之下，导电线可以与半导体衬底和栅极图案绝缘，其中每个有源柱可以包括在相应的栅极图案上方的漏极区域，与相应的栅极图案相邻的主体区域，以及与栅极图案下方的导电线路接触的源极区域。

3. 发明申请

US20100140685A1 Nonvolatile Memory Devices 有权
标题翻译：非易失性存储器件
公开(公告)号：US20100140685A1
公开(公告)日：2010-06-10
申请号：US12635098
申请日：2009-12-10
申请人： Pil-Kyu Kang , Daelok Bae , Jongwook Lee , Seungwoo Choi , Yong-Hoon Son , Jong-Hyuk Kang , Jung Ho Kim
发明人： Pil-Kyu Kang , Daelok Bae , Jongwook Lee , Seungwoo Choi , Yong-Hoon Son , Jong-Hyuk Kang , Jung Ho Kim
IPC分类号： H01L27/115 , H01L21/8246
CPC分类号： H01L27/11578 , H01L27/115 , H01L27/11551 , H01L27/11556 , H01L27/11582
摘要： Nonvolatile memory devices and methods of manufacturing nonvolatile memory devices are provided. The method includes patterning a bulk substrate to form an active pillar; forming a charge storage layer on a side surface of active pillar; and forming a plurality of gates connected to the active pillar, the charge storage layer being disposed between the active pillar and the gates. Before depositing a gate, a bulk substrate is etched using a dry etching to form a vertical active pillar which is in a single body with a semiconductor substrate.
摘要翻译：提供了非易失性存储器件和制造非易失性存储器件的方法。该方法包括图案化大块基板以形成有源柱; 在活性柱的侧面上形成电荷存储层; 以及形成连接到所述有源支柱的多个栅极，所述电荷存储层设置在所述有源支柱和所述栅极之间。在沉积栅极之前，使用干蚀刻来蚀刻大块衬底以形成与半导体衬底在单体中的垂直有源柱。

4. 发明授权

US08163616B2 Methods of manufacturing nonvolatile memory devices 有权
标题翻译：制造非易失性存储器件的方法
公开(公告)号：US08163616B2
公开(公告)日：2012-04-24
申请号：US13238153
申请日：2011-09-21
申请人： Pil-Kyu Kang , Daelok Bae , Jongwook Lee , Seungwoo Choi , Yong-Hoon Son , Jong-Hyuk Kang , Jung Ho Kim
发明人： Pil-Kyu Kang , Daelok Bae , Jongwook Lee , Seungwoo Choi , Yong-Hoon Son , Jong-Hyuk Kang , Jung Ho Kim
IPC分类号： H01L21/336
CPC分类号： H01L27/11578 , H01L27/115 , H01L27/11551 , H01L27/11556 , H01L27/11582
摘要： Nonvolatile memory devices and methods of manufacturing nonvolatile memory devices are provided. The method includes patterning a bulk substrate to form an active pillar; forming a charge storage layer on a side surface of active pillar; and forming a plurality of gates connected to the active pillar, the charge storage layer being disposed between the active pillar and the gates. Before depositing a gate, a bulk substrate is etched using a dry etching to form a vertical active pillar which is in a single body with a semiconductor substrate.
摘要翻译：提供了非易失性存储器件和制造非易失性存储器件的方法。该方法包括图案化大块基板以形成有源柱; 在活性柱的侧面上形成电荷存储层; 以及形成连接到所述有源支柱的多个栅极，所述电荷存储层设置在所述有源支柱和所述栅极之间。在沉积栅极之前，使用干蚀刻来蚀刻大块衬底以形成与半导体衬底在单体中的垂直有源柱。

5. 发明申请

US20120009747A1 Methods of Manufacturing Nonvolatile Memory Devices 有权
标题翻译：制造非易失性存储器件的方法
公开(公告)号：US20120009747A1
公开(公告)日：2012-01-12
申请号：US13238153
申请日：2011-09-21
申请人： Pil-Kyu Kang , Daelok Bae , Jongwook Lee , Seungwoo Choi , Yong-Hoon Son , Jong-Hyuk Kang , Jung Ho Kim
发明人： Pil-Kyu Kang , Daelok Bae , Jongwook Lee , Seungwoo Choi , Yong-Hoon Son , Jong-Hyuk Kang , Jung Ho Kim
IPC分类号： H01L21/336
CPC分类号： H01L27/11578 , H01L27/115 , H01L27/11551 , H01L27/11556 , H01L27/11582
摘要： Nonvolatile memory devices and methods of manufacturing nonvolatile memory devices are provided. The method includes patterning a bulk substrate to form an active pillar; forming a charge storage layer on a side surface of active pillar; and forming a plurality of gates connected to the active pillar, the charge storage layer being disposed between the active pillar and the gates. Before depositing a gate, a bulk substrate is etched using a dry etching to form a vertical active pillar which is in a single body with a semiconductor substrate.
摘要翻译：提供了非易失性存储器件和制造非易失性存储器件的方法。该方法包括图案化大块基板以形成有源柱; 在活性柱的侧面上形成电荷存储层; 以及形成连接到所述有源支柱的多个栅极，所述电荷存储层设置在所述有源支柱和所述栅极之间。在沉积栅极之前，使用干蚀刻来蚀刻大块衬底以形成与半导体衬底在单体中的垂直有源柱。

6. 发明授权

US08053829B2 Methods of fabricating nonvolatile memory devices 有权
标题翻译：制造非易失性存储器件的方法
公开(公告)号：US08053829B2
公开(公告)日：2011-11-08
申请号：US12635098
申请日：2009-12-10
申请人： Pil-Kyu Kang , Daelok Bae , Jongwook Lee , Seungwoo Choi , Yong-Hoon Son , Jong-Hyuk Kang , Jung Ho Kim
发明人： Pil-Kyu Kang , Daelok Bae , Jongwook Lee , Seungwoo Choi , Yong-Hoon Son , Jong-Hyuk Kang , Jung Ho Kim
IPC分类号： H01L29/792
CPC分类号： H01L27/11578 , H01L27/115 , H01L27/11551 , H01L27/11556 , H01L27/11582
摘要： Nonvolatile memory devices and methods of manufacturing nonvolatile memory devices are provided. The method includes patterning a bulk substrate to form an active pillar; forming a charge storage layer on a side surface of active pillar; and forming a plurality of gates connected to the active pillar, the charge storage layer being disposed between the active pillar and the gates. Before depositing a gate, a bulk substrate is etched using a dry etching to form a vertical active pillar which is in a single body with a semiconductor substrate.
摘要翻译：提供了非易失性存储器件和制造非易失性存储器件的方法。该方法包括图案化大块基板以形成有源柱; 在活性柱的侧面上形成电荷存储层; 以及形成连接到所述有源支柱的多个栅极，所述电荷存储层设置在所述有源支柱和所述栅极之间。在沉积栅极之前，使用干蚀刻来蚀刻大块衬底以形成与半导体衬底在单体中的垂直有源柱。

7. 发明授权

US07432173B2 Methods of fabricating silicon-on-insulator substrates having a laser-formed single crystalline film 有权
标题翻译：制造具有激光成形单晶膜的绝缘体上硅衬底的方法
公开(公告)号：US07432173B2
公开(公告)日：2008-10-07
申请号：US11716894
申请日：2007-03-12
申请人： Sungkwan Kang , Yong-Hoon Son , Jongwook Lee , Yugyun Shin
发明人： Sungkwan Kang , Yong-Hoon Son , Jongwook Lee , Yugyun Shin
IPC分类号： H01L21/76
CPC分类号： H01L21/02675 , H01L21/02532 , H01L21/2026
摘要： In some methods of fabricating a silicon-on-insulator substrate, a semiconductor substrate is provided that includes a single crystalline structure within at least a defined region thereof. A first insulating film is formed on the defined region of the semiconductor substrate with an opening that exposes a portion of the defined region of the semiconductor substrate having the single crystalline structure. A first non-single crystalline film is formed on the exposed portion of the semiconductor substrate and that at least substantially fills the opening in the first insulating film. A laser beam is generated that heats the first non-single crystalline film to change the first non-single crystalline film into a first single crystalline film having substantially the same single crystalline structure as the defined region of the semiconductor substrate.
摘要翻译：在制造绝缘体上硅衬底的一些方法中，提供在其至少其限定区域内包括单晶结构的半导体衬底。在半导体衬底的限定区域上形成第一绝缘膜，该开口具有露出具有单晶结构的半导体衬底的限定区域的一部分的开口。第一非单晶膜形成在半导体衬底的暴露部分上，并且至少基本上填充第一绝缘膜中的开口。产生激光束，其加热第一非单晶膜以将第一非单晶膜改变成具有与半导体衬底的限定区域基本上相同的单晶结构的第一单晶膜。

8. 发明申请

US20070224789A1 Methods of fabricating silicon-on-insulator substrates having a laser-formed single crystalline film 有权
标题翻译：制造具有激光成形单晶膜的绝缘体上硅衬底的方法
公开(公告)号：US20070224789A1
公开(公告)日：2007-09-27
申请号：US11716894
申请日：2007-03-12
申请人： Sungkwan Kang , Yong-Hoon Son , Jongwook Lee , Yugyun Shin
发明人： Sungkwan Kang , Yong-Hoon Son , Jongwook Lee , Yugyun Shin
IPC分类号： H01L21/20
CPC分类号： H01L21/02675 , H01L21/02532 , H01L21/2026
摘要： In some methods of fabricating a silicon-on-insulator substrate, a semiconductor substrate is provided that includes a single crystalline structure within at least a defined region thereof. A first insulating film is formed on the defined region of the semiconductor substrate with an opening that exposes a portion of the defined region of the semiconductor substrate having the single crystalline structure. A first non-single crystalline film is formed on the exposed portion of the semiconductor substrate and that at least substantially fills the opening in the first insulating film. A laser beam is generated that heats the first non-single crystalline film to change the first non-single crystalline film into a first single crystalline film having substantially the same single crystalline structure as the defined region of the semiconductor substrate.
摘要翻译：在制造绝缘体上硅衬底的一些方法中，提供在其至少其限定区域内包括单晶结构的半导体衬底。在半导体衬底的限定区域上形成第一绝缘膜，该开口具有露出具有单晶结构的半导体衬底的限定区域的一部分的开口。第一非单晶膜形成在半导体衬底的暴露部分上，并且至少基本上填充第一绝缘膜中的开口。产生激光束，其加热第一非单晶膜以将第一非单晶膜改变成具有与半导体衬底的限定区域基本上相同的单晶结构的第一单晶膜。

9. 发明申请

US20100213524A1 Semiconductor memory device and method of manufacturing the same 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20100213524A1
公开(公告)日：2010-08-26
申请号：US12659076
申请日：2010-02-24
申请人： Sanghun Jeon , Jongwook Lee , Jong-Hyuk Kang , Heungkyu Park
发明人： Sanghun Jeon , Jongwook Lee , Jong-Hyuk Kang , Heungkyu Park
IPC分类号： H01L27/108
CPC分类号： H01L27/105 , H01L27/0688 , H01L27/108 , H01L27/10802 , H01L27/10844
摘要： A semiconductor memory device includes a plurality of active pillars protruding from a semiconductor substrate, a first gate electrode disposed on at least one sidewall of the active pillar, a first gate insulating layer being disposed between the active pillar and the first gate electrode, a second gate electrode disposed on at least one sidewall of the active pillar over the first gate electrode, a second gate insulating layer being disposed between the active pillar and the second gate electrode, first and second body regions in the active pillar adjacent to respective first and second respective electrodes, and first through third source/drain regions in the active pillar arranged alternately with the first and second body regions.
摘要翻译：半导体存储器件包括从半导体衬底突出的多个有源柱，设置在有源柱的至少一个侧壁上的第一栅电极，设置在有源柱和第一栅电极之间的第一栅极绝缘层，栅电极设置在所述有源柱的至少一个侧壁上，位于所述第一栅极上，第二栅极绝缘层，设置在所述有源柱和所述第二栅极之间，所述有源支柱中的第一和第二主体区域与相应的第一和第二栅极相邻; 各个电极以及有源柱中的第一至第三源极/漏极区域与第一和第二主体区域交替布置。

10. 发明授权

US07674660B2 Multilevel semiconductor device and method of manufacturing the same 失效
标题翻译：多层半导体器件及其制造方法
公开(公告)号：US07674660B2
公开(公告)日：2010-03-09
申请号：US11491396
申请日：2006-07-22
申请人： Yonghoon Son , Sungkwan Kang , Jongwook Lee
发明人： Yonghoon Son , Sungkwan Kang , Jongwook Lee
IPC分类号： H01L21/00 , H01L21/20
CPC分类号： H01L27/0688 , H01L21/76816 , H01L21/8221
摘要： A method of fabricating a multilevel semiconductor integrated circuit is provided, comprising: forming on a first active semiconductor structure a first plurality of transistors with respective gate structures disposed on a first substrate and source or drain regions disposed within the first substrate; depositing a first insulation layer on the first substrate and the gate structures; etching the insulation layer to form a plurality of openings exposing portions of the first substrate contacting the bottoms of the openings; forming a semiconductor seed layer filling the openings; forming an amorphous layer on the seed layer and the insulation layer; subjecting the first active semiconductor structure to at least one application of laser irradiation to transform the amorphous layer to a crystalline semiconductor layer having a protrusion region with a peak at or near the middle of two adjacent openings; forming on a second active semiconductor structure a second plurality of transistors with respective gate structures disposed on the crystalline semiconductor layer and forming a contact structure to electrically connect a transistor of the first active semiconductor structure to a transistor of the second active semiconductor structure.
摘要翻译：提供一种制造多电平半导体集成电路的方法，包括：在第一有源半导体结构上形成具有布置在第一衬底上的相应栅极结构的第一多个晶体管和设置在第一衬底内的源极或漏极区域; 在所述第一基板和所述栅极结构上沉积第一绝缘层; 蚀刻所述绝缘层以形成暴露所述第一基板的与所述开口的底部接触的部分的多个开口; 形成填充所述开口的半导体籽晶层; 在种子层和绝缘层上形成非晶层; 对所述第一有源半导体结构进行至少一次激光照射的施加以将所述非晶层转变为具有在两个相邻开口的中间处或附近具有峰值的突出区域的晶体半导体层; 在第二有源半导体结构上形成具有设置在所述晶体半导体层上的相应栅极结构的第二多个晶体管，并形成接触结构以将所述第一有源半导体结构的晶体管电连接到所述第二有源半导体结构的晶体管。

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