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1. 发明授权

US08102029B2 Wafer level buck converter 有权
公开(公告)号：US08102029B2
公开(公告)日：2012-01-24
申请号：US12262570
申请日：2008-10-31
申请人： Yong Liu , Qi Wang
发明人： Yong Liu , Qi Wang
IPC分类号： H01L29/40
CPC分类号： H01L23/481 , H01L21/6836 , H01L21/76898 , H01L24/83 , H01L25/074 , H01L2221/68327 , H01L2224/2929 , H01L2224/293 , H01L2224/83851 , H01L2924/00011 , H01L2924/01079 , H01L2924/13091 , H02M3/155 , H01L2224/29075 , H01L2924/00014
摘要： A buck converter module includes a high side (HS) die having source, drain, and gate bonding pads on a front side of the HS die, a low side (LS) die having a first section thereof with a plurality of through silicon vias (TSVs) extending from a back side to a front side of the LS die, the LS die having source, drain, and gate bonding pads located on a front side of a second section separate from the first section, the drain bonding pad electrically connected to the back side of the LS die in the second section. The HS die and the LS die are bonded together such that the source bonding pad of the HS die is electrically connected to the back side of the LS die, and each of the drain and gate bonding pads are electrically connected to separate TSVs in the LS die.

2. 发明申请

US20090079082A1 BONDING PAD STRUCTURE ALLOWING WIRE BONDING OVER AN ACTIVE AREA IN A SEMICONDUCTOR DIE AND METHOD OF MANUFACTURING SAME 审中-公开
标题翻译：粘合片结构允许在半导体器件中的活性区域上的线接合及其制造方法
公开(公告)号：US20090079082A1
公开(公告)日：2009-03-26
申请号：US11860217
申请日：2007-09-24
申请人： Yong Liu , Daniel Hahn , Scott Irving , Qi Wang
发明人： Yong Liu , Daniel Hahn , Scott Irving , Qi Wang
IPC分类号： H01L23/488 , H01L21/44
CPC分类号： H01L23/49811 , H01L21/4853 , H01L24/03 , H01L24/05 , H01L2224/02166 , H01L2224/05184 , H01L2224/05556 , H01L2224/05557 , H01L2224/05624 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01033 , H01L2924/01074 , H01L2924/01029
摘要： A wire bonding pad over an active area of a semiconductor die has grooves in two orthogonal sections thereof in the top surface of said wire bonding pad.
摘要翻译：在半导体管芯的有源区域上的引线接合焊盘在所述引线接合焊盘的顶表面中的两个正交部分具有凹槽。

3. 发明申请

US20120100670A1 WAFER LEVEL BUCK CONVERTER 有权
标题翻译： WAFER LEVEL BUCK转换器
公开(公告)号：US20120100670A1
公开(公告)日：2012-04-26
申请号：US13342446
申请日：2012-01-03
申请人： Yong Liu , Qi Wang
发明人： Yong Liu , Qi Wang
IPC分类号： H01L21/60
CPC分类号： H01L23/481 , H01L21/6836 , H01L21/76898 , H01L24/83 , H01L25/074 , H01L2221/68327 , H01L2224/2929 , H01L2224/293 , H01L2224/83851 , H01L2924/00011 , H01L2924/01079 , H01L2924/13091 , H02M3/155 , H01L2224/29075 , H01L2924/00014
摘要： A buck converter module includes a high side (HS) die having source, drain, and gate bonding pads on a front side of the HS die, a low side (LS) die having a first section thereof with a plurality of through silicon vias (TSVs) extending from a back side to a front side of the LS die, the LS die having source, drain, and gate bonding pads located on a front side of a second section separate from the first section, the drain bonding pad electrically connected to the back side of the LS die in the second section. The HS die and the LS die are bonded together such that the source bonding pad of the HS die is electrically connected to the back side of the LS die, and each of the drain and gate bonding pads are electrically connected to separate TSVs in the LS die.
摘要翻译：降压转换器模块包括在HS模头的正面上具有源极，漏极和栅极接合焊盘的高侧（HS）裸片，具有第一部分的多个通孔硅通孔的低侧（LS）裸片 TSV），所述LS模具具有位于与所述第一部分分离的第二部分的前侧上的源极，漏极和栅极接合焊盘，所述漏极接合焊盘电连接到第二部分LS模具的背面。 HS管芯和LS管芯结合在一起，使得HS管芯的源极焊盘电连接到LS管芯的背面，并且漏极和栅极焊盘中的每一个电连接到LS中的分离TSV 死。

4. 发明申请

US20100109129A1 WAFER LEVEL BUCK CONVERTER 有权
标题翻译： WAFER LEVEL BUCK转换器
公开(公告)号：US20100109129A1
公开(公告)日：2010-05-06
申请号：US12262570
申请日：2008-10-31
申请人： Yong Liu , Qi Wang
发明人： Yong Liu , Qi Wang
IPC分类号： H01L23/50 , H01L21/60
CPC分类号： H01L23/481 , H01L21/6836 , H01L21/76898 , H01L24/83 , H01L25/074 , H01L2221/68327 , H01L2224/2929 , H01L2224/293 , H01L2224/83851 , H01L2924/00011 , H01L2924/01079 , H01L2924/13091 , H02M3/155 , H01L2224/29075 , H01L2924/00014
摘要： A buck converter module includes a high side (HS) die having source, drain, and gate bonding pads on a front side of the HS die, a low side (LS) die having a first section thereof with a plurality of through silicon vias (TSVs) extending from a back side to a front side of the LS die, the LS die having source, drain, and gate bonding pads located on a front side of a second section separate from the first section, the drain bonding pad electrically connected to the back side of the LS die in the second section. The HS die and the LS die are bonded together such that the source bonding pad of the HS die is electrically connected to the back side of the LS die, and each of the drain and gate bonding pads are electrically connected to separate TSVs in the LS die.
摘要翻译：降压转换器模块包括在HS模头的正面上具有源极，漏极和栅极接合焊盘的高侧（HS）裸片，具有第一部分的多个通孔硅通孔的低侧（LS）裸片 TSV），所述LS模具具有位于与所述第一部分分离的第二部分的前侧上的源极，漏极和栅极接合焊盘，所述漏极接合焊盘电连接到第二部分LS模具的背面。 HS管芯和LS管芯结合在一起，使得HS管芯的源极焊盘电连接到LS管芯的背面，并且漏极和栅极焊盘中的每一个电连接到LS中的分离TSV 死。

5. 发明授权

US08222081B2 Wafer level buck converter 有权
标题翻译：晶圆级降压转换器
公开(公告)号：US08222081B2
公开(公告)日：2012-07-17
申请号：US13342446
申请日：2012-01-03
申请人： Yong Liu , Qi Wang
发明人： Yong Liu , Qi Wang
IPC分类号： H01L21/00
CPC分类号： H01L23/481 , H01L21/6836 , H01L21/76898 , H01L24/83 , H01L25/074 , H01L2221/68327 , H01L2224/2929 , H01L2224/293 , H01L2224/83851 , H01L2924/00011 , H01L2924/01079 , H01L2924/13091 , H02M3/155 , H01L2224/29075 , H01L2924/00014
摘要： A buck converter module includes a high side (HS) die having source, drain, and gate bonding pads on a front side of the HS die, a low side (LS) die having a first section thereof with a plurality of through silicon vias (TSVs) extending from a back side to a front side of the LS die, the LS die having source, drain, and gate bonding pads located on a front side of a second section separate from the first section, the drain bonding pad electrically connected to the back side of the LS die in the second section. The HS die and the LS die are bonded together such that the source bonding pad of the HS die is electrically connected to the back side of the LS die, and each of the drain and gate bonding pads are electrically connected to separate TSVs in the LS die.
摘要翻译：降压转换器模块包括在HS模头的正面上具有源极，漏极和栅极接合焊盘的高侧（HS）裸片，具有第一部分的多个通孔硅通孔的低侧（LS）裸片 TSV），所述LS模具具有位于与所述第一部分分离的第二部分的前侧上的源极，漏极和栅极接合焊盘，所述漏极接合焊盘电连接到第二部分LS模具的背面。 HS管芯和LS管芯结合在一起，使得HS管芯的源极焊盘电连接到LS管芯的背面，并且漏极和栅极焊盘中的每一个电连接到LS中的分离TSV 死。

6. 发明授权

US10311424B2 Indicia encoding system with integrated purchase and payment information 有权
公开(公告)号：US10311424B2
公开(公告)日：2019-06-04
申请号：US13885218
申请日：2010-12-09
申请人： Yong Liu , Xiaoxun Zhu , Jie Ren
发明人： Yong Liu , Xiaoxun Zhu , Jie Ren
IPC分类号： G06Q20/32 , G07G1/00 , G06Q30/06
摘要： An indicia encoding system is disclosed herein that encodes integrated information on products and/or services selected for purchase and payment information for purchasing the selected products and/or services, in accordance with a variety of embodiments involving various methods, devices and systems. In one illustrative embodiment, a method may include entering purchase order information via one or more input/output components. The purchase order may include an indication for one or more products and/or one or more services. The method may also include entering payment information, including information on a method of payment, via one or more input/output components. The method may also include generating a machine-readable indicia that encodes both the purchase order information and the payment information, with the payment information in an encrypted form; and displaying the machine-readable indicia on a screen.

7. 发明授权

US09479552B2 Recommender system for content delivery networks 有权
标题翻译：内容传送网络推荐系统
公开(公告)号：US09479552B2
公开(公告)日：2016-10-25
申请号：US13483329
申请日：2012-05-30
申请人： Ming Chen , Xiwang Yang , Yong Liu , Lei Zhang
发明人： Ming Chen , Xiwang Yang , Yong Liu , Lei Zhang
IPC分类号： G06F15/16 , H04L29/06 , G06Q10/10 , H04L29/08 , G06F12/00
CPC分类号： H04L65/4084 , G06Q10/10 , H04L67/22 , H04L67/2852 , H04L67/306
摘要： A device includes a processor. The processor is configured to determine a hit time for each of a plurality of content items based on at least one of users' history of access to the content items on content distribution clusters in a content distribution network, the users' past ratings of the content items, and social network information associated with the users. The hit time of a content item indicates a number of times that the content item is likely to be accessed by the users. The processor is further configured to compute caching priorities of the content items based on a caching policy of the device and the determined hit times, and initiate a redistribution, over a network, of the plurality of content items over the content distribution clusters of the content distribution network based on the caching priorities.
摘要翻译：设备包括处理器。处理器被配置为基于用户对内容分发网络中的内容分发群集上的内容项的访问历史中的至少一个来确定多个内容项中的每一个的命中时间，用户的内容的过去评级项目和与用户相关联的社交网络信息。内容项的命中时间表示内容项目可能被用户访问的次数。所述处理器还被配置为基于所述设备的高速缓存策略和所确定的命中次数来计算所述内容项的高速缓存优先级，以及通过所述内容的内容分发集群发起所述多个内容项目在网络上的再分配分销网络基于缓存优先级。

8. 发明授权

US09294164B2 Number of streams indication for WLAN 有权
标题翻译：无线局域网数据流指示
公开(公告)号：US09294164B2
公开(公告)日：2016-03-22
申请号：US12910608
申请日：2010-10-22
申请人： Hongyuan Zhang , Raja Banerjea , Yong Liu , Mao Yu
发明人： Hongyuan Zhang , Raja Banerjea , Yong Liu , Mao Yu
IPC分类号： H04J3/24 , H04H20/71 , H04L27/28 , H04B7/04 , H04B7/06 , H04L5/00 , H04L25/02
CPC分类号： H04B7/0452 , H04B7/0413 , H04B7/0669 , H04L5/0023 , H04L5/0048 , H04L5/005 , H04L5/0053 , H04L25/0226 , H04W84/12
摘要： In a method for generating a preamble of a data unit for transmission via a communication channel, an indication of a first number of spatial or space-time streams is included in a first field of the preamble. The first number of spatial or space-time streams corresponds to transmission of the data unit to a first receiver. One or more training sequences are included in a second field of the preamble. The preamble is formatted such that the first field of the preamble will be transmitted prior to the second field of the preamble being transmitted.
摘要翻译：在用于生成用于经由通信信道传输的数据单元的前导码的方法中，在前导码的第一字段中包括第一数量的空间或时空流的指示。第一数量的空间或时空流对应于数据单元向第一接收机的传输。一个或多个训练序列被包括在前导码的第二个字段中。格式化前置码使得前导码的第一字段将在正在发送的前导码的第二字段之前被发送。

9. 发明授权

US09178593B1 Directional channel measurement and interference avoidance 有权
标题翻译：定向通道测量和干扰避免
公开(公告)号：US09178593B1
公开(公告)日：2015-11-03
申请号：US12763019
申请日：2010-04-19
申请人： Yong Liu , Raja Banerjea , Hongyuan Zhang
发明人： Yong Liu , Raja Banerjea , Hongyuan Zhang
IPC分类号： H04B7/06
CPC分类号： H04W72/085 , H04B7/06 , H04B7/0617 , H04B7/0695 , H04B7/0834
摘要： A method in a communication network including a communication channel includes generating a first message, where the first message includes a field indicative of a direction along which a quality of the communication channel is to be measured, causing the first message to be transmitted to a target device, and receiving a second message responsive to the first message, where the second message includes at least one channel quality metric.
摘要翻译：包括通信信道的通信网络中的方法包括生成第一消息，其中第一消息包括指示要测量通信信道的质量的方向的字段，使得将第一消息发送到目标设备，并且响应于第一消息接收第二消息，其中第二消息包括至少一个信道质量度量。

10. 发明授权

US09098763B2 Encoded information reading terminal with replaceable imaging assembly 有权
标题翻译：带可更换成像组件的编码信息读取终端
公开(公告)号：US09098763B2
公开(公告)日：2015-08-04
申请号：US14396463
申请日：2012-05-08
申请人： Jun Lu , Yong Liu , Xi Tao , Feng Chen , Ynjiun Paul Wang
发明人： Jun Lu , Yong Liu , Xi Tao , Feng Chen , Ynjiun Paul Wang
IPC分类号： G06K7/10
CPC分类号： G06K7/10722 , G06K7/10009 , G06K7/10851 , G06K7/1413 , G06K19/06028 , H04N5/2251 , H04N5/23203 , H04N5/353 , H04N5/378
摘要： An encoded information reading (EIR) terminal can comprise a microprocessor communicatively coupled to a system bus, a memory, a communication interface, and a pluggable imaging assembly identified by a type identifier and configured to acquire an image comprising decodable indicia. The imaging assembly can comprise a two-dimensional image sensor configured to output an analog signal representative of the light reflected by an object located within the field of view of the imaging assembly. The EIR terminal can be configured to output, by processing the analog signal, the raw image data derived from the analog signal and/or a decoded message corresponding to the decodable indicia. The imaging assembly can be communicatively coupled to the system bus via an imaging assembly interface comprising a plurality of wires and a multi-pin connector. The imaging assembly interface can comprise one or more wires configured to carry the imaging assembly type identifier. The EIR terminal can be configured, responsive to receiving the type identifier via the one or more wires, to retrieve from the memory one or more imaging assembly configuration information items corresponding to the type identifier and/or to receive via the communication interface one or more imaging assembly configuration information items corresponding to the type identifier. The EIR terminal can be further configured to control the imaging assembly using the imaging assembly configuration information items.
摘要翻译：编码信息读取（EIR）终端可以包括通信地耦合到系统总线，存储器，通信接口和由类型标识符标识并被配置为获取包括可解码标记的图像的可插拔成像组件的微处理器。成像组件可以包括被配置为输出表示由位于成像组件的视场内的物体反射的光的模拟信号的二维图像传感器。 EIR终端可以被配置为通过处理模拟信号来输出从模拟信号导出的原始图像数据和/或对应于可解码标记的解码消息。成像组件可以经由包括多根电线和多针连接器的成像组件接口通信地耦合到系统总线。成像组件接口可以包括配置成承载成像组件类型标识符的一个或多个线。响应于经由一条或多条线路接收到类型标识符，可以配置EIR终端，以从存储器检索与该类型标识符相对应的一个或多个成像组件配置信息项和/或经由通信接口接收一个或多个对应于类型标识符的成像组件配置信息项。 EIR终端还可以被配置成使用成像组件配置信息项来控制成像组件。

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