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    • 1. 发明授权
    • Shift register
    • 移位寄存器
    • US07529333B2
    • 2009-05-05
    • US11586642
    • 2006-10-26
    • Binn KimHae Yeol KimHyung Nyuck ChoSoo Young YoonSeung Chan ChoiMin Doo ChunYong Ho Jang
    • Binn KimHae Yeol KimHyung Nyuck ChoSoo Young YoonSeung Chan ChoiMin Doo ChunYong Ho Jang
    • G11C19/00
    • G11C19/28
    • A shift register includes first and second stages for sequentially outputting scan pulses to drive first and second gate lines. One of the first and second stages includes a pull-up switching device connected to an enabling node of the one of the first and second stages; a first pull-down switching device connected to a first disabling node of the one of the first and second stages; a second pull-down switching device connected to a second disabling node of the one of the first and second stages; and a node controller. The node controller of the first stage controls the logic state of each of the enabling node of the first stage, the first disabling node of the first stage and the first disabling node of the second stage. The node controller of the second stage controls the logic state of each of the enabling node of the second stage, the second disabling node of the second stage and the second disabling node of the first stage.
    • 移位寄存器包括用于顺序地输出扫描脉冲以驱动第一和第二栅极线的第一和第二级。 第一级和第二级之一包括连接到第一级和第二级之一的使能节点的上拉开关器件; 连接到第一和第二级中的一个的第一禁用节点的第一下拉开关装置; 连接到第一和第二级中的一个的第二禁用节点的第二下拉开关装置; 和节点控制器。 第一级的节点控制器控制第一级的使能节点,第一级的第一禁用节点和第二级的第一禁用节点的每个的逻辑状态。 第二级的节点控制器控制第二级的使能节点,第二级的第二禁用节点和第一级的第二禁用节点的每个的逻辑状态。
    • 2. 发明授权
    • Driving circuit built-in liquid crystal display panel
    • 驱动电路内置液晶显示面板
    • US07679594B2
    • 2010-03-16
    • US11139622
    • 2005-05-31
    • Yong Ho JangBinn KimSoo Young Yoon
    • Yong Ho JangBinn KimSoo Young Yoon
    • G09G3/36
    • G02F1/1339G02F1/13452
    • A driving circuit built in liquid crystal display panel for increasing an area of a driving circuit by an overlap between the driving circuit and a sealant is disclosed. In the driving circuit built in the liquid crystal display panel, a liquid crystal cell matrix is provided in a display area of first and second substrates joined to each other by a sealant. A driving circuit is provided in a circuit area of a non-display area of the display panel at an outer portion of the display area to drive the liquid crystal cell matrix. A plurality of LOG-type signal lines are provided at a LOG area of the non-display area to supply a plurality of signals required for the driving circuit. The driving circuit area and the LOG area overlaps with the sealant.
    • 公开了一种内置于液晶显示面板中的驱动电路,用于通过驱动电路和密封剂之间的重叠来增加驱动电路的面积。 在内置于液晶显示面板的驱动电路中,液晶单元矩阵设置在通过密封剂彼此连接的第一和第二基板的显示区域中。 在显示区域的外部的显示面板的非显示区域的电路区域中设置驱动电路以驱动液晶单元矩阵。 在非显示区域的LOG区域设置多个LOG型信号线,以提供驱动电路所需的多个信号。 驱动电路区域和LOG区域与密封剂重叠。
    • 3. 发明授权
    • Gate driving apparatus and method for liquid crystal display
    • 门驱动装置及液晶显示方法
    • US07486268B2
    • 2009-02-03
    • US10825616
    • 2004-04-16
    • Yong Ho JangBinn KimSoo Young Yoon
    • Yong Ho JangBinn KimSoo Young Yoon
    • G09G3/36
    • G09G3/3688G09G2310/02G09G2310/0297G11C19/00G11C19/28
    • A gate driving apparatus for a liquid crystal display includes a shift register which is provided with first and second half-period clock signals having phases inverted with respect to each other and each having a pulse width of a half-period, first to fourth one-period clock signals having phases shifted sequentially and each having a pulse width of one period, a start pulse, a high-level supply voltage and a low-level supply voltage. The shift register generates a half-period output in response to the start pulse and the first and second half-period clock signals. The shift register also generates a one-period output at a half-period delay from an end time of the half-period output in response to any one of the first to fourth one-period clock signals.
    • 一种用于液晶显示器的门驱动装置,包括移位寄存器,该移位寄存器设置有相位相反的相位的第一和第二半周期时钟信号,并且每个具有半周期,第一至第四单位脉冲宽度, 周期时钟信号具有顺序移位的相位,并且各自具有一个周期的脉冲宽度,开始脉冲,高电平电源电压和低电平电源电压。 移位寄存器响应于起始脉冲和第一和第二半周期时钟信号产生半周期输出。 移位寄存器还响应于第一至第四单周期时钟信号中的任何一个,从半周期输出的结束时间以半周期延迟产生一个周期输出。
    • 4. 发明授权
    • Shift register
    • 移位寄存器
    • US08253680B2
    • 2012-08-28
    • US12336949
    • 2008-12-17
    • Yong Ho JangBinn KimSoo Young Yoon
    • Yong Ho JangBinn KimSoo Young Yoon
    • G09G3/36
    • G11C19/28
    • A shift register includes a plurality of stages for sequentially outputting scan pulses to drive a plurality of gate lines, wherein each of the stages includes a set node, a pull-up switching device for outputting a corresponding scan pulse according to a logic state of the set node, at least two reset nodes, at least two pull-down switching devices, each of the pull-down switching devices being connected to a corresponding reset node to output an off voltage according to a voltage level of the corresponding reset node, and a node controller for controlling logic states of the nodes of a corresponding stage and logic states of the nodes of stages different from the corresponding stage together, wherein the node controllers of the stages control an output order of the scan pulses from the stages according to a forward voltage and reverse voltage having opposite phases.
    • 移位寄存器包括用于顺序地输出扫描脉冲以驱动多条栅极线的多个级,其中每个级包括一个设定节点,上拉开关装置,用于根据逻辑状态输出相应的扫描脉冲 至少两个复位节点,至少两个下拉开关器件,每个下拉开关器件连接到相应的复位节点,以根据相应复位节点的电压电平输出关断电压;以及 节点控制器,用于控制相应级的节点的逻辑状态以及不同于对应级的级的节点的逻辑状态,其中级的节点控制器根据一个控制器级控制来自级的扫描脉冲的输出次序 具有相反相位的正向电压和反向电压。
    • 5. 发明授权
    • Shift register
    • 移位寄存器
    • US07327161B2
    • 2008-02-05
    • US11440130
    • 2006-05-25
    • Yong Ho JangBinn KimSoo Young Yoon
    • Yong Ho JangBinn KimSoo Young Yoon
    • H03K19/173
    • G11C19/287
    • A shift register which is capable of performing bi-directional scanning is disclosed. The shift register includes first and second voltage input lines to which first and second voltages are input, respectively with the phases of the first and second voltages being opposite to each other; a plurality of stages dependently connected to a plurality of clock signal input lines which input a plurality of clock signals whose phases are sequentially delayed, wherein each stage includes: a scan direction controller to selectively output the first and second voltages thereto, according to first and second start pulses, and for controlling scan direction, a node controller to control voltages of first and second nodes according to a signal output from the scan direction controller, and an output unit to output a clock signal from one of the plurality of clock signal input lines thereto according to the voltage of each of the first and second nodes. The shift register can perform forward and reverse direction scans as first and second voltages whose phases are opposite to one another are selectively output thereto according to output signals from previous and next stages.
    • 公开了能执行双向扫描的移位寄存器。 移位寄存器包括分别输入第一和第二电压的第一和第二电压输入线,第一和第二电压的相位彼此相反; 多个级依赖性地连接到多个时钟信号输入线,所述多个时钟信号输入线输入相位相继延迟的多个时钟信号,其中每个级包括:扫描方向控制器,用于根据第一和第 第二起始脉冲,并且为了控制扫描方向,节点控制器根据从扫描方向控制器输出的信号来控制第一和第二节点的电压;以及输出单元,从多个时钟信号输入中的一个输出时钟信号 根据第一和第二节点中的每一个的电压对其进行线路。 移位寄存器可以根据来自上一级和下一级的输出信号选择性地向其输出相位彼此相反的第一和第二电压的正向和反向扫描。
    • 6. 发明授权
    • Gate driver for driving gate lines of display device and method for driving the same
    • 用于驱动显示装置的栅极线的栅极驱动器及其驱动方法
    • US07859507B2
    • 2010-12-28
    • US11479191
    • 2006-06-29
    • Yong Ho JangBinn KimSoo Young Yoon
    • Yong Ho JangBinn KimSoo Young Yoon
    • G09G3/36G11C19/00
    • G09G3/3677G09G2310/0205G09G2320/0223G11C19/28
    • A driving circuit of a display device and a method for driving the display device are disclosed which are capable of reducing distortion of scan pulses supplied to gate lines of a liquid crystal panel. The driving circuit includes a first shift register for sequentially supplying first scan pulses to one-side ends of gate lines included in a display, respectively, to sequentially drive the gate lines, the first shift register simultaneously driving at least two adjacent ones of the gate lines for a predetermined period of time, and a second shift register for sequentially supplying second scan pulses to the other-side ends of the gate lines, respectively, to sequentially drive the gate lines, the second shift register simultaneously driving at least two adjacent ones of the gate lines for a predetermined period of time.
    • 公开了显示装置的驱动电路和驱动显示装置的方法,其能够减少提供给液晶面板的栅极线的扫描脉冲的失真。 驱动电路包括:第一移位寄存器,用于分别顺序地将包括在显示器中的栅极线的一侧端部提供第一扫描脉冲以依次驱动栅极线,第一移位寄存器同时驱动至少两个相邻的栅极 线路,以及第二移位寄存器,用于分别顺序地向栅极线的另一侧端提供第二扫描脉冲以顺序地驱动栅极线,第二移位寄存器同时驱动至少两个相邻的栅极线 的栅极线在预定的时间段内。
    • 7. 发明申请
    • SHIFT REGISTER
    • 移位寄存器
    • US20090256794A1
    • 2009-10-15
    • US12336949
    • 2008-12-17
    • Yong Ho JangBinn KimSoo Young Yoon
    • Yong Ho JangBinn KimSoo Young Yoon
    • G09G3/36
    • G11C19/28
    • A shift register includes a plurality of stages for sequentially outputting scan pulses to drive a plurality of gate lines, wherein each of the stages includes a set node, a pull-up switching device for outputting a corresponding scan pulse according to a logic state of the set node, at least two reset nodes, at least two pull-down switching devices, each of the pull-down switching devices being connected to a corresponding reset node to output an off voltage according to a voltage level of the corresponding reset node, and a node controller for controlling logic states of the nodes of a corresponding stage and logic states of the nodes of stages different from the corresponding stage together, wherein the node controllers of the stages control an output order of the scan pulses from the stages according to a forward voltage and reverse voltage having opposite phases.
    • 移位寄存器包括用于顺序地输出扫描脉冲以驱动多条栅极线的多个级,其中每个级包括一个设定节点,上拉开关装置,用于根据逻辑状态输出相应的扫描脉冲 至少两个复位节点,至少两个下拉开关器件,每个下拉开关器件连接到相应的复位节点,以根据相应复位节点的电压电平输出关断电压;以及 节点控制器,用于控制相应级的节点的逻辑状态以及不同于对应级的级的节点的逻辑状态,其中级的节点控制器根据一个控制器级控制来自级的扫描脉冲的输出次序 具有相反相位的正向电压和反向电压。
    • 8. 发明授权
    • Built-in gate driver and display device having the same
    • 内置门驱动器和显示器具有相同的功能
    • US07505023B2
    • 2009-03-17
    • US11166826
    • 2005-06-23
    • Yong Ho JangBinn KimSu Hwan MoonSoo Young Yoon
    • Yong Ho JangBinn KimSu Hwan MoonSoo Young Yoon
    • G09G3/36
    • G09G3/3674G09G2320/043G11C19/28
    • A built-in gate driver having an improved reliability and a display device having the same are provided. A transistor controlled by an output signal of a next stage is further provided and thus a node (Q) is rapidly discharged. Accordingly, the multi-output signals due to the reduced discharge of the node (Q) caused by the degradation of the transistor controlled by a node QB can be prevented. By including only one transistor for controlling the charge of the start pulse signal on the node (Q), it is possible to prevent a malfunction from occurring when the transistor connected to the clock is degraded by the periodic clock of a high state. Also, an image quality and the reliability of the gate driver can be improved.
    • 提供具有改善的可靠性的内置栅极驱动器和具有其的显示装置。 进一步提供由下一级的输出信号控制的晶体管,因此节点(Q)被快速放电。 因此,可以防止由于由节点QB控制的晶体管的劣化引起的节点(Q)的放电减少的多输出信号。 通过仅包含一个用于控制节点(Q)上的起始脉冲信号的电荷的晶体管,当连接到时钟的晶体管被​​高电平的周期性时钟降级时,可以防止发生故障。 此外,可以提高图像质量和栅极驱动器的可靠性。