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1. 发明授权

US09565120B2 Method and system for performing distributed deep-packet inspection 有权
标题翻译：执行分布式深度包检测的方法和系统
公开(公告)号：US09565120B2
公开(公告)日：2017-02-07
申请号：US13361169
申请日：2012-01-30
申请人： Yoav Levy , David Ivancovsky , Doron Tal , Gal Sitton , Asaf Koren
发明人： Yoav Levy , David Ivancovsky , Doron Tal , Gal Sitton , Asaf Koren
IPC分类号： H04L12/841 , H04L12/853 , H04L29/06
CPC分类号： H04L47/283 , H04L47/2416 , H04L63/0245 , H04L63/1416
摘要： A method for deep-packet inspection of packets flowing through an end unit in a point-to-multipoint network. The method comprises classifying packet flows through the end unit using their flow-identification (ID) to determine which of the packet flows should be deep-packet inspected, wherein the packet flows include incoming packets received from a central unit and outgoing packets sent to the central unit of the point-to-multipoint network; duplicating packets determined to be deep-packet inspected; saving all duplicated packets in a memory; upon collection of a predefined number of duplicated packets belonging to a certain flow-ID, performing deep-packet processing based on at least one deep-packet inspection application; and saving the deep-packet processing results in the memory.
摘要翻译：一种用于深度分组检测流量通过点对多点网络中的终端单元的分组的方法。该方法包括使用其流标识（ID）对通过终端单元的分组流进行分类，以确定哪个分组流应该被深度分组检查，其中，分组流包括从中央单元接收的输入分组，以及发送到点对多点网络的中心单元; 复制确定为深度数据包检测的数据包; 将所有重复的数据包保存在存储器中; 在收集属于特定流ID的预定数量的复制分组的基础上，基于至少一个深分组检查应用执行深度分组处理; 并将深度包处理结果保存在存储器中。

2. 发明申请

US20130195457A1 METHOD AND SYSTEM FOR PERFORMING DISTRIBUTED DEEP-PACKET INSPECTION 有权
标题翻译：用于执行分布式深层包装检测的方法和系统
公开(公告)号：US20130195457A1
公开(公告)日：2013-08-01
申请号：US13361169
申请日：2012-01-30
申请人： Yoav Levy , David Ivancovsky , Doron Tal , Gal Sitton , Asaf Koren
发明人： Yoav Levy , David Ivancovsky , Doron Tal , Gal Sitton , Asaf Koren
IPC分类号： H04L12/56 , H04J14/00
CPC分类号： H04L47/283 , H04L47/2416 , H04L63/0245 , H04L63/1416
摘要： A method for deep-packet inspection of packets flowing through an end unit in a point-to-multipoint network. The method comprises classifying packet flows through the end unit using their flow-identification (ID) to determine which of the packet flows should be deep-packet inspected, wherein the packet flows include incoming packets received from a central unit and outgoing packets sent to the central unit of the point-to-multipoint network; duplicating packets determined to be deep-packet inspected; saving all duplicated packets in a memory; upon collection of a predefined number of duplicated packets belonging to a certain flow-ID, performing deep-packet processing based on at least one deep-packet inspection application; and saving the deep-packet processing results in the memory.
摘要翻译：一种用于深度分组检测流量通过点对多点网络中的终端单元的分组的方法。该方法包括使用其流标识（ID）对通过终端单元的分组流进行分类，以确定哪个分组流应该被深度分组检查，其中，分组流包括从中央单元接收的输入分组，以及发送到点对多点网络的中心单元; 复制确定为深度数据包检测的数据包; 将所有重复的数据包保存在存储器中; 在收集属于某个流ID的预定数量的复制分组的基础上，基于至少一个深分组检查应用执行深度分组处理; 并将深度包处理结果保存在存储器中。

3. 发明授权

US08451864B2 Passive optical network processor with a programmable data path 有权
标题翻译：无源光网络处理器具有可编程数据路径
公开(公告)号：US08451864B2
公开(公告)日：2013-05-28
申请号：US12821931
申请日：2010-06-23
申请人： Gal Sitton , Asaf Koren , Eliezer Weitz , Ifat Naaman , Igor Ternovsky , Igor Elkanovich
发明人： Gal Sitton , Asaf Koren , Eliezer Weitz , Ifat Naaman , Igor Ternovsky , Igor Elkanovich
IPC分类号： H04J14/00
CPC分类号： H04B10/27 , H04J14/0247 , H04J14/0252 , H04J14/0254 , H04J14/0269 , H04J14/0282 , H04Q11/0067 , H04Q2011/0084
摘要： A passive optical network (PON) processor comprises a packet processor for processing packets belonging to a certain flow through a plurality of processing stages of a programmable data-path; a microprocessor-data for performing one or more user-defined functions in the programmable data-path on designated packets belonging to the certain flow, wherein packets of respective flows to be processed by the microprocessor-data are designated in a flow table; a microprocessor-control for managing connections handled by the PON processor; a data-path bus for connecting the packet processor and the microprocessor-data, wherein the designated packets are transferred between the packet processor and the microprocessor-data on the data-path bus; and a control-path bus for connecting the packet processor and the microprocessor-control.
摘要翻译：无源光网络（PON）处理器包括：分组处理器，用于处理属于通过可编程数据路径的多个处理级的特定流的分组; 用于在属于该特定流的指定分组上的可编程数据路径中执行一个或多个用户定义的功能的微处理器数据，其中由微处理器数据处理的相应流的分组在流表中被指定; 用于管理由PON处理器处理的连接的微处理器控制; 用于连接分组处理器和微处理器数据的数据路径总线，其中指定分组在分组处理器和数据路径总线上的微处理器数据之间传送; 以及用于连接分组处理器和微处理器控制的控制路径总线。

4. 发明申请

US20110318002A1 PASSIVE OPTICAL NETWORK PROCESSOR WITH A PROGRAMMABLE DATA PATH 有权
标题翻译：被动光网络处理器与可编程数据路径
公开(公告)号：US20110318002A1
公开(公告)日：2011-12-29
申请号：US12821931
申请日：2010-06-23
申请人： Gal Sitton , Asaf Koren , Eliezer Weitz , Ifat Naaman , Igor Ternovsky , Igor Elkanovich
发明人： Gal Sitton , Asaf Koren , Eliezer Weitz , Ifat Naaman , Igor Ternovsky , Igor Elkanovich
IPC分类号： H04J14/00
CPC分类号： H04B10/27 , H04J14/0247 , H04J14/0252 , H04J14/0254 , H04J14/0269 , H04J14/0282 , H04Q11/0067 , H04Q2011/0084
摘要： A passive optical network (PON) processor comprises a packet processor for processing packets belonging to a certain flow through a plurality of processing stages of a programmable data-path; a microprocessor-data for performing one or more user-defined functions in the programmable data-path on designated packets belonging to the certain flow, wherein packets of respective flows to be processed by the microprocessor-data are designated in a flow table; a microprocessor-control for managing connections handled by the PON processor; a data-path bus for connecting the packet processor and the microprocessor-data, wherein the designated packets are transferred between the packet processor and the microprocessor-data on the data-path bus; and a control-path bus for connecting the packet processor and the microprocessor-control.
摘要翻译：无源光网络（PON）处理器包括：分组处理器，用于处理属于通过可编程数据路径的多个处理级的特定流的分组; 用于在属于该特定流的指定分组上的可编程数据路径中执行一个或多个用户定义的功能的微处理器数据，其中由微处理器数据处理的相应流的分组在流表中被指定; 用于管理由PON处理器处理的连接的微处理器控制; 用于连接分组处理器和微处理器数据的数据路径总线，其中指定分组在分组处理器和数据路径总线上的微处理器数据之间传送; 以及用于连接分组处理器和微处理器控制的控制路径总线。

5. 发明授权

US08555104B2 Frequency adapter utilized in high-speed internal buses 有权
标题翻译：频率适配器用于高速内部总线
公开(公告)号：US08555104B2
公开(公告)日：2013-10-08
申请号：US12686714
申请日：2010-01-13
申请人： Asaf Koren , David Avishai , Limor Yonatani , Yariv Aviram , Jacob Harel
发明人： Asaf Koren , David Avishai , Limor Yonatani , Yariv Aviram , Jacob Harel
IPC分类号： G06F1/04 , G06F13/14 , G06F13/36 , G06F15/00
CPC分类号： G06F5/06 , G06F1/12
摘要： A frequency adapter for synchronizing data transfers between a low-frequency module and a high-frequency module connected to an internal bus. The frequency adapter includes a low-to-high synchronization unit for synchronizing data transfers from the low frequency module to the high-frequency module, wherein the low-to-high synchronization unit is clocked by a low frequency clock; and a high-to-low synchronization unit for synchronizing data transfers from the high frequency module to the low-frequency module, wherein the high-to-low synchronization unit is clocked by a low frequency clock.
摘要翻译：一种频率适配器，用于在低频模块和连接到内部总线的高频模块之间进行数据传输。所述频率适配器包括用于同步从低频模块到高频模块的数据传输的低到高同步单元，其中所述低到高同步单元由低频时钟计时; 以及从高频模块到低频模块的数据传输同步的高到低的同步单元，其中由高频到低频的时钟来计时。

6. 发明申请

US20120263462A1 Network Processor for Supporting Residential Gateway Applications 有权
标题翻译：用于支持住宅网关应用的网络处理器
公开(公告)号：US20120263462A1
公开(公告)日：2012-10-18
申请号：US13086753
申请日：2011-04-14
申请人： Asaf Koren , Ifat Naaman , Eliezer Weitz , Alex Goldstein , Yariv Aviram
发明人： Asaf Koren , Ifat Naaman , Eliezer Weitz , Alex Goldstein , Yariv Aviram
IPC分类号： H04L12/56 , H04J14/00
CPC分类号： H04L45/60 , H04L12/2834 , H04L12/2898
摘要： A network processor for performing residential gateway processing tasks. The network processor includes a first cluster of packet processors and a second cluster of packet processors, wherein each of the first cluster and the second cluster includes a main packet processor and a secondary packet processor, wherein the main packet processor performs at least routing of incoming packets and the secondary packet processor performs off-loading tasks for the main packet processor; a plurality of Ethernet media access control (MAC) adapters for interfacing with a plurality of subscriber devices connected to a residential gateway; an external-network MAC adapter for interfacing with a wide area network (WAN) connected to the network processor; and an ingress handler for at least load balancing the processing of packets between the first cluster and the second cluster.
摘要翻译：一种用于执行住宅网关处理任务的网络处理器。网络处理器包括分组处理器的第一簇和分组处理器的第二簇，其中第一簇和第二簇中的每一个包括主分组处理器和辅分组处理器，其中主分组处理器至少执行路由选择分组和次分组处理器执行主分组处理器的卸载任务; 用于与连接到住宅网关的多个订户设备进行接口的多个以太网媒体接入控制（MAC）适配器; 用于与连接到网络处理器的广域网（WAN）进行接口的外部网络MAC适配器; 以及用于至少负载平衡在第一集群和第二集群之间的分组的处理的进入处理器。

7. 发明授权

US07801161B2 Gigabit passive optical network (GPON) residential gateway 有权
标题翻译：千兆无源光网络（GPON）住宅网关
公开(公告)号：US07801161B2
公开(公告)日：2010-09-21
申请号：US12254187
申请日：2008-10-20
申请人： Gil Levy , Eliezer Weitz , Michael Balter , Ifat Naaman , Asaf Koren
发明人： Gil Levy , Eliezer Weitz , Michael Balter , Ifat Naaman , Asaf Koren
IPC分类号： H04L12/28 , H04L12/56 , H04J3/16 , H04J14/00 , H04B10/20
CPC分类号： H04Q11/0067 , H04J3/1694 , H04L12/2861 , H04L12/2898 , H04Q11/0071
摘要： A gigabit passive optical network (GPON) residential gateway comprising a microprocessor for at least processing packets including voice data and packets including video data; dual packet processors for performing GPON and residential gateway processing tasks; a plurality of Ethernet media access control (MAC) adapters for interfacing with a plurality of subscriber devices; a GPON MAC adapter for interfacing with an optical line terminal (OLT) of the GPON; and a digital signal processor (DSP) for processing voice signals.
摘要翻译：千兆无源光网络（GPON）住宅网关，其包括用于至少处理包括语音数据和包括视频数据的分组的分组的微处理器; 用于执行GPON和住宅网关处理任务的双包处理器; 用于与多个订户设备进行接口的多个以太网媒体接入控制（MAC）适配器; 用于与GPON的光线路终端（OLT）进行接口的GPON MAC适配器; 以及用于处理语音信号的数字信号处理器（DSP）。

8. 发明授权

US08817799B2 Network processor for supporting residential gateway applications 有权
标题翻译：用于支持住宅网关应用的网络处理器
公开(公告)号：US08817799B2
公开(公告)日：2014-08-26
申请号：US13086753
申请日：2011-04-14
申请人： Asaf Koren , Ifat Naaman , Eliezer Weitz , Alex Goldstein , Yariv Aviram
发明人： Asaf Koren , Ifat Naaman , Eliezer Weitz , Alex Goldstein , Yariv Aviram
IPC分类号： H04L12/28
CPC分类号： H04L45/60 , H04L12/2834 , H04L12/2898
摘要： A network processor for performing residential gateway processing tasks. The network processor includes a first cluster of packet processors and a second cluster of packet processors, wherein each of the first cluster and the second cluster includes a main packet processor and a secondary packet processor, wherein the main packet processor performs at least routing of incoming packets and the secondary packet processor performs off-loading tasks for the main packet processor; a plurality of Ethernet media access control (MAC) adapters for interfacing with a plurality of subscriber devices connected to a residential gateway; an external-network MAC adapter for interfacing with a wide area network (WAN) connected to the network processor; and an ingress handler for at least load balancing the processing of packets between the first cluster and the second cluster.
摘要翻译：一种用于执行住宅网关处理任务的网络处理器。网络处理器包括分组处理器的第一簇和分组处理器的第二簇，其中第一簇和第二簇中的每一个包括主分组处理器和辅分组处理器，其中主分组处理器至少执行路由选择分组和次分组处理器执行主分组处理器的卸载任务; 用于与连接到住宅网关的多个订户设备进行接口的多个以太网媒体接入控制（MAC）适配器; 用于与连接到网络处理器的广域网（WAN）进行接口的外部网络MAC适配器; 以及用于至少负载平衡在第一集群和第二集群之间的分组的处理的进入处理器。

9. 发明申请

US20110173481A1 FREQUENCY ADAPTER UTILIZED IN HIGH-SPEED INTERNAL BUSES 有权
标题翻译：频率适配器应用于高速内部总线
公开(公告)号：US20110173481A1
公开(公告)日：2011-07-14
申请号：US12686714
申请日：2010-01-13
申请人： Asaf Koren , David Avishai , Limor Yonatani , Yariv Aviram , Jacob Harel
发明人： Asaf Koren , David Avishai , Limor Yonatani , Yariv Aviram , Jacob Harel
IPC分类号： G06F1/04 , G06F13/42
CPC分类号： G06F5/06 , G06F1/12
摘要： A frequency adapter for synchronizing data transfers between a low-frequency module and a high-frequency module connected to an internal bus. The frequency adapter includes a low-to-high synchronization unit for synchronizing data transfers from the low frequency module to the high-frequency module, wherein the low-to-high synchronization unit is clocked by a low frequency clock; and a high-to-low synchronization unit for synchronizing data transfers from the high frequency module to the low-frequency module, wherein the high-to-low synchronization module is clocked by a low frequency clock.
摘要翻译：一种频率适配器，用于在低频模块和连接到内部总线的高频模块之间进行数据传输。所述频率适配器包括用于同步从低频模块到高频模块的数据传输的低到高同步单元，其中所述低到高同步单元由低频时钟计时; 以及用于同步从高频模块到低频模块的数据传输的高到低的同步单元，其中，从低到低的同步模块由低频时钟计时。

10. 发明申请

US20080056731A1 Circuit for detecting optical failures in a passive optical network 有权
标题翻译：用于检测无源光网络中的光学故障的电路
公开(公告)号：US20080056731A1
公开(公告)日：2008-03-06
申请号：US11514937
申请日：2006-09-05
申请人： Raviv Weber , Asaf Koren
发明人： Raviv Weber , Asaf Koren
IPC分类号： H04B10/04
CPC分类号： H04B10/0793 , H04B10/07955 , H04Q11/0067 , H04Q2011/0079
摘要： A circuit for detecting optical failures in a passive optical network (PON) wherein digital burst data transmitted by an optical transmitter is monitored by a photodiode, includes a power determination unit coupled to the photodiode for providing measurements of an output optical power of a high logic level and a low logic level of the digital burst data during ON times of the optical transmitter and for providing a measurement of an output optical power during OFF times of the optical transmitter. A logic unit coupled to the power determination unit is responsive to the measurements for generating control and calibration signals. Such a circuit may be used for detecting rogue optical network unit (ONU) failure or eye safety hazards in a passive optical network (PON) wherein digital burst data transmitted by an optical transmitter is monitored by a photodiode.
摘要翻译：一种用于检测无源光网络（PON）中的光学故障的电路，其中由光发射机传输的数字突发数据由光电二极管监测，包括耦合到光电二极管的功率确定单元，用于提供高逻辑的输出光功率的测量值在光发射机的接通时间期间数字脉冲数据的电平和低逻辑电平，并且用于在光发射机的OFF时间期间提供输出光功率的测量。耦合到功率确定单元的逻辑单元响应于用于产生控制和校准信号的测量。这样的电路可以用于检测无源光网络（PON）中的流氓光网络单元（ONU）故障或眼睛安全隐患，其中由光发射机发送的数字突发数据由光电二极管监测。

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