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1. 发明授权

US6097041A Light-emitting diode with anti-reflector 失效
标题翻译：发光二极管带防反射器
公开(公告)号：US6097041A
公开(公告)日：2000-08-01
申请号：US138992
申请日：1998-08-24
申请人： Ying-Fu Lin , Liang-Tung Chang , Shiang-Peng Cheng , Kuan-Chu Kuo , Chiao-Yun Lin , Fu-Chou Liu
发明人： Ying-Fu Lin , Liang-Tung Chang , Shiang-Peng Cheng , Kuan-Chu Kuo , Chiao-Yun Lin , Fu-Chou Liu
IPC分类号： H01L33/10 , H01L33/00
CPC分类号： H01L33/105
摘要： A light emitting diode includes a semiconductor substrate of a first conductivity type. A first electrode is formed on a part of the substrate. A reflection stack of the first conductivity type is formed on the substrate. An active layer is then formed on the reflection stack. An anti-reflection stack of a second conductivity type is grown on the active layer, and the anti-reflection stack consists of a plurality of layers, wherein each layer has a thickness of (m+1).lambda./2, where m is zero or a positive integer and .lambda. is a wavelength of radiation generated by the active layer. A window layer of the second conductivity type is formed on the anti-reflection stack. A second electrode is then formed on a part of the window layer.
摘要翻译：发光二极管包括第一导电类型的半导体衬底。第一电极形成在基板的一部分上。在基板上形成第一导电类型的反射叠层。然后在反射叠层上形成有源层。在有源层上生长第二导电类型的抗反射叠层，并且抗反射叠层由多个层组成，其中每层具有（m + 1）λ/ 2的厚度，其中m为零或正整数，λ是由有源层产生的辐射的波长。第二导电类型的窗口层形成在防反射叠层上。然后在窗口层的一部分上形成第二电极。

2. 发明授权

US06169298A Semiconductor light emitting device with conductive window layer 有权
标题翻译：具有导电窗层的半导体发光器件
公开(公告)号：US06169298A
公开(公告)日：2001-01-02
申请号：US09131727
申请日：1998-08-10
申请人： Ying-Fu Lin , Liang-Tung Chang , Shiang-Peng Cheng , Kuan-Chu Kuo , Chiao-Yun Lin , Fu-Chou Liu
发明人： Ying-Fu Lin , Liang-Tung Chang , Shiang-Peng Cheng , Kuan-Chu Kuo , Chiao-Yun Lin , Fu-Chou Liu
IPC分类号： H01L3300
CPC分类号： H01L33/02 , H01L33/14 , H01L33/30
摘要： A semiconductor light emitting device, such as the light emitting diode (LED) or the laser diode (LD), having a structure in which a light emitting area is a double heterostructure or a multi-layer quantum well structure. The light emitting area is formed on a substrate. Subsequently, an electrically conductive oxide layer as a transparent window layer to eliminate the crowding effect is formed on the light emitting area. The substrate layer consists of a GaAs substrate and a GaAsP layer to increasing the band gap energy of the substrate. The electrically conductive oxide layer is formed of AlZnO(x) material, having a lower electrical resistivity and a high transparency in the visible wavelength region. The window layer is formed using a physical vapor deposition or a metalorganic chemical vapor deposition.
摘要翻译：诸如发光二极管（LED）或激光二极管（LD）的半导体发光器件具有其中发光区域是双异质结构或多层量子阱结构的结构。发光区域形成在基板上。随后，在发光区域上形成作为透明窗口层的导电氧化物层以消除拥挤效应。衬底层由GaAs衬底和GaAsP层组成，以增加衬底的带隙能量。导电氧化物层由AlZnO（x）材料形成，具有较低的电阻率和可见光波长区域的高透明度。窗层使用物理气相沉积或金属有机化学气相沉积形成。

3. 发明授权

US06008507A Photoelectric semiconductor device having a GaAsP substrate 失效
标题翻译：具有GaAsP基板的光电半导体器件
公开(公告)号：US06008507A
公开(公告)日：1999-12-28
申请号：US144908
申请日：1998-09-01
申请人： Ying-Fu Lin , Liang-Tung Chang , Shiang-Peng Cheng , Kuan-Chu Kuo , Chiao-Yun Lin , Fu-Chou Liu
发明人： Ying-Fu Lin , Liang-Tung Chang , Shiang-Peng Cheng , Kuan-Chu Kuo , Chiao-Yun Lin , Fu-Chou Liu
IPC分类号： H01L33/10 , H01L33/30 , H01L33/00 , H01L31/0328
CPC分类号： H01L33/30 , H01L33/10
摘要： A structure of a semiconductor light emitting device includes a GaAs substrate, a GaAsP interface substrate, a first cladding layer, an active layer, and a second cladding layer. The GaAsP interface substrate layer is formed on the GaAs substrate, in addition, the GaAsP interface substrate layer formed on the substrate is of a thickness such that the upper surface of the GaAsP interface substrate layer adjacent to the substrate is composed of single crystal. The first cladding layer of a first conductivity is formed on the GaAsP interface substrate layer. The active layer is formed on the first cladding layer, from which the light is generated in the active layer. The second cladding layer of a second conductivity is formed on the active layer.
摘要翻译：半导体发光器件的结构包括GaAs衬底，GaAsP界面衬底，第一覆层，有源层和第二覆层。在GaAs衬底上形成GaAsP界面衬底层，此外，形成在衬底上的GaAsP界面衬底层的厚度使得与衬底相邻的GaAsP界面衬底层的上表面由单晶构成。在GaAsP界面基底层上形成第一导电性的第一覆层。活性层形成在第一包覆层上，在活性层中产生光。在有源层上形成第二导电性的第二覆层。

4. 发明授权

US06037263A Plasma enhanced CVD deposition of tungsten and tungsten compounds 有权
标题翻译：等离子体增强钨和钨化合物的CVD沉积
公开(公告)号：US06037263A
公开(公告)日：2000-03-14
申请号：US186391
申请日：1998-11-05
申请人： Liang-Tung Chang
发明人： Liang-Tung Chang
IPC分类号： H01L21/285 , H01L21/768 , H01L21/00
CPC分类号： H01L21/76846 , H01L21/28518 , H01L21/76843
摘要： A method for plasma assisted CVD deposition of tungsten and of tungsten compounds is described wherein a plasma containing a high density of active hydrogen species is maintained to scavenge fluorine and fluoride species formed by the decomposition of the tungsten precursor WF.sub.6. The activated hydrogen species also assist in the breaking of W--F bonds, thereby facilitating the decompoition process and forming high density, high conductivity, fluoride free conductive films of tungsten and of tungsten compounds. The ability to form such fluoride free tungsten films with the assistance of activated hydrogen species, permits the deposition of tungsten directly onto gate oxides thereby enabling the formation of tungsten gate electrodes without underlying polysilicon. Low conductivity tungsten contacts including in-situ formed tungsten compound barrier layers may also be formed by this process.
摘要翻译：描述了一种用于钨和钨化合物的等离子体辅助CVD沉积的方法，其中保持含有高密度活性氢物质的等离子体，以清除钨前体WF6分解形成的氟和氟化物物质。活化的氢物质也有助于断裂W-F键，从而促进了分解过程，并形成了钨和钨化合物的高密度，高导电性，无氟化物导电膜。借助于活化的氢物质形成这种无氟化钨膜的能力允许钨直接沉积在栅极氧化物上，从而能够形成不含底层多晶硅的钨栅电极。也可以通过该方法形成包括原位形成的钨化合物阻挡层的低导电性钨触点。

5. 发明授权

US06239034B1 Method of manufacturing inter-metal dielectric layers for semiconductor devices 有权
标题翻译：制造用于半导体器件的金属间介电层的方法
公开(公告)号：US06239034B1
公开(公告)日：2001-05-29
申请号：US09184344
申请日：1998-11-02
申请人： Fu-Liang Yang , Liang-Tung Chang
发明人： Fu-Liang Yang , Liang-Tung Chang
IPC分类号： H01L21311
CPC分类号： H01L21/316 , H01L21/31051 , H01L21/31612 , H01L21/76801 , H01L21/76837
摘要： A method of manufacturing an inter-metal level dielectric layer for a semiconductor device. The method includes forming spaced conductive lines. Next, a first conformal silicon oxide film (barrier layer) is formed over the spaced conductive lines. Gaps or valleys are between the metal lines covered by the barrier layer. A novel first “gap filling” spin-on-glass layer is formed over the first silicon oxide layer. In a critical step, the first SOG layer is heated to reflow thereby flowing all the first spin-on-glass layer from over the metal lines and leaving all of the first SOG layer in the gaps. Subsequently, a second silicon oxide layer is deposited over the first silicon oxide layer and over the first spin-on-glass layer only in the gaps. A second spin-on-glass layer is then formed over the second silicon oxide layer. An etchback is performed by etching back and removing the entire second spin on glass layer and portions the second silicon oxide layer. Lastly, an insulating cap layer of silicon oxide or silicon nitride is formed over the second silicon oxide layer.
摘要翻译：一种制造用于半导体器件的金属间介电层的方法。该方法包括形成间隔开的导线。接下来，在隔开的导线上形成第一共形氧化硅膜（阻挡层）。间隙或谷在被阻挡层覆盖的金属线之间。在第一氧化硅层上形成新的第一“间隙填充”旋涂玻璃层。在关键步骤中，第一SOG层被加热以回流，从而使所有第一旋涂玻璃层从金属线上方流出并将所有第一SOG层留在间隙中。随后，第二氧化硅层仅在间隙中沉积在第一氧化硅层上并且在第一旋涂玻璃层上方。然后在第二氧化硅层上形成第二自旋玻璃层。通过蚀刻回去并去除玻璃层上的整个第二自旋并且将第二氧化硅层部分来进行回蚀。最后，在第二氧化硅层上形成氧化硅或氮化硅的绝缘盖层。

6. 发明授权

US5858882A In-situ low wafer temperature oxidized gas plasma surface treatment process 失效
标题翻译：原位低晶圆温度氧化气体等离子体表面处理工艺
公开(公告)号：US5858882A
公开(公告)日：1999-01-12
申请号：US822664
申请日：1997-03-24
申请人： Liang-Tung Chang , Chih-Cherng Liao
发明人： Liang-Tung Chang , Chih-Cherng Liao
IPC分类号： H01L21/3105 , H01L21/768 , H01L21/283
CPC分类号： H01L21/76801 , H01L21/3105 , H01L21/76826
摘要： A method of forming an interlevel dielectric layer without peeling or cracking in the fabrication of an integrated circuit device is described. Semiconductor device structures are provided in and on a semiconductor substrate. An insulating layer is provided overlying the semiconductor device structures and a first conducting layer is provided overlying the insulating layer and extending down through the insulating layer to contact one of the semiconductor device structures. A first dielectric layer is deposited overlying the first conducting layer. A spin-on-glass layer is coated over the first dielectric layer and then etched back wherein a polymer builds up on the spin-on-glass surface. The spin-on-glass layer is treated with an oxygen plasma treatment wherein the treatment neutralizes the polymer buildup and prevents cracking and peeling of the spin-on-glass layer. A TEOS layer is deposited overlying the spin-on-glass layer to complete the interlevel dielectric layer. A via opening is etched through the interlevel dielectric layer to the first conducting layer. A second conducting layer is deposited within the via opening and patterned to complete the fabrication of the integrated circuit device.
摘要翻译：描述了在集成电路器件的制造中形成层间绝缘层而不剥离或破裂的方法。半导体器件结构设置在半导体衬底中和半导体衬底上。设置覆盖半导体器件结构的绝缘层，并且覆盖绝缘层并向下延伸穿过绝缘层以接触半导体器件结构之一的第一导电层。第一介电层沉积在第一导电层上。旋涂玻璃层涂覆在第一介电层上，然后回蚀，其中聚合物积聚在玻璃上玻璃表面上。旋涂玻璃层用氧等离子体处理，其中处理中和聚合物积聚并防止旋涂玻璃层的开裂和剥离。 TEOS层沉积在旋涂玻璃层上以完成层间电介质层。通孔开口通过层间电介质层蚀刻到第一导电层。第二导电层沉积在通孔开口内并图案化以完成集成电路器件的制造。

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