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    • 1. 发明申请
    • Method of etching dual pre-doped polysilicon gate stacks using carbon-containing gases additions
    • 使用含碳气体添加剂蚀刻双预掺杂多晶硅栅极叠层的方法
    • US20060183308A1
    • 2006-08-17
    • US10730891
    • 2003-12-10
    • Ying ZhangTimothy DaltonWesley Natzle
    • Ying ZhangTimothy DaltonWesley Natzle
    • H01L21/28H01L21/44
    • H01L21/28123H01L21/32137H01L21/32139
    • A method for making dual pre-doped gate stacks used in semiconductor applications such as complementary metal oxide semiconductor (CMOS) devices and metal oxide semiconductor field effect transistors (MOSFETs) is provided. The method involves providing at least one pre-doped conductive layer, such as poly silicon (poly-Si), on a gate stack and etching by exposing the conductive layer to an etching composition comprising at least one carbon containing gas. The carbon containing gas can be selected from gases having the general formula CxHy, such as, for example, CH4, C2H2, C2H4, and C2H6. The carbon containing gas can further be selected from gases having the general formula CxHyA, wherein a can represent one or more additional substituents selected from O, N, P, S, F, Cl, Br, and I. The processes can result in dual pre-doped gate stacks having essentially vertical sidewalls and further having a width of at least about 3 nm, such as from about 5 nm to about 150 nm.
    • 提供了在半导体应用中使用诸如互补金属氧化物半导体(CMOS)器件和金属氧化物半导体场效应晶体管(MOSFET)的双预预掺杂栅叠层的方法。 该方法包括在栅叠层上提供至少一个预先掺杂的导电层,例如多晶硅(poly-Si),以及通过将导电层暴露于含有至少一种含碳气体的蚀刻组合物进行蚀刻。 含碳气体可以选自具有通式C x H H y H的气体,例如CH 4,C 3, H 2 H 2,C 2 H 4,和C 2 H 2, 6 。 含碳气体还可以选自具有通式C x H A A A的气体,其中a可以表示一个或多个选自O,N,P ,S,F,Cl,Br和I.该工艺可以导致具有基本上垂直的侧壁并且还具有至少约3nm,例如约5nm至约150nm的宽度的双预掺杂栅叠层。
    • 2. 发明申请
    • ADDITION OF BALLAST HYDROCARBON GAS TO DOPED POLYSILICON ETCH MASKED BY RESIST
    • 添加沉积物中的多氯硅烷蚀刻阻垢剂
    • US20060166416A1
    • 2006-07-27
    • US10905938
    • 2005-01-27
    • Timothy DaltonWesley NatzlePaul PastelRichard WiseHongwen YanYing Zhang
    • Timothy DaltonWesley NatzlePaul PastelRichard WiseHongwen YanYing Zhang
    • H01L21/00H01L21/84
    • H01L21/32139H01L21/32137Y10S438/909
    • A chemical composition and method for providing uniform and consistent etching of gate stacks on a semiconductor wafer, whereby the composition includes an etchant and an added ballast gas added. The gate stacks are formed using this combined etchant and ballast gas composition. The ballast gas may either be similar to, or the equivalent of, a gaseous byproduct generated within the processing chamber. The ballast gas is added in either an overload amount, or in an amount sufficient to compensate for varying pattern factor changes across the water. This etchant and added ballast gas form a substantially homogeneous etchant across the entire wafer, thereby accommodating for or compensating for these pattern factor differences. When etching the wafer using this homogeneous etchant, a passivation layer is formed on exposed wafer surfaces. The passivation layer protects the lateral sidewalls of the gate stacks during etch to result in straighter gate stacks.
    • 一种用于在半导体晶片上提供均匀且一致的栅叠层蚀刻的化学组成和方法,由此所述组合物包括添加的蚀刻剂和添加的压载气体。 使用这种组合的蚀刻剂和压载气组合物形成栅堆叠。 压载气体可以类似于或等同于在处理室内产生的气态副产物。 压载气体以过载量或足以补偿横跨水的变化因子变化的量加入。 这种蚀刻剂和添加的压载气体在整个晶片上形成基本均匀的蚀刻剂,从而适应或补偿这些图案因子差异。 当使用这种均匀的蚀刻剂蚀刻晶片时,在暴露的晶片表面上形成钝化层。 钝化层在蚀刻期间保护栅极堆叠的侧壁以产生更直的栅叠层。
    • 3. 发明授权
    • Method of etching dual pre-doped polysilicon gate stacks using carbon-containing gaseous additions
    • 使用含碳气体添加剂蚀刻双重预掺杂多晶硅栅极叠层的方法
    • US07344965B2
    • 2008-03-18
    • US10730891
    • 2003-12-10
    • Ying ZhangTimothy Joseph DaltonWesley Natzle
    • Ying ZhangTimothy Joseph DaltonWesley Natzle
    • H01L21/3205H01L21/4763
    • H01L21/28123H01L21/32137H01L21/32139
    • A method for making dual pre-doped gate stacks used in semiconductor applications such as complementary metal oxide semiconductor (CMOS) devices and metal oxide semiconductor field effect transistors (MOSFETs) is provided. The method involves providing at least one pre-doped conductive layer, such as poly silicon (poly-Si), on a gate stack and etching by exposing the conductive layer to an etching composition comprising at least one carbon containing gas. The carbon containing gas can be selected from gases having the general formula CxHy, such as, for example, CH4, C2H2, C2H4, and C2H6. The carbon containing gas can further be selected from gases having the general formula CxHyA, wherein A can represent one or more additional substituents selected from O, N, P, S, F, Cl, Br, and I. The processes can result in dual pre-doped gate stacks having essentially vertical sidewalls and further having a width of at least about 3 nm, such as from about 5 nm to about 150 nm.
    • 提供了在半导体应用中使用诸如互补金属氧化物半导体(CMOS)器件和金属氧化物半导体场效应晶体管(MOSFET)的双预预掺杂栅叠层的方法。 该方法包括在栅叠层上提供至少一个预先掺杂的导电层,例如多晶硅(poly-Si),以及通过将导电层暴露于含有至少一种含碳气体的蚀刻组合物进行蚀刻。 含碳气体可以选自具有通式C x H H y H的气体,例如CH 4,C 3, H 2 H 2,C 2 H 4,和C 2 H 2, 6 。 含碳气体可以进一步选自具有通式C x H A A A的气体,其中A可以表示一个或多个选自O,N,P ,S,F,Cl,Br和I.该工艺可以导致具有基本垂直侧壁并且还具有至少约3nm(例如约5nm至约150nm)的宽度的双预掺杂栅叠层。