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1. 发明授权

US08232626B2 Via and method of via forming and method of via filling 有权
标题翻译：通孔形成方法和通孔填充方法
公开(公告)号：US08232626B2
公开(公告)日：2012-07-31
申请号：US12814938
申请日：2010-06-14
申请人： Yat Kit Tsui , Dan Yang , Xunqing Shi
发明人： Yat Kit Tsui , Dan Yang , Xunqing Shi
IPC分类号： H01L29/40 , H01L21/44 , H05K1/11
CPC分类号： H01L21/76898 , H01L23/481 , H01L2224/16145 , H01L2924/1461 , H01L2924/00
摘要： An electronic or micromechanical device having first (11) and second (12) surfaces and a via extending through the device from the first surface to the second surface. The via comprises integrally formed first (84, 86), second (82) and third (88) portions. The first portion (84, 86) extends from the first surface (11) to the second surface (12). The second portion (82) extends over a part of the first surface (11) of the device. The third portion (88) extends over a part of the second surface (12) of the device. Preferably the first portion comprises first and second parts, the second part extending through an active region of the device and having a narrower width than the first part. A method of forming and filling the via is also disclosed.
摘要翻译：具有第一表面（11）和第二表面（12）的电子或微机械装置以及从第一表面延伸穿过该装置到第二表面的通孔。通孔包括一体形成的第一（84,86），第二（82）和第三（88）部分。第一部分（84,86）从第一表面（11）延伸到第二表面（12）。第二部分（82）在装置的第一表面（11）的一部分上延伸。第三部分（88）在装置的第二表面（12）的一部分上延伸。优选地，第一部分包括第一部分和第二部分，第二部分延伸穿过装置的有源区域并且具有比第一部分更窄的宽度。还公开了形成和填充通孔的方法。

2. 发明申请

US20110304026A1 VIA AND METHOD OF VIA FORMING AND METHOD OF VIA FILLING 有权
标题翻译：通过形成的方法和方法以及通过填充的方法
公开(公告)号：US20110304026A1
公开(公告)日：2011-12-15
申请号：US12814938
申请日：2010-06-14
申请人： Yat Kit Tsui , Dan Yang , Xunqing Shi
发明人： Yat Kit Tsui , Dan Yang , Xunqing Shi
IPC分类号： H01L23/48 , H05K1/11 , H01L21/02 , H01L21/768
CPC分类号： H01L21/76898 , H01L23/481 , H01L2224/16145 , H01L2924/1461 , H01L2924/00
摘要： An electronic or micromechanical device having first (11) and second (12) surfaces and a via extending through the device from the first surface to the second surface. The via comprises integrally formed first (84, 86), second (82) and third (88) portions. The first portion (84, 86) extends from the first surface (11) to the second surface (12). The second portion (82) extends over a part of the first surface (11) of the device. The third portion (88) extends over a part of the second surface (12) of the device. Preferably the first portion comprises first and second parts, the second part extending through an active region of the device and having a narrower width than the first part. A method of forming and filling the via is also disclosed.
摘要翻译：具有第一表面（11）和第二表面（12）的电子或微机械装置以及从第一表面延伸穿过该装置到第二表面的通孔。通孔包括一体形成的第一（84,86），第二（82）和第三（88）部分。第一部分（84,86）从第一表面（11）延伸到第二表面（12）。第二部分（82）在装置的第一表面（11）的一部分上延伸。第三部分（88）在装置的第二表面（12）的一部分上延伸。优选地，第一部分包括第一部分和第二部分，第二部分延伸穿过设备的有源区域并且具有比第一部分更窄的宽度。还公开了形成和填充通孔的方法。

3. 发明授权

US08772930B2 Increased surface area electrical contacts for microelectronic packages 有权
标题翻译：用于微电子封装的增加的表面积电触点
公开(公告)号：US08772930B2
公开(公告)日：2014-07-08
申请号：US13354302
申请日：2012-01-19
申请人： Pui Chung Simon Law , Dan Yang , Xunqing Shi
发明人： Pui Chung Simon Law , Dan Yang , Xunqing Shi
IPC分类号： H01L23/498
CPC分类号： H01L21/76898 , H01L27/14618 , H01L2924/0002 , H01L2924/00
摘要： A multilayer microelectronic device package includes one or more vertical electrical contacts. At least one semiconductor material layer is provided having one or more electrical devices fabricated therein. An electrical contact pad can be formed on or in the semiconductor material layer. Another material layer is positioned adjacent to the semiconductor material layer and includes a conductive material stud embedded in or bonded to the layer. A via is formed through at least a portion of the semiconductor material layer and the electrical contact pad and into the adjacent layer conducting material stud. The via is constructed such that the via tip terminates within the conducting material stud, exposing the conducting material. A metallization layer is disposed in the via such that the metallization layer contacts both the electrical contact pad and the conducting material stud exposed by the via tip.
摘要翻译：多层微电子器件封装包括一个或多个垂直电触点。提供至少一个半导体材料层，其中制造有一个或多个电气器件。可以在半导体材料层上或半导体材料层中形成电接触焊盘。另一材料层定位成与半导体材料层相邻，并且包括嵌入或结合到该层的导电材料柱。通孔通过半导体材料层和电接触焊盘的至少一部分形成，并进入相邻层导电材料柱。通孔被构造成使得通孔末端终止于导电材料柱内，露出导电材料。金属化层设置在通孔中，使得金属化层接触电接触焊盘和由通孔尖露露出的导电材料柱。

4. 发明授权

US08212297B1 High optical efficiency CMOS image sensor 有权
标题翻译：高光效CMOS图像传感器
公开(公告)号：US08212297B1
公开(公告)日：2012-07-03
申请号：US13010800
申请日：2011-01-21
申请人： Pui Chung Simon Law , Dan Yang , Xunqing Shi
发明人： Pui Chung Simon Law , Dan Yang , Xunqing Shi
IPC分类号： H01L31/062
CPC分类号： H01L27/14632 , H01L24/19 , H01L27/1461 , H01L27/14618 , H01L27/1463 , H01L27/14636 , H01L27/1464 , H01L27/14645 , H01L27/14687 , H01L27/1469 , H01L27/14692 , H01L2924/12043 , H01L2924/00
摘要： High optical efficiency CMOS image sensors capable of sustaining pixel sizes less than 1.2 microns are provided. Due to high photodiode fill factors and efficient optical isolation, microlenses are unnecessary. Each sensor includes plural imaging pixels having a photodiode structure on a semiconductor substrate adjacent a light-incident upper surface of the image sensor. An optical isolation grid surrounds each photodiode structure and defines the pixel boundary. The optical isolation grid extends to a depth of at least the thickness of the photodiode structure and prevents incident light from penetrating through the incident pixel to an adjacent pixel. A positive diffusion plug vertically extends through a portion of the photodiode structure. A negative diffusion plug vertically extends into the semiconductor substrate for transferring charge generated in the photodiode to a charge collecting region within the semiconductor substrate. Pixel circuitry positioned beneath the photodiode controls charge transfer to image readout circuitry.
摘要翻译：提供能够维持小于1.2微米的像素尺寸的高光学效率CMOS图像传感器。由于高光电二极管填充因子和高效的光隔离，微透镜是不必要的。每个传感器包括在与图像传感器的光入射上表面相邻的半导体衬底上具有光电二极管结构的多个成像像素。光学隔离栅格围绕每个光电二极管结构并且限定像素边界。光隔离栅格延伸至至少光电二极管结构的厚度的深度，并防止入射光穿过入射像素到相邻像素。正扩散插塞垂直延伸穿过光电二极管结构的一部分。垂直延伸到半导体衬底中的负扩散插头用于将在光电二极管中产生的电荷转移到半导体衬底内的电荷收集区域。位于光电二极管下面的像素电路控制电荷转移到图像读出电路。

5. 发明申请

US20110221018A1 Electronic Device Package and Methods of Manufacturing an Electronic Device Package 审中-公开
标题翻译：电子设备封装及制造电子器件封装的方法
公开(公告)号：US20110221018A1
公开(公告)日：2011-09-15
申请号：US12723992
申请日：2010-03-15
申请人： Xunqing Shi , Dan Yang , Pui Chung Simon Law
发明人： Xunqing Shi , Dan Yang , Pui Chung Simon Law
IPC分类号： H01L31/0232 , H01L31/02 , H01L31/18
CPC分类号： H01L27/14683 , B81B7/007 , B81B2207/096 , H01L27/14618 , H01L27/14636 , H01L2224/48091 , H01L2224/73265 , H01L2924/1461 , H01L2924/00014 , H01L2924/00
摘要： An electronic device package comprises a substrate 110 having a first surface 110a and a second surface 110b opposite the first surface. An electronic device 120, 130 is positioned on the first surface 110a. An isolation layer 140 extends over at least a portion of the top surface of the electronic device. A redistribution layer 145 having one or more I/O lines extends over the isolation layer and the top surface of the electronic device. The RDL layer connects the electronic device to one or more first vias 160 which pass through the substrate 110 to the second surface 110b thereof. The electronic device may be an image sensor. A microlens 220 and protective parylene layer 230 may be fabricated over the image sensor. A method of manufacturing the electronic device package is also disclosed.
摘要翻译：电子器件封装包括具有第一表面110a和与第一表面相对的第二表面110b的衬底110。电子设备120,130位于第一表面110a上。隔离层140在电子设备的顶表面的至少一部分上延伸。具有一个或多个I / O线的再分布层145在隔离层和电子设备的顶表面上延伸。 RDL层将电子器件连接到穿过衬底110到其第二表面110b的一个或多个第一通孔160。电子设备可以是图像传感器。可以在图像传感器上制造微透镜220和保护聚对二甲苯层230。还公开了一种制造电子器件封装的方法。

6. 发明授权

US08674482B2 Semiconductor chip with through-silicon-via and sidewall pad 有权
标题翻译：半导体芯片，带硅通孔和侧壁衬垫
公开(公告)号：US08674482B2
公开(公告)日：2014-03-18
申请号：US12273434
申请日：2008-11-18
申请人： Xunqing Shi , Bin Xie , Chang Hwa Chung
发明人： Xunqing Shi , Bin Xie , Chang Hwa Chung
IPC分类号： H01L29/40
CPC分类号： H01L23/16 , H01L21/76898 , H01L23/3128 , H01L25/0657 , H01L25/50 , H01L2224/05001 , H01L2224/05009 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/13025 , H01L2224/16145 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06551 , H01L2225/06579 , H01L2924/00014 , H01L2924/1433 , H01L2224/05599 , H01L2224/05099 , H01L2224/0555 , H01L2224/0556
摘要： Subject matter disclosed herein may relate to packaging for multi-chip semiconductor devices as may be used, for example, in flash memory devices. In an example embodiment, a semiconductor chip may comprise a through-silicon via and a sidewall pad.
摘要翻译：本文公开的主题可涉及可用于例如闪存设备中的多芯片半导体器件的封装。在示例性实施例中，半导体芯片可以包括穿硅通孔和侧壁衬垫。

7. 发明授权

US08544165B2 Apparatus for aligning electronic components 有权
标题翻译：用于对准电子部件的装置
公开(公告)号：US08544165B2
公开(公告)日：2013-10-01
申请号：US12748997
申请日：2010-03-29
申请人： Chi Kuen Vincent Leung , Bin Xie , Xunqing Shi
发明人： Chi Kuen Vincent Leung , Bin Xie , Xunqing Shi
IPC分类号： B23P19/00
CPC分类号： H01L21/67333 , H01L25/105 , H01L25/50 , H01L2224/16145 , H01L2224/16146 , H01L2225/1058 , Y10T29/49133 , Y10T29/53174 , Y10T29/53178 , Y10T29/53183
摘要： A method of aligning electronic components comprising providing a positioning member 110 having at least one formation 120 for receiving an electronic component; said at least one formation having lateral boundaries 35, 36 for constraining movement of an electronic component; placing a first electronic component 10a in said at least one formation; and providing a force for actively aligning said first electronic component with a lateral boundary of said at least one formation. The force may, for example, be provided by tilting the positioning member, by providing suction or by using an actuator. An apparatus for aligning electronic components and a 3D system of stacked electronic components is also disclosed.
摘要翻译：一种对准电子部件的方法，包括提供具有至少一个结构120的定位部件110，用于接收电子部件; 所述至少一个结构具有用于限制电子部件的运动的横向边界35,36; 将第一电子部件10a放置在所述至少一个结构中; 并且提供用于使所述第一电子部件与所述至少一个结构的横向边界主动对准的力。例如，可以通过倾斜定位构件，通过提供抽吸或通过使用致动器来提供力。还公开了一种用于对准电子部件的装置和堆叠的电子部件的3D系统。

8. 发明申请

US20100123241A1 SEMICONDUCTOR CHIP WITH THROUGH-SILICON-VIA AND SIDEWALL PAD 有权
标题翻译：半导体芯片，通过硅和透明片
公开(公告)号：US20100123241A1
公开(公告)日：2010-05-20
申请号：US12273434
申请日：2008-11-18
申请人： Xunqing Shi , Bin Xie , Chang Hwa Chung
发明人： Xunqing Shi , Bin Xie , Chang Hwa Chung
IPC分类号： H01L23/04 , H01L21/00
CPC分类号： H01L23/16 , H01L21/76898 , H01L23/3128 , H01L25/0657 , H01L25/50 , H01L2224/05001 , H01L2224/05009 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/13025 , H01L2224/16145 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06551 , H01L2225/06579 , H01L2924/00014 , H01L2924/1433 , H01L2224/05599 , H01L2224/05099 , H01L2224/0555 , H01L2224/0556
摘要： Subject matter disclosed herein may relate to packaging for multi-chip semiconductor devices as may be used, for example, in flash memory devices. In an example embodiment, a semiconductor chip may comprise a through-silicon via and a sidewall pad.
摘要翻译：本文公开的主题可涉及可用于例如闪存设备中的多芯片半导体器件的封装。在示例性实施例中，半导体芯片可以包括穿硅通孔和侧壁衬垫。

9. 发明申请

US20050146708A1 Systems and methods for deformation measurement 审中-公开
标题翻译：变形测量的系统和方法
公开(公告)号：US20050146708A1
公开(公告)日：2005-07-07
申请号：US10510858
申请日：2002-04-11
申请人： Xunqing Shi , Zhiping Wang , Jason Pickering , Wei Fan
发明人： Xunqing Shi , Zhiping Wang , Jason Pickering , Wei Fan
IPC分类号： G01B11/16 , G01N21/88 , G01R31/311 , G01L1/24
CPC分类号： G01B11/162 , G01N21/88 , G01R31/311
摘要： A system for the real-time and in-situ macro and micro measurement of in-plane deformations of a microelectronic package or the like comprises a closed environmental chamber (3) within which a test sample may be subjected to thermal cycle loading and/or humidity loading, an incoherent white light source (6) for illuminating the sample, a long-working-distance microscope (2) and image acquisition means (7) for capturing speckle patterns from the surface of the sample during loading, and a control (8) for automating the co-ordination of the various components and for analysing the speckle images using digital image speckle correlation.
摘要翻译：用于微电子封装等的面内变形的实时和原位宏观和微观测量的系统包括封闭的环境室（3），其中测试样品可以经受热循环加载和/或湿度加载，用于照射样品的非相干白光源（6），用于在加载期间从样品表面捕获散斑图案的长距离显微镜（2）和图像获取装置（7），以及控制 8），用于使各种组件的协调自动化并且使用数字图像散斑相关性来分析斑点图像。

10. 发明授权

US08138577B2 Pulse-laser bonding method for through-silicon-via based stacking of electronic components 有权
标题翻译：脉冲激光焊接方法，用于电子元件的基于硅通孔的堆叠
公开(公告)号：US08138577B2
公开(公告)日：2012-03-20
申请号：US12057241
申请日：2008-03-27
申请人： Xunqing Shi , Wei Ma , Bin Xie , Chang Hwa Chung
发明人： Xunqing Shi , Wei Ma , Bin Xie , Chang Hwa Chung
IPC分类号： H01L23/538 , H01L21/44
CPC分类号： H01L21/76898 , H01L21/6835 , H01L24/13 , H01L24/27 , H01L24/29 , H01L24/81 , H01L24/94 , H01L25/0657 , H01L25/50 , H01L2221/68359 , H01L2224/0401 , H01L2224/05166 , H01L2224/05171 , H01L2224/0557 , H01L2224/056 , H01L2224/05611 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/13099 , H01L2224/16 , H01L2224/274 , H01L2224/29101 , H01L2224/2919 , H01L2224/8182 , H01L2225/06513 , H01L2225/06541 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/0106 , H01L2924/01073 , H01L2924/01074 , H01L2924/01076 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/0665 , H01L2924/07802 , H01L2924/10253 , H01L2924/351 , H01L2924/00 , H01L2224/05552 , H01L2924/00014 , H01L2924/013
摘要： There is described a method of forming a through-silicon-via to form an interconnect between two stacked semiconductor components using pulsed laser energy. A hole is formed in each component, and each hole is filled with a plug formed of a first metal. One component is then stacked on another component such that the holes are in alignment, and a pulse of laser energy is applied to form a bond between the metal plugs.
摘要翻译：描述了形成穿硅通孔以形成使用脉冲激光能量的两个堆叠的半导体部件之间的互连的方法。在每个部件中形成孔，并且每个孔填充有由第一金属形成的塞子。然后将一个部件堆叠在另一部件上，使得孔对准，并且施加激光能量的脉冲以在金属插塞之间形成结合。

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