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1. 发明授权

US06967519B2 Drive circuit for a power semiconductor device 失效
标题翻译：用于功率半导体器件的驱动电路
公开(公告)号：US06967519B2
公开(公告)日：2005-11-22
申请号：US10345388
申请日：2003-01-16
申请人： Yasushi Nakayama , Takeshi Ohi , Ryuichi Hashido
发明人： Yasushi Nakayama , Takeshi Ohi , Ryuichi Hashido
IPC分类号： H02M1/00 , H02M1/08 , H03K17/0812 , H03K17/16 , H03K17/30
CPC分类号： H03K17/168 , H01L2924/0002 , H03K17/08128 , H01L2924/00
摘要： A drive circuit for a power semiconductor device includes: a sampling signal generating circuit for detecting that an input control signal instructs OFF and outputting a sampling signal at the time instant of start of a Miller period of time of an IGBT; a gate voltage detecting circuit for detecting a Miller voltage of the IGBT at the timing when the sampling signal is inputted and outputting, when the Miller voltage is equal to or larger than a threshold, an over-current detection signal; and a gate voltage controlling circuit for controlling, in response to the over-current detection signal, a gate voltage of the IGBT in such a way that the IGBT is turned OFF at slower speed than in the normal state. Thus, it is possible to suppress a surge voltage which is generated when the IGBT is turned OFF during the flow of an over-current.
摘要翻译：一种用于功率半导体器件的驱动电路包括：采样信号发生电路，用于检测输入控制信号指示关闭并在IGBT的米勒启动时刻启动采样信号; 栅极电压检测电路，用于在采样信号输入的定时检测IGBT的米勒电压，并且当米勒电压等于或大于阈值时输出过电流检测信号; 以及栅极电压控制电路，用于响应于过电流检测信号，以与正常状态相比以较慢的速度关闭IGBT的方式来控制IGBT的栅极电压。因此，可以抑制在过电流期间IGBT关断时产生的浪涌电压。

2. 发明授权

US07079094B2 Current supply circuit and display apparatus including the same 有权
标题翻译：电流供应电路和包括其的显示装置
公开(公告)号：US07079094B2
公开(公告)日：2006-07-18
申请号：US10601876
申请日：2003-06-24
申请人： Hidetada Tokioka , Ryuichi Hashido , Takahiro Urakabe , Masafumi Agari , Masashi Okabe , Mitsuo Inoue
发明人： Hidetada Tokioka , Ryuichi Hashido , Takahiro Urakabe , Masafumi Agari , Masashi Okabe , Mitsuo Inoue
IPC分类号： G09G3/32
CPC分类号： G09G3/3283 , G09G3/325 , G09G2300/0814 , G09G2300/0842 , G09G2320/0233 , G09G2320/0295 , G09G2320/043
摘要： In a compensation mode executed before a supply mode, a current supply circuit for supplying a data current according to display luminance to a current-driven light emitting device allows a reference current to pass through a drive transistor for supplying the data current to a data line in the supply mode. The voltage of a node connected to the gate of the drive transistor at this time is held by a voltage holding capacitor. In the supply mode, the voltage of the node changes according to a data voltage. The data voltage is set according to the difference between the data current to be supplied and the reference current.
摘要翻译：在供给模式之前执行的补偿模式中，用于根据显示亮度向当前驱动的发光装置提供数据电流的电流供应电路允许参考电流通过用于将数据电流提供给数据线的驱动晶体管在供应模式下。此时与驱动晶体管的栅极连接的节点的电压由保持电容器保持。在供电模式下，节点的电压根据数据电压而变化。数据电压根据要提供的数据电流与参考电流之间的差设置。

3. 发明授权

US07394419B2 Decoding circuit for decoding multibit data, and a display apparatus utilizing the same 有权
标题翻译：用于解码多位数据的解码电路，以及利用该数据的显示装置
公开(公告)号：US07394419B2
公开(公告)日：2008-07-01
申请号：US11696891
申请日：2007-04-05
申请人： Ryuichi Hashido , Masafumi Agari , Hiroyuki Murai
发明人： Ryuichi Hashido , Masafumi Agari , Hiroyuki Murai
IPC分类号： H03M1/76
CPC分类号： H03M1/682 , G09G3/3688 , G09G3/3696 , G09G2310/027 , G09G2320/0252 , G09G2330/021 , H03M1/662 , H03M1/765
摘要： In each of sub-decoding circuits at a first stage provided for a plurality of output candidates arranged adjacently, for selecting corresponding output candidates in accordance with a bit of multibit data for transmission to subsequent stage sub-decoding circuits, unit decoders are arranged in parallel in a direction perpendicular to an arranging direction of the output candidates. A size in a vertical direction along which reference voltages of the output candidates of a decoding circuit are arranged can be reduced without increasing a size in a horizontal direction.
摘要翻译：在为相邻设置的多个输出候补提供的第一级的每个副解码电路中，为了根据用于发送到后级子解码电路的多位数据的位来选择相应的输出候选，单元解码器被并行布置在垂直于输出候选的排列方向的方向上。可以在不增加水平方向的尺寸的情况下减小垂直方向上排列有解码电路的输出候选的参考电压的尺寸。

4. 发明授权

US07209057B2 Decode circuitry and a display device using the same 失效
标题翻译：解码电路和使用其的显示设备
公开(公告)号：US07209057B2
公开(公告)日：2007-04-24
申请号：US11376136
申请日：2006-03-16
申请人： Ryuichi Hashido , Hiroyuki Murai
发明人： Ryuichi Hashido , Hiroyuki Murai
IPC分类号： H03M5/02
CPC分类号： H03M7/04 , H03M1/682 , H03M1/765
摘要： Multi-bit input data is divided into at least a first bit group and a second bit group, and each of first sub-decode circuits selects one selection target signal/voltage from selection target signal/voltage group in accordance with the first bit group. Then, one signal/voltage is selected according to the second bit group from the signals/voltages selected by the first sub-decode circuits, and is transmitted to an output signal line. Each of second sub-decode circuits is formed of a single train of series switches, and only one of the switch train is made conductive to transmit a finally selected signal/voltage to the output signal line.
摘要翻译：多比特输入数据被分成至少第一比特组和第二比特组，并且每个第一子解码电路根据第一比特组从选择目标信号/电压组中选择一个选择目标信号/电压。然后，根据由第一子解码电路选择的信号/电压，根据第二位组选择一个信号/电压，并将其发送到输出信号线。每个第二子解码电路由单串串联开关构成，并且只有一个开关组被导通以将最终选择的信号/电压传输到输出信号线。

5. 发明申请

US20060232450A1 Decode circuitry and a display device using the same 失效
标题翻译：解码电路和使用其的显示设备
公开(公告)号：US20060232450A1
公开(公告)日：2006-10-19
申请号：US11376136
申请日：2006-03-16
申请人： Ryuichi Hashido , Hiroyuki Murai
发明人： Ryuichi Hashido , Hiroyuki Murai
IPC分类号： H03M7/00
CPC分类号： H03M7/04 , H03M1/682 , H03M1/765
摘要： Multi-bit input data is divided into at least a first bit group and a second bit group, and each of first sub-decode circuits selects one selection target signal/voltage from selection target signal/voltage group in accordance with the first bit group. Then, one signal/voltage is selected according to the second bit group from the signals/voltages selected by the first sub-decode circuits, and is transmitted to an output signal line. Each of second sub-decode circuits is formed of a single train of series switches, and only one of the switch train is made conductive to transmit a finally selected signal/voltage to the output signal line.
摘要翻译：多比特输入数据被分成至少第一比特组和第二比特组，并且每个第一子解码电路根据第一比特组从选择目标信号/电压组中选择一个选择目标信号/电压。然后，根据由第一子解码电路选择的信号/电压，根据第二位组选择一个信号/电压，并将其发送到输出信号线。每个第二子解码电路由单串串联开关构成，并且只有一个开关组被导通以将最终选择的信号/电压传输到输出信号线。

6. 发明申请

US20050174306A1 Display device 有权
标题翻译：显示设备
公开(公告)号：US20050174306A1
公开(公告)日：2005-08-11
申请号：US10513755
申请日：2003-06-17
申请人： Masafumi Agari , Hidetada Tokioka , Ryuichi Hashido , Takahiro Urakabe , Suehiro Gotoh , Masashi Okabe , Mitsuo Inoue
发明人： Masafumi Agari , Hidetada Tokioka , Ryuichi Hashido , Takahiro Urakabe , Suehiro Gotoh , Masashi Okabe , Mitsuo Inoue
IPC分类号： G09G3/32 , G09G3/30
CPC分类号： G09G3/3283 , G09G3/3241 , G09G2300/0417 , G09G2300/0842 , G09G2300/0861 , G09G2310/027 , G09G2310/0297 , G09G2320/0242
摘要： Signal lines for supplying signal currents to respective pixel circuits having light emitting elements are arranged. A signal line driving circuit generates, on a signal line, a signal current corresponding to the image data, by switching bit weighting currents output from bit weighting current source circuits provided for respective bits of the image data, using a switch circuit turned on/off dependent on the corresponding bit. Each current source circuit has a function of correcting the level of the bit weighting current output from itself, based on a reference current of the bit weighting current supplied from a reference current line. Therefore, even when the characteristics of TFTs forming respective current source circuits vary widely, variation in signal currents among the signal lines can be suppressed, and unevenness in emission luminance can be suppressed.
摘要翻译：布置用于向具有发光元件的各个像素电路提供信号电流的信号线。信号线驱动电路通过使用开关电路接通/断开来切换信号线上产生与图像数据相对应的信号电流，通过切换由针对图像数据的各个比特设置的比特加权电流源电路输出的比特加权电流取决于相应的位。每个电流源电路具有基于从参考电流线提供的比特加权电流的参考电流来校正其自身输出的比特加权电流的电平的功能。因此，即使形成各个电流源电路的TFT的特性变化很大，也可以抑制信号线之间的信号电流的变化，能够抑制发光亮度的不均匀。

7. 发明授权

US07570244B2 Display device 有权
标题翻译：显示设备
公开(公告)号：US07570244B2
公开(公告)日：2009-08-04
申请号：US10513755
申请日：2003-06-17
申请人： Masafumi Agari , Hidetada Tokioka , Ryuichi Hashido , Takahiro Urakabe , Suehiro Gotoh , Masashi Okabe , Mitsuo Inoue
发明人： Masafumi Agari , Hidetada Tokioka , Ryuichi Hashido , Takahiro Urakabe , Suehiro Gotoh , Masashi Okabe , Mitsuo Inoue
IPC分类号： G09G3/36
CPC分类号： G09G3/3283 , G09G3/3241 , G09G2300/0417 , G09G2300/0842 , G09G2300/0861 , G09G2310/027 , G09G2310/0297 , G09G2320/0242
摘要： Signal lines for supplying signal currents to respective pixel circuits having light emitting elements are arranged. A signal line driving circuit generates, on a signal line, a signal current corresponding to the image data, by switching bit weighting currents output from bit weighting current source circuits provided for respective bits of the image data, using a switch circuit turned on/off dependent on the corresponding bit. Each current source circuit has a function of correcting the level of the bit weighting current output from itself, based on a reference current of the bit weighting current supplied from a reference current line. Therefore, even when the characteristics of TFTs forming respective current source circuits vary widely, variation in signal currents among the signal lines can be suppressed, and unevenness in emission luminance can be suppressed.
摘要翻译：布置用于向具有发光元件的各个像素电路提供信号电流的信号线。信号线驱动电路通过使用开关电路接通/断开来切换信号线上产生与图像数据相对应的信号电流，通过切换由针对图像数据的各个比特设置的比特加权电流源电路输出的比特加权电流取决于相应的位。每个电流源电路具有基于从参考电流线提供的比特加权电流的参考电流来校正其自身输出的比特加权电流的电平的功能。因此，即使形成各个电流源电路的TFT的特性变化很大，也可以抑制信号线之间的信号电流的变化，能够抑制发光亮度的不均匀。

8. 发明授权

US07369125B2 Current supply circuit and display device having the current supply circuit 有权
标题翻译：电流供应电路和具有电流供应电路的显示装置
公开(公告)号：US07369125B2
公开(公告)日：2008-05-06
申请号：US10529175
申请日：2004-05-20
申请人： Hidetada Tokioka , Masafumi Agari , Ryuichi Hashido , Masashi Okabe
发明人： Hidetada Tokioka , Masafumi Agari , Ryuichi Hashido , Masashi Okabe
IPC分类号： G09G5/00
CPC分类号： G09G3/3283 , G09G3/20 , G09G3/325 , G09G2310/0248 , G09G2310/027
摘要： A current supply circuit providing a data line with a current corresponding to a digital signal composed of data bits includes a current control circuit, a precharge switch and a precharge regulating circuit. The current control circuit responds to control signals reflecting respective data bits to control the amount of current along the data line. The precharge switch precharges the data line to a predetermined voltage prior to current supply. The precharge regulating circuit exchanges with the data line electric charge corresponding to the control signals to move the voltage on the data line closer to a steady voltage corresponding to the data bits. In this way, an analog current corresponding to digital data can be promptly produced.
摘要翻译：向数据线提供与由数据位组成的数字信号相对应的电流的电流供给电路包括电流控制电路，预充电开关和预充电调节电路。电流控制电路响应反映相应数据位的控制信号来控制沿数据线的电流量。预充电开关在电流供应之前将数据线预充电到预定电压。预充电调节电路与对应于控制信号的数据线电荷交换，以将数据线上的电压移动到与数据位相对应的稳定电压。以这种方式，可以及时地产生对应于数字数据的模拟电流。

9. 发明授权

US07221349B2 Display device with light emitting elements 有权
标题翻译：具有发光元件的显示装置
公开(公告)号：US07221349B2
公开(公告)日：2007-05-22
申请号：US10841449
申请日：2004-05-10
申请人： Ryuichi Hashido , Hidetada Tokioka , Masafumi Agari , Suehiro Goto , Takahiro Urakabe
发明人： Ryuichi Hashido , Hidetada Tokioka , Masafumi Agari , Suehiro Goto , Takahiro Urakabe
IPC分类号： G09G3/36
CPC分类号： G09G3/325 , G09G3/3283 , G09G2300/0842 , G09G2310/0254 , G09G2310/027 , G09G2320/043 , G09G2330/028
摘要： A display current of a whole gray scale range according to a display signal of four bits is produced from a sum of output currents of an analog current supply circuit producing a first output current according to lower data bits and two digital current supply circuits operating in accordance with corresponding data bits to execute or stop generation of second and third output currents according to higher data bits. The analog current supply circuit has a calibration function of compensating for output current variations due to transistor characteristics at one point in a control range of the first output current. A display device with light-emitting elements can accurately generate a display current for gray-scale expression without imposing an excessive load on a manufacturing process while suppressing circuit footprint.
摘要翻译：从根据低位数据位产生第一输出电流的模拟电流供给电路的输出电流和根据低位数据位操作的两个数字电流供给电路产生根据四位显示信号的整个灰度范围的显示电流具有相应的数据位以根据较高数据位执行或停止产生第二和第三输出电流。模拟电流供应电路具有校正功能，其补偿由于在第一输出电流的控制范围内的一个点处的晶体管特性引起的输出电流变化。具有发光元件的显示装置可以精确地生成用于灰度表达的显示电流，而不会在制造过程中施加过大的负载，同时抑制电路占用面积。

10. 发明申请

US20070237407A1 DECODING CIRCUIT AND DISPLAY APPARATUS 有权
标题翻译：解码电路和显示设备
公开(公告)号：US20070237407A1
公开(公告)日：2007-10-11
申请号：US11696891
申请日：2007-04-05
申请人： Ryuichi Hashido , Masafumi Agari , Hiroyuki Murai
发明人： Ryuichi Hashido , Masafumi Agari , Hiroyuki Murai
IPC分类号： G06K9/36
CPC分类号： H03M1/682 , G09G3/3688 , G09G3/3696 , G09G2310/027 , G09G2320/0252 , G09G2330/021 , H03M1/662 , H03M1/765
摘要： In each of sub-decoding circuits at a first stage provided for a plurality of output candidates arranged adjacently, for selecting corresponding output candidates in accordance with a bit of multibit data for transmission to subsequent stage sub-decoding circuits, unit decoders are arranged in parallel in a direction perpendicular to an arranging direction of the output candidates. A size in a vertical direction along which reference voltages of the output candidates of a decoding circuit are arranged can be reduced without increasing a size in a horizontal direction.
摘要翻译：在为相邻设置的多个输出候补提供的第一级的每个副解码电路中，为了根据用于发送到后级子解码电路的多位数据的位来选择相应的输出候选，单元解码器被并行布置在垂直于输出候选的排列方向的方向上。可以在不增加水平方向的尺寸的情况下减小垂直方向上排列有解码电路的输出候选的参考电压的尺寸。

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