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    • 4. 发明授权
    • Non-halogenated flame-retarded covered wire
    • 非卤化阻燃包线
    • US06248446B1
    • 2001-06-19
    • US09436471
    • 1999-11-08
    • Norio KikuchiYasuo Kanamori
    • Norio KikuchiYasuo Kanamori
    • B32B2500
    • H01B7/295Y10T428/2927Y10T428/294Y10T428/2947
    • A non-halogenated flame-retarded covered wire is provided which includes a conductor and an insulating cover layer consisting of a first layer directly put into contact with the conductor and a second layer arranged outside the first layer, wherein the first layer is made of a flame-retarded polyolefin composition with Shore D hardness of under 60 and Oxygen Index of 24% and over, the second layer is made of a polyolefin composition with Shore D hardness of 60 and over, and thicknesses of the first and second layers are 30 &mgr;m and over and between 65 &mgr;m and 150 &mgr;m, respectively. Thus, a non-halogenated flame-retarded covered wire, which is lightweight and is capable of diameter-reducing and wherein all of abrasion resistance, flame retardance, oil resistance, and bending resistance can be satisfied as a thin layer covered wire for motor vehicle use, can be realized.
    • 提供一种非卤化阻燃包线,其包括导体和由直接与导体接触的第一层构成的绝缘覆盖层和布置在第一层外侧的第二层,其中第一层由 具有肖氏D硬度低于60且氧指数为24%以上的阻燃聚烯烃组合物,第二层由肖氏D硬度为60以上的聚烯烃组合物制成,第一层和第二层的厚度为30μm 分别在65和150之间。 因此,轻质且能够直径减小的非卤化阻燃包线可以满足作为用于机动车辆的薄层包线的所有耐磨性,阻燃性,耐油性和耐弯曲性 使用,可以实现。
    • 6. 发明申请
    • CMOS image sensor
    • CMOS图像传感器
    • US20060192262A1
    • 2006-08-31
    • US11360691
    • 2006-02-24
    • Norio Kikuchi
    • Norio Kikuchi
    • H01L31/00
    • H04N5/335H01L27/14603H01L27/14609H01L27/14621
    • Unit cells 2n1 and 2n2 arranged two-dimensionally in a row direction and a column direction includes a cell with four pixels as a set arranging pixels having an oblong shape and lengthwise shape alternatively with floating junctions FJ1 and FJ2 taken as centers; a plurality of reading transistors (Tr1 to Tr4) connected to the floating junction; reset transistors Tr15 and Tr25 arranged at one row end portion between the cells in the adjacent row directions, and address transistors Tr17 and Tr27 arranged at the other row end portion; amplifier transistors Tr16 and Tr26 connected in series to this address transistor, and moreover, arranges a reset wire ADD/RST-2 between the rows of the unit cell arranged in the row direction.
    • 在行方向上二维排列的单元单元2 n 1和2 n 2,列方向包括具有四个像素的单元,其具有椭圆形和纵向形状的排列像素,其中浮动结FJ 1和FJ 2被视为 中心; 连接到浮置结的多个读取晶体管(Tr 1至Tr 4); 布置在相邻行方向上的单元之间的一行端部的复位晶体管Tr 15和Tr 25,以及布置在另一行端部的地址晶体管Tr17和Tr27; 与该地址晶体管串联连接的放大器晶体管Tr16和Tr26,并且在行方向排列的单元电池的行之间布置复位线ADD / RST-2。