专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US5206986A Method of producing an electronic circuit package 失效
标题翻译：电子电路封装的制造方法
公开(公告)号：US5206986A
公开(公告)日：1993-05-04
申请号：US902884
申请日：1992-06-23
申请人： Yasunari Arai , Hiroshi Hamano , Izumi Amemiya , Takuji Yamamoto , Takeshi Ihara
发明人： Yasunari Arai , Hiroshi Hamano , Izumi Amemiya , Takuji Yamamoto , Takeshi Ihara
IPC分类号： G02B6/42
CPC分类号： G02B6/4214 , G02B6/42 , H01L2224/49109 , H01L2924/00014 , H01L2924/01014 , H01L2924/01082 , H01L2924/01322 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , Y10T29/49126 , Y10T29/49144
摘要： An electronic circuit package which includes first and second conductive metal members and a circuit board held between the first and second metal members and having a cutout in which an electronic circuit part is accommodated and a process of producing such electronic circuit package are disclosed. With the electronic circuit package, deterioration of a high speed characteristic of an electronic circuit part accommodated in the package is minimized, and accordingly, when the electronic circuit package is applied to an IC for very high speed optical communications for use with an optical repeater or the like, a very high speed system can be realized. By assembling the components in accordance with a predetermined order, facility in process of production and improvement in reliability of products are attained.
摘要翻译：一种电子电路封装，其包括第一和第二导电金属构件以及保持在第一和第二金属构件之间的电路板，并且具有容纳电子电路部件的切口和制造这种电子电路封装件的工艺。利用电子电路封装，容纳在封装中的电子电路部件的高速特性的劣化被最小化，因此当将电子电路封装件应用于用于与光中继器一起使用的非常高速光通信的IC时可以实现非常高速的系统。通过根据预定的顺序组装部件，可以实现生产过程中的设备和产品的可靠性的提高。

2. 发明授权

US5150280A Electronic circuit package 失效
标题翻译：电子电路包
公开(公告)号：US5150280A
公开(公告)日：1992-09-22
申请号：US564345
申请日：1990-08-08
申请人： Yasunari Arai , Hiroshi Hamano , Izumi Amemiya , Takuji Yamamoto , Takeshi Ihara
发明人： Yasunari Arai , Hiroshi Hamano , Izumi Amemiya , Takuji Yamamoto , Takeshi Ihara
IPC分类号： G02B6/42
CPC分类号： G02B6/42 , G02B6/4214 , H01L2224/48091 , H01L2224/49109 , H01L2924/00014 , H01L2924/01082 , H01L2924/01322
摘要： An electronic circuit package which includes first and second conductive metal members and a circuit board held between the first and second metal members and having a cutout in which an electronic circuit part is accommodated and a process of producing such electronic circuit package are disclosed. With the electronic circuit package, deterioration of a high speed characteristic of an electronic circuit part accommodated in the package is minimized, and accordingly, when the electronic circuit package is applied to an IC for very high speed optical communications for use with an optical repeater or the like, a very high speed system can be realized. By assembling the components in accordance with a predetermined order, facility in process of production and improvement in reliability of products are attained.
摘要翻译：一种电子电路封装，其包括第一和第二导电金属构件以及保持在第一和第二金属构件之间的电路板，并且具有容纳电子电路部件的切口和制造这种电子电路封装件的工艺。利用电子电路封装，容纳在封装中的电子电路部件的高速特性的劣化被最小化，因此当将电子电路封装件应用于用于与光中继器一起使用的非常高速光通信的IC时可以实现非常高速的系统。通过根据预定的顺序组装部件，可以实现生产过程中的设备和产品的可靠性的提高。

3. 发明授权

US5113151A Equalizing and amplifying circuit in an optical signal receiving apparatus 失效
标题翻译：光信号接收装置的均衡放大电路
公开(公告)号：US5113151A
公开(公告)日：1992-05-12
申请号：US554375
申请日：1990-07-19
申请人： Takuji Yamamoto , Hiroshi Hamano , Izumi Amemiya , Yasunari Arai , Takeshi Ihara
发明人： Takuji Yamamoto , Hiroshi Hamano , Izumi Amemiya , Yasunari Arai , Takeshi Ihara
IPC分类号： H03G3/20 , H03G5/16 , H04B10/69
CPC分类号： H03G3/3084 , H03G5/165 , H04B10/6931
摘要： Disclosed is an equalizing and amplifying circuit in an optical signal receiving apparatus comprising a preamplifier circuit having an input terminal connected to the output of a light receiving element. The preamplifier circuit amplifies the electrical signal from the light receiving element and outputs an amplified signal. An automatic gain control circuit is connected to the output of the preamplifier circuit. The preamplifier circuit comprises a transistor having a common-base, a current source connected to the emitter of the transistor for supplying a bias current to the transistor, and a load resistor connected to the collector of the transistor. The emitter of the transistor is connected to the input terminal, and the collector of the transistor is connected to the output terminal. A negative influence caused by mounting the circuit on a package is avoided and the circuit operates stably in a high frequency range.

4. 发明授权

US5066877A Data delay circuit and clock extraction circuit using the same 失效
标题翻译：数据延迟电路和时钟提取电路使用相同
公开(公告)号：US5066877A
公开(公告)日：1991-11-19
申请号：US662502
申请日：1991-02-28
申请人： Hiroshi Hamano , Izumi Amemiya , Takuji Yamamoto , Yasunari Arai , Takeshi Ihara
发明人： Hiroshi Hamano , Izumi Amemiya , Takuji Yamamoto , Yasunari Arai , Takeshi Ihara
IPC分类号： H03K5/00 , H03K5/13
CPC分类号： H03K5/13 , H03K5/133 , H03K2005/00156 , H03K2005/00176 , H03K2005/00182
摘要： A data delay circuit includes a first transistor, and a second transistor having a base, an emitter and a collector. Input data is applied to the bases of the first and second transistors. A constant-current source is coupled between the emitters of the first and second transistors and a negative power source. A capacitor is connected between the collector of the first transistor and the collector of the second transistor. The data delay circuit further includes a third transistor and a fourth transistor. The emitters of the third and fourth transistors are connected to the collectors of the first and second transistors, respectively. The bases of the third and fourth transistors are provided with control data having a polarity opposite to that of the input data and having an adjusted amplitude level corresponding to a desired delay time to be given the input data. First and second load resistors are respectively coupled to the collectors of the third and fourth transistors through a positive power source. Delayed input data is drawn from the collectors of the third and fourth transistors.
摘要翻译：数据延迟电路包括第一晶体管和具有基极，发射极和集电极的第二晶体管。输入数据被施加到第一和第二晶体管的基极。恒流源耦合在第一和第二晶体管的发射极和负电源之间。电容器连接在第一晶体管的集电极和第二晶体管的集电极之间。数据延迟电路还包括第三晶体管和第四晶体管。第三和第四晶体管的发射极分别连接到第一和第二晶体管的集电极。第三和第四晶体管的基极设置有与输入数据的极性相反的极性的控制数据，并且具有对应于要给予输入数据的所需延迟时间的调整幅度电平。第一和第二负载电阻器通过正电源分别耦合到第三和第四晶体管的集电极。来自第三和第四晶体管的集电极的延迟输入数据。

5. 发明授权

US5510745A High-speed electronic circuit having a cascode configuration 失效
标题翻译：具有共源共栅配置的高速电子电路
公开(公告)号：US5510745A
公开(公告)日：1996-04-23
申请号：US170997
申请日：1993-12-21
申请人： Hiroshi Hamano , Izumi Amemiya , Takuji Yamamoto , Hiroo Kitasagami , Takeshi Ihara
发明人： Hiroshi Hamano , Izumi Amemiya , Takuji Yamamoto , Hiroo Kitasagami , Takeshi Ihara
IPC分类号： H03F1/22 , H03F3/45 , H03K5/15 , H03K19/018 , H03K19/082
CPC分类号： H03K19/01806 , H03F1/22 , H03F3/45089 , H03K19/01825 , H03K5/15
摘要： A high speed electronic circuit has a cascode circuit configuration and is provided with a bias current source (CS.sub.0) between an emitter and a base of a load transistor (Q) in the cascode circuit configuration for compensating a base-emitter voltage (V.sub.BE) of the transistor to eliminate an adverse effect of charging and discharging at a stray capacitor (C) which can be connected between the base and the emitter of the transistor. The high speed electronic circuit can be applied to an; circuit, a level shift circuit, a level shift discrimination circuit, a signal distribution circuit, a signal synthesization circuit and a frequency band control circuit.
摘要翻译：高速电子电路具有共源共栅电路结构，并且在共源共栅电路配置中在负载晶体管（Q）的发射极和基极之间提供偏置电流源（CS0），用于补偿基极 - 发射极电压（VBE）该晶体管消除了可以连接在晶体管的基极和发射极之间的杂散电容器（C）的充电和放电的不利影响。高速电子电路可应用于; 电平，电平移位电路，电平移位鉴别电路，信号分配电路，信号合成电路和频带控制电路。

6. 发明授权

US5293087A Filter circuit and filter integrated circuit 失效
标题翻译：滤波电路和滤波器集成电路
公开(公告)号：US5293087A
公开(公告)日：1994-03-08
申请号：US963574
申请日：1992-10-19
申请人： Hiroshi Hamano , Izumi Amemiya , Yoichi Oikawa , Takuji Yamamoto , Takeshi Ihara , Yoshinori Nishizawa
发明人： Hiroshi Hamano , Izumi Amemiya , Yoichi Oikawa , Takuji Yamamoto , Takeshi Ihara , Yoshinori Nishizawa
IPC分类号： H03H11/04 , H03H11/12 , H03K5/01
CPC分类号： H03H11/1213
摘要： A filter circuit and a filter integrated circuit capable of being used in a high frequency band comprises a first resistor R.sub.1 connected between an input signal source and an emitter of a common-base transistor TR.sub.1, a first capacitor C.sub.1 connected between said input signal source and a reference voltage point, a second capacitor C.sub.2 connected between said input signal source and a collector of the common-base transistor TR.sub.1, and a second resistor R.sub.2 connected between the collector of the common-base transistor and the reference voltage point. Thus, a low-pass filter which operates in a high frequency band and suppresses the influence of characteristic parameters over the filter characteristic can be constructed.
摘要翻译：能够在高频带中使用的滤波器电路和滤波器集成电路包括连接在公共基极晶体管TR1的输入信号源和发射极之间的第一电阻器R1，连接在所述输入信号源和参考电压点，连接在所述输入信号源和共基极晶体管TR1的集电极之间的第二电容器C2，以及连接在共基极晶体管的集电极和参考电压点之间的第二电阻器R2。因此，可以构成在高频带下工作的低通滤波器，抑制特性参数对滤波器特性的影响。

7. 发明授权

US5506542A Filter circuit and filter integrated circuit 失效
标题翻译：滤波电路和滤波器集成电路
公开(公告)号：US5506542A
公开(公告)日：1996-04-09
申请号：US152838
申请日：1993-11-12
申请人： Hiroshi Hamano , Izumi Amemiya , Yoichi Oikawa , Takuji Yamamoto , Takeshi Ihara , Yoshinori Nishizawa
发明人： Hiroshi Hamano , Izumi Amemiya , Yoichi Oikawa , Takuji Yamamoto , Takeshi Ihara , Yoshinori Nishizawa
IPC分类号： H03H11/04 , H03H11/12 , H03K5/01
CPC分类号： H03H11/1213
摘要： A filter circuit and a filter integrated circuit capable of being used in a high frequency band includes a first resistor R.sub.1 connected between an input signal source and an emitter of a common-base transistor TR.sub.1, a first capacitor C.sub.1 connected between said input signal source and a reference voltage point, a second capacitor C.sub.2 connected between said input signal source and a collector of the common-base transistor TR.sub.1, and a second resistor R.sub.2 connected between the collector of the common-base transistor and the reference voltage point. Thus, a low-pass filter which operates in a high frequency band and suppresses the influence of characteristic parameters over the filter characteristic can be constructed.
摘要翻译：能够在高频带中使用的滤波器电路和滤波器集成电路包括连接在公共基极晶体管TR1的输入信号源和发射极之间的第一电阻器R1，连接在所述输入信号源和参考电压点，连接在所述输入信号源和共基极晶体管TR1的集电极之间的第二电容器C2，以及连接在共基极晶体管的集电极和参考电压点之间的第二电阻器R2。因此，可以构成在高频带下工作的低通滤波器，抑制特性参数对滤波器特性的影响。

8. 发明授权

US5074631A Optical modulator 失效
标题翻译：光学调制器
公开(公告)号：US5074631A
公开(公告)日：1991-12-24
申请号：US492129
申请日：1990-03-13
申请人： Hiroshi Hamano , Izumi Amemiya , Hiroshi Nishimoto , Takefumi Namiki , Izumi Yokota , Tadashi Okiyama , Minoru Seino
发明人： Hiroshi Hamano , Izumi Amemiya , Hiroshi Nishimoto , Takefumi Namiki , Izumi Yokota , Tadashi Okiyama , Minoru Seino
IPC分类号： G02F1/03 , G02F1/225 , G02F1/313 , H04B10/2507
CPC分类号： G02F1/0327 , G02F1/225 , G02F1/3136 , H04B10/2507 , G02F2201/127
摘要： A Mach-Zehnder interferometer type modulator, constructed of first and second optical waveguides, first and second electrodes cooperating with the same, and a driving voltage source, wherein a driving voltage source is constructed of first and second driving units which drive independently the first and second electrodes in accordance with a data input and wherein the first and second driving units apply first and second driving voltages, individually determined, to the first and second electrodes.

9. 发明授权

US06498670B2 Optical receiving apparatus and method 失效
标题翻译：光接收装置及方法
公开(公告)号：US06498670B2
公开(公告)日：2002-12-24
申请号：US09119595
申请日：1998-07-21
申请人： Katsuya Yamashita , Takeshi Ihara , Hiroshi Hamano
发明人： Katsuya Yamashita , Takeshi Ihara , Hiroshi Hamano
IPC分类号： H04B1006
CPC分类号： H04B10/6932 , H04L7/033
摘要： It is aimed at providing an optical receiving apparatus and an optical receiving method, which can assuredly receive and process signal lights having different transmission rates, by a simple and single device. To this end, the signal light received by the present optical receiving apparatus is converted into an electric signal by a light receiving element and thereafter sent to an equalizing amplifier whereby the signal is amplified. The transmission rate of this received signal is detected by a transmission rate detecting part, and a band of the equalizing amplifier is optimally controlled by an equalizing band controlling part, corresponding to the detected transmission rate. In case of adopting a PLL (phase-locked loop) circuit as a clock generating circuit, there is also controlled a band of a loop filter corresponding to the transmission rate detected by the transmission rate detecting part. Thus, there can be obtained an excellent reception characteristics, even when receiving signal lights having different transmission rates.
摘要翻译：旨在提供一种光接收装置和光接收方法，其可以通过简单且单一的装置可靠地接收和处理具有不同传输速率的信号灯。为此，由光接收装置接收的信号光被光接收元件转换成电信号，然后发送到均衡放大器，由此信号被放大。该接收信号的传输速率由传输速率检测部分检测，并且均衡放大器的频带被对应于检测到的传输速率的均衡频带控制部分最佳地控制。在采用PLL（锁相环）电路作为时钟发生电路的情况下，还控制与由传输速率检测部分检测到的传输速率相对应的环路滤波器的频带。因此，即使接收到具有不同传输速率的信号灯，也可以获得良好的接收特性。

10. 发明授权

US5963110A Equalizing filter and control method for signal equalization 失效
标题翻译：均衡滤波器和信号均衡控制方法
公开(公告)号：US5963110A
公开(公告)日：1999-10-05
申请号：US33238
申请日：1998-03-03
申请人： Takeshi Ihara , Hiroshi Hamano
发明人： Takeshi Ihara , Hiroshi Hamano
IPC分类号： H03H7/01 , H03H7/03
CPC分类号： H04L25/03878
摘要： An equalizing filter with an optimized frequency response and improved reliability and quality, for equalizing a reception signal so as to regain its original waveform. The equalizing filter comprises a low-pass filter and a high-frequency booster circuit. With its limited passband, the low-pass filter rejects the noise components contained in the signal being processed. The high-frequency booster circuit has such a frequency response that exhibits a stepwise gain increase at high frequencies. Those two elements, composed of reliable passive components, are coupled in series to provide a combined frequency response that is optimized for the design of highly sensitive optical receivers. As integral part of the high-frequency booster circuit, the equalizing filter employs an inductor made of a bonding wire. To obtain a predetermined inductance with high accuracy, the bonding wire is divided into a plurality of sections, which are used to make a daisy chain connection that bridges between a plurality of lands disposed on the substrate.
摘要翻译：具有优化的频率响应和改进的可靠性和质量的均衡滤波器，用于均衡接收信号以恢复其原始波形。均衡滤波器包括低通滤波器和高频增强电路。低通滤波器通过其有限的通带来抑制正在处理的信号中包含的噪声分量。高频升压电路具有这样的频率响应，其在高频时呈逐步增益。这些由可靠的无源元件组成的两个元件串联耦合，以提供针对高灵敏度光接收器的设计而优化的组合频率响应。作为高频升压电路的组成部分，均衡滤波器采用由接合线构成的电感器。为了以高精度获得预定的电感，接合线被分成多个部分，这些部分用于形成桥接在设置在基板上的多个焊盘之间的菊花链连接。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式