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    • 2. 发明授权
    • Nonvolatile semiconductor memory device with first and second read modes
    • 具有第一和第二读取模式的非易失性半导体存储器件
    • US06842377B2
    • 2005-01-11
    • US10412646
    • 2003-04-11
    • Yoshinori TakanoYasuhiko HondaToru TanzawaMasao Kuriyama
    • Yoshinori TakanoYasuhiko HondaToru TanzawaMasao Kuriyama
    • G11C16/02G11C7/10G11C7/22G11C16/06G11C16/26G11C16/28
    • G11C7/22G11C7/1021G11C16/26G11C16/28G11C2207/2281
    • A nonvolatile semiconductor memory device with a plurality of read modes switchably built therein is provided. This nonvolatile semiconductor memory device is the one that has a memory cell array in which electrically rewritable nonvolatile memory cells are laid out and a read circuit which performs data readout of the memory cell array. The nonvolatile semiconductor memory device has a first read mode and a second read mode. The first read mode is for reading data by means of parallel data transfer of the same bit number when sending data from the memory cell array through the read circuit up to more than one external terminal. The second read mode is for performing parallel data transfer of a greater bit number than that of the first read mode when sending data from the memory cell array to the read circuit while performing data transfer of a smaller bit number than the bit number when sending data from the read circuit up to the external terminal.
    • 提供了一种具有可切换地构建的多个读取模式的非易失性半导体存储器件。 这种非易失性半导体存储器件是具有其中布置有电可重写非易失性存储单元的存储单元阵列,以及执行存储单元阵列的数据读出的读电路。 非易失性半导体存储器件具有第一读取模式和第二读取模式。 第一读取模式是通过从存储单元阵列通过读取电路向多于一个的外部端子发送数据时,通过相同位数的并行数据传输来读取数据。 第二读取模式用于在将数据从存储器单元阵列发送到读取电路时执行比第一读取模式更大位数的并行数据传输,同时在发送数据时执行比位数更小位数的数据传输 从读取电路到外部端子。
    • 3. 发明授权
    • Semiconductor memory device having redundant circuitry for replacing defective memory cell
    • 具有用于替换有缺陷的存储单元的冗余电路的半导体存储器件
    • US06532181B2
    • 2003-03-11
    • US09963404
    • 2001-09-27
    • Hidetoshi SaitoMasao KuriyamaYasuhiko HondaHideo Kato
    • Hidetoshi SaitoMasao KuriyamaYasuhiko HondaHideo Kato
    • G11C700
    • G11C29/78G11C8/06G11C16/26G11C2216/22
    • A nonvolatile semiconductor memory includes a memory cell array and a redundant cell array, and while a data write operation or a data erase operation is carried out in one of banks in the memory cell array, a data read operation can be carried out in the other banks. The redundant cell array has one or more spare blocks and is provided independently of the banks to relieve a defective memory cell of the memory cell array by substituting the spare block for a defective memory block in any of the blocks. The memory block is active when an access block address to be accessed in the memory cell array in the data write or erase operation or the data read operation does not coincide with the defective block address in the defective address storing circuit, whereas the spare block is active when the access block address coincides with the defective block address in the defective address storing circuit.
    • 非易失性半导体存储器包括存储单元阵列和冗余单元阵列,并且在存储单元阵列中的一个存储体中进行数据写入操作或数据擦除操作时,可以在另一个存储单元阵列中执行数据读取操作 银行。 冗余单元阵列具有一个或多个备用块,并且独立于存储体提供,以通过将备用块替换为任何块中的有缺陷的存储块来解除存储单元阵列的有缺陷的存储单元。 当在数据写入或擦除操作或数据读取操作中要存储在存储单元阵列中的访问块地址与缺陷地址存储电路中的有缺陷块地址不一致时,存储块有效,而备用块是 当访问块地址与缺陷地址存储电路中的有缺陷的块地址一致时有效。