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1. 发明授权

US08068047B2 A-D convert apparatus and control method 有权
公开(公告)号：US08068047B2
公开(公告)日：2011-11-29
申请号：US12687525
申请日：2010-01-14
申请人： Yasuhide Kuramochi , Masayuki Kawabata , Kouichiro Uekusa
发明人： Yasuhide Kuramochi , Masayuki Kawabata , Kouichiro Uekusa
IPC分类号： H03M1/12
CPC分类号： H03M1/0604 , H03M1/0682 , H03M1/468 , H03M1/804
摘要： Provided is an AD conversion apparatus including: a differential amplifier that generates a differential input voltage according to an analog input signal; a differential DA converter of a charge redistribution type, which outputs a differential output voltage resulting from subtracting the differential input voltage from a differential comparison voltage that is in accordance with comparison data; a comparator that compares a positive output voltage and a negative output voltage in the differential output voltage; a control section that identifies the comparison data at which the differential output voltage becomes substantially 0 based on a comparison result of the comparator, and outputs the identified comparison data as output data; and a setting section that sets at least one of a common potential of the differential amplifier and a common potential of the differential DA converter, according to a targeted value of a common potential of the comparator

2. 发明授权

US08094053B2 Signal generating apparatus and test apparatus 有权
标题翻译：信号发生装置和试验装置
公开(公告)号：US08094053B2
公开(公告)日：2012-01-10
申请号：US12635169
申请日：2009-12-10
申请人： Yasuhide Kuramochi , Kouichiro Uekusa , Masayuki Kawabata
发明人： Yasuhide Kuramochi , Kouichiro Uekusa , Masayuki Kawabata
IPC分类号： H03M1/66
CPC分类号： H03M1/1038 , H03M1/66
摘要： Provided is a signal generating apparatus comprising a DA converter that outputs an output signal corresponding to input data supplied thereto; a sample/hold unit that is provided between the DA converter and an output end of the signal generating apparatus, and that samples an output voltage of the DA converter and holds the sampled output voltage; a comparing section that compares (i) a level of a signal output from an analog circuit that propagates the output signal to output a signal corresponding to the input data to (ii) a level of the signal output by the DA converter; and a control section that, during a holding period, (iii) provides the DA converter with comparison data instead of the input data to cause the DA converter to output a comparison voltage corresponding to the comparison data, (iv) causes the comparing section to compare a voltage of the signal output by the analog circuit to the comparison voltage, and (v) adjusts the output voltage of the DA converter based on a comparison result of the comparing section.
摘要翻译：提供了一种信号发生装置，包括DA转换器，其输出与提供给其的输入数据相对应的输出信号; 采样/保持单元，设置在DA转换器和信号发生装置的输出端之间，并且对DA转换器的输出电压进行采样并保持采样的输出电压; 比较部分，其比较（i）从传播输出信号的模拟电路输出的信号的电平，以输出对应于输入数据的信号，以（ii）由DA转换器输出的信号的电平; 以及控制部，在保持期间，（iii）向DA转换器提供代替输入数据的比较数据，使DA转换器输出与比较数据对应的比较电压，（iv）使比较部分将模拟电路输出的信号的电压与比较电压进行比较，（v）根据比较部分的比较结果调整DA转换器的输出电压。

3. 发明授权

US07982520B2 Signal generating apparatus and test apparatus 有权
标题翻译：信号发生装置和试验装置
公开(公告)号：US07982520B2
公开(公告)日：2011-07-19
申请号：US12642706
申请日：2009-12-18
申请人： Yasuhide Kuramochi , Masayuki Kawabata , Kouichiro Uekusa
发明人： Yasuhide Kuramochi , Masayuki Kawabata , Kouichiro Uekusa
IPC分类号： H03L5/00
CPC分类号： H03M1/06 , H03M1/804
摘要： Provided is a signal generating apparatus that outputs from an output end thereof an output voltage corresponding to input data supplied thereto, comprising: a DA converter that outputs a voltage corresponding to data supplied thereto; a capacitor section that is provided between the output end and a standard potential; a transmission switch that provides a connection or a disconnect between a voltage generating end of the DA converter and the output end; and a control section that causes the DA converter to charge the capacitor section with a voltage corresponding to the input data by repeatedly connecting and disconnecting the transmission switch, thereby causing the voltage of the capacitor section to gradually approach the output voltage corresponding to the input data.
摘要翻译：提供一种信号发生装置，从其输出端输出与提供给其的输入数据相对应的输出电压，包括：DA转换器，输出与提供给其的数据相对应的电压; 电容器部分，其设置在输出端和标准电位之间; 传输开关，其提供DA转换器的电压产生端与输出端之间的连接或断开; 以及控制部，其使得DA转换器通过重复地连接和断开所述传输开关而对与所述输入数据相对应的电压对所述电容器部分充电，从而使所述电容器部分的电压逐渐接近与所述输入数据相对应的输出电压。

4. 发明授权

US08179154B2 Device, test apparatus and test method 有权
标题翻译：装置，试验装置及试验方法
公开(公告)号：US08179154B2
公开(公告)日：2012-05-15
申请号：US12261056
申请日：2008-10-30
申请人： Yasuhide Kuramochi , Masayuki Kawabata
发明人： Yasuhide Kuramochi , Masayuki Kawabata
IPC分类号： G01R31/26
CPC分类号： G01R31/31926
摘要： Provided is a test apparatus that tests a device under test. The device under test includes: a circuit under test; and a switching section that that connects an internal terminal being tested, from among one or more internal terminals of the circuit under test, to external terminals connected to the test apparatus. The test apparatus includes: a measuring section that controls a relay section, which provides a connection or a disconnect between two of the external terminals such that a transmission characteristic of the relay section in a connected state serves as a basis for calculating the transmission characteristic between each external terminal and each internal terminal of the circuit under test, to be in a connected state and measures the transmission characteristic of the relay section via the two external terminals; and a compensating section that compensates a signal to be supplied to the circuit under test via an external terminal and the switching section and/or a signal acquired from the circuit under test via the switching section and an external terminal, based on the measured transmission characteristic of the relay section.
摘要翻译：提供了测试被测设备的测试装置。被测设备包括：被测电路; 以及切换部，其将被测试电路的内部端子从被测试电路的一个或多个内部端子连接到与测试装置连接的外部端子。测试装置包括：测量部分，其控制中继部分，其提供两个外部终端之间的连接或断开，使得处于连接状态的中继部分的传输特性用作计算第二传输特性之间的传输特性的基础被测电路的每个外部端子和每个内部端子处于连接状态，并通过两个外部端子测量继电器部分的传输特性; 以及补偿部，其基于所测量的传输特性，经由所述切换部和外部端子，经由外部端子和所述开关部和/或从所述被测试电路获取的信号，补偿要提供给被测试电路的信号的继电器部分。

5. 发明授权

US07479914B2 A-D converter and A-D convert method 有权
标题翻译： A-D转换器和A-D转换方法
公开(公告)号：US07479914B2
公开(公告)日：2009-01-20
申请号：US11853836
申请日：2007-09-12
申请人： Yasuhide Kuramochi , Akira Matsuzawa
发明人： Yasuhide Kuramochi , Akira Matsuzawa
IPC分类号： H03M1/12
CPC分类号： H03M1/0643 , A61K38/00 , C07K1/22 , C07K14/75 , H03M1/0658 , H03M1/144 , H03M1/361 , H03M1/46 , H03M1/804
摘要： An A-D converter includes a plurality of comparators, each of which compares an analog input signal to analog threshold values; an upper field determination section which, during an upper determination phase, supplies in parallel to each of the plurality of comparators the plurality of analog threshold values expressing boundaries of ranges corresponding to each data value acquired from the upper field of a number of bits previously designated in the digital output signal, detects whether the analog input signal is associated with one of the ranges based on comparison results by the plurality of comparators, and narrows data values of the upper field to data values corresponding to a range between the largest analog threshold value less than or equal to the analog input signal and the smallest analog threshold value greater than or equal to the analog input signal; and a lower field determination section which, during the lower determination phase, determines values of conversion target bits based on a plurality of comparison results of the plurality of comparators.
摘要翻译： A-D转换器包括多个比较器，每个比较器将模拟输入信号与模拟阈值进行比较; 上场确定部分，在上确定阶段期间并行地向多个比较器中的每一个提供多个模拟阈值，所述多个模拟阈值表示与从先前指定的多个比特数的比特数的上位获取的每个数据值对应的范围的范围在数字输出信号中，基于多个比较器的比较结果来检测模拟输入信号是否与一个范围相关联，并且将上场的数据值与对应于最大模拟阈值之间的范围的数据值进行窄化小于或等于模拟输入信号和大于或等于模拟输入信号的最小模拟阈值; 以及下场确定部，其在所述较低确定阶段期间，基于所述多个比较器的多个比较结果来确定转换目标比特的值。

6. 发明授权

US07477177B2 A-D converter, A-D convert method, and A-D convert program 有权
标题翻译： A-D转换器，A-D转换方式和A-D转换程序
公开(公告)号：US07477177B2
公开(公告)日：2009-01-13
申请号：US11520436
申请日：2006-09-13
申请人： Yasuhide Kuramochi , Akira Matsuzawa
发明人： Yasuhide Kuramochi , Akira Matsuzawa
IPC分类号： H03M1/12
CPC分类号： H03M1/0643 , A61K38/00 , C07K1/22 , C07K14/75 , H03M1/0658 , H03M1/144 , H03M1/361 , H03M1/46 , H03M1/804
摘要： An A-D converter that outputs a digital output signal obtained by digitalizing an analog input signal includes a plurality of comparators that each compare the analog input signal and an analog threshold value based on designated digital threshold data, a high-order field determining section that narrows down a data value corresponding to a high-order field of a predetermined bit number in the digital output signal based on a plurality of comparison results obtained by supplying threshold data different from one another to the plurality of comparators, a low-order field computing section that computes a plurality of candidate values for a data value corresponding to a low-order field of a predetermined bit number located at a side lower than the high-order field, and a low-order field determining section that determines a data value corresponding to the low-order field based on the plurality of candidate values.
摘要翻译：输出通过对模拟输入信号进行数字化而获得的数字输出信号的AD转换器包括多个比较器，每个比较器基于指定的数字阈值数据来比较模拟输入信号和模拟阈值，高阶场确定部分缩小基于通过向多个比较器提供彼此不同的阈值数据而获得的多个比较结果，对应于数字输出信号中的预定比特数的高阶场的数据值;低阶场计算部分，计算与位于低于高位场的一侧的预定比特数的低位场对应的数据值的多个候选值，以及低阶场确定部，其确定对应于基于多个候选值的低阶场。

7. 发明授权

US08193960B2 Output apparatus and test apparatus 有权
标题翻译：输出装置和试验装置
公开(公告)号：US08193960B2
公开(公告)日：2012-06-05
申请号：US12703579
申请日：2010-02-10
申请人： Yasuhide Kuramochi
发明人： Yasuhide Kuramochi
IPC分类号： H03M1/66
CPC分类号： H03M1/1061 , H03M1/745
摘要： Provided is an output apparatus comprising a plurality of current sources; a plurality of holding sections that correspond respectively to the current sources and that each hold a designated voltage that designates a current flowing through the corresponding current source; a setting DAC that sequentially generates the designated voltage to be held by each holding section; and a supply section that sequentially switches a supply of the designated voltage generated by the setting DAC among corresponding holding sections.
摘要翻译：提供了一种包括多个电流源的输出装置; 多个保持部分，分别对应于电流源，并且每个保持指定电流指定流过对应的电流源的电流; 设置DAC，其顺序地产生要由每个保持部保持的指定电压; 以及供应部，其在相应的保持部中顺序地切换由所述设定DAC产生的指定电压的供给。

8. 发明授权

US08081096B2 Signal generating apparatus and test apparatus 有权
标题翻译：信号发生装置和试验装置
公开(公告)号：US08081096B2
公开(公告)日：2011-12-20
申请号：US12633666
申请日：2009-12-08
申请人： Yasuhide Kuramochi
发明人： Yasuhide Kuramochi
IPC分类号： H03M1/10
CPC分类号： H03M1/1038 , H03M1/66
摘要： Provided is a signal generating apparatus comprising a DA converter that outputs an output signal corresponding to input data supplied thereto; a sample/hold unit that is provided between the DA converter and an output end of the signal generating apparatus, and that samples an output voltage of the DA converter and holds the sampled output voltage; a comparing section that compares (i) a level of a signal output from an analog circuit that propagates the output signal to output a signal corresponding to the input data to (ii) a level of the signal output by the DA converter; and a control section that, during a holding period, (iii) provides the DA converter with comparison data instead of the input data to cause the DA converter to output a comparison voltage corresponding to the comparison data, (iv) causes the comparing section to compare a voltage of the signal output by the analog circuit to the comparison voltage, and (v) adjusts the output voltage of the DA converter according to the input data based on a comparison result of the comparing section.
摘要翻译：提供了一种信号发生装置，包括DA转换器，其输出与提供给其的输入数据相对应的输出信号; 采样/保持单元，设置在DA转换器和信号发生装置的输出端之间，并且对DA转换器的输出电压进行采样并保持采样的输出电压; 比较部分，其比较（i）从传播输出信号的模拟电路输出的信号的电平，以输出对应于输入数据的信号，以（ii）由DA转换器输出的信号的电平; 以及控制部，在保持期间，（iii）向DA转换器提供代替输入数据的比较数据，使DA转换器输出与比较数据对应的比较电压，（iv）使比较部分将模拟电路输出的信号的电压与比较电压进行比较，（v）根据比较部分的比较结果，根据输入数据调整DA转换器的输出电压。

9. 发明授权

US07778319B2 Jitter measuring apparatus, jitter measuring method and test apparatus 失效
标题翻译：抖动测量装置，抖动测量方法和测试装置
公开(公告)号：US07778319B2
公开(公告)日：2010-08-17
申请号：US11266472
申请日：2005-11-04
申请人： Kiyotaka Ichiyama , Masahiro Ishida , Yasuhide Kuramochi , Takahiro Yamaguchi
发明人： Kiyotaka Ichiyama , Masahiro Ishida , Yasuhide Kuramochi , Takahiro Yamaguchi
IPC分类号： H04B3/46
CPC分类号： G01R31/31709
摘要： There is provided a jitter measuring apparatus for measuring jitter in a signal-under-measurement having a first pulse generator for detecting edges of the data-signal-under-measurement to output a first pulse signal having a pulse width set in advance corresponding to the edge, a second pulse generator for detecting boundaries of data sections where data values do not change in the data-signal-under-measurement to output a second pulse signal having a pulse width set in advance corresponding to timing of the detected boundaries of the data sections, a filter for removing carrier frequency components of said data-signal-under-measurement from first and second pulse signals and a jitter calculating section for calculating timing jitter in the data-signal-under-measurement based on the first and second pulse signals.
摘要翻译：提供了一种抖动测量装置，用于测量具有第一脉冲发生器的测量信号中的抖动，用于检测数据信号下测量的边沿，以输出具有预先对应于脉冲宽度设置的脉冲宽度的第一脉冲信号边缘，第二脉冲发生器，用于检测在数据信号下测量中数据值不改变的数据段的边界，以输出具有预先设置的脉冲宽度的第二脉冲信号，该脉冲宽度对应于检测到的数据边界的定时部分，用于从第一和第二脉冲信号中去除所述数据信号不足测量的载波频率分量的滤波器和用于基于第一和第二脉冲信号计算测量数据信号中的定时抖动的抖动计算部分。

10. 发明授权

US07583218B2 Comparator and A-D converter 有权
标题翻译：比较器和A-D转换器
公开(公告)号：US07583218B2
公开(公告)日：2009-09-01
申请号：US11936805
申请日：2007-11-08
申请人： Yasuhide Kuramochi
发明人： Yasuhide Kuramochi
IPC分类号： H03M1/12
CPC分类号： H03K3/356139
摘要： A comparator is provided that outputs a comparison result obtained by comparing two signals. The comparator includes a positive buffer that converts a positive comparison signal, which has a level according to a difference between the two signals, into a positive logic signal that indicates a logic level; a negative buffer that converts a negative comparison signal, which has a level that is inverted in relation to the positive comparison signal, into a negative logic signal that indicates a logic level that is inverted in relation to the positive logic signal; a latch core that, at a timing at which a latch period in which the comparison result is held begins, acquires the logic level of the positive logic signal and the logic level of the negative logic signal and holds the acquired logic levels; and a potential control section that, prior to a timing at which the latch period ends, sets an output end of the positive buffer to have a potential that is identical to that of an output end of the negative buffer.
摘要翻译：提供比较器，其输出通过比较两个信号获得的比较结果。比较器包括正缓冲器，其将具有根据两个信号之间的差的电平的正比较信号转换为指示逻辑电平的正逻辑信号; 将具有相对于正比较信号反相的电平的负比较信号转换为指示相对于正逻辑信号反相的逻辑电平的负逻辑信号的负缓冲器; 在开始保持比较结果的锁存期间的定时，获取正逻辑信号的逻辑电平和负逻辑信号的逻辑电平并保持所获取的逻辑电平的锁存核心; 以及电位控制部，其在所述锁存期间结束的定时之前，将所述正缓冲器的输出端设定为与所述负缓冲器的输出端的电位相同的电位。

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