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1. 发明申请

US20110145461A1 METHOD AND DEVICE FOR BALANCING INTERRUPT LOAD OF MULTICORE PROCESSOR 审中-公开
标题翻译：用于平衡多处理器的中断负载的方法和装置
公开(公告)号：US20110145461A1
公开(公告)日：2011-06-16
申请号：US13059366
申请日：2009-08-13
申请人： Yang Zhao , Li Xiao
发明人： Yang Zhao , Li Xiao
IPC分类号： G06F13/24
CPC分类号： G06F9/4812 , G06F9/505 , G06F2209/5022
摘要： A method and a device for balancing an interrupt load of a multicore processor are provided, the multicore processor includes multiple cores and an interrupt controller for controlling interrupt handling of the cores, characterized in that the method includes: pre-configuring a default processing core and a scheduling core group corresponding to an interrupt device, wherein the default processing core is one core in the scheduling core group; configuring the interrupt controller to route the interrupt device to the corresponding default processing core; and controlling the interrupt controller to route the interrupt device to one or multiple cores in the scheduling core group to which the default processing core belongs, when the number of interrupts of the interrupt device exceeds an interrupt threshold or a processing amount of the default processing core exceeds an interrupt load.
摘要翻译：提供了一种用于平衡多核处理器的中断负载的方法和设备，所述多核处理器包括多个核和用于控制所述核的中断处理的中断控制器，其特征在于，所述方法包括：预配置默认处理核和对应于中断装置的调度核心组，其中所述默认处理核心是所述调度核心组中的一个核心; 配置中断控制器将中断设备路由到相应的默认处理核心; 并且当中断装置的中断数超过中断阈值或默认处理核的处理量时，控制中断控制器将中断装置路由到默认处理核所属的调度核心组中的一个或多个核心超过中断负载。

2. 发明授权

US08880927B2 Time synchronization method and system for multicore system 有权
标题翻译：多核系统的时间同步方法和系统
公开(公告)号：US08880927B2
公开(公告)日：2014-11-04
申请号：US13061748
申请日：2009-08-27
申请人： Yang Zhao , Li Xiao
发明人： Yang Zhao , Li Xiao
IPC分类号： G06F1/12 , G06F13/42
CPC分类号： G06F1/14
摘要： A time synchronization method and system for a multi-core system are provided. The time synchronization method comprises: establishing at least one clock synchronization domain, and respectively allocating each core to each clock synchronization domain; selecting a core with a lowest load in each clock synchronization domain as a master clock synchronization source in the clock synchronization domain, and selecting the clock synchronization domain having the master clock synchronization source with a lowest load as a master clock synchronization domain, while other clock synchronization domains as slave clock synchronization domains; the master clock synchronization domain sending a synchronization deviation detection message to each slave clock synchronization domain, and calculating a time deviation value; when the time deviation value is greater than a permitted deviation value, the master clock synchronization domain calculating a time adjustment quantity and releasing to each slave clock synchronization domain, making adjustment based on its time adjustment quantity.
摘要翻译：提供了一种多核系统的时间同步方法和系统。时间同步方法包括：建立至少一个时钟同步域，并分别将每个核心分配给每个时钟同步域; 在每个时钟同步域中选择具有最低负载的内核作为时钟同步域中的主时钟同步源，并选择具有最低负载的主时钟同步源作为主时钟同步域的时钟同步域，而其他时钟同步域作为从时钟同步域; 主时钟同步域向每个从时钟同步域发送同步偏差检测消息，并计算时间偏差值; 当时间偏差值大于允许偏差值时，主时钟同步域计算时间调整量并释放到每个从时钟同步域，根据其时间调整量进行调整。

3. 发明申请

US20110185216A1 Time Synchronization Method and System for Multicore System 有权
标题翻译：多核系统的时间同步方法与系统
公开(公告)号：US20110185216A1
公开(公告)日：2011-07-28
申请号：US13061748
申请日：2009-08-27
申请人： Yang Zhao , Li Xiao
发明人： Yang Zhao , Li Xiao
IPC分类号： G06F1/12
CPC分类号： G06F1/14
摘要： A time synchronization method and system for a multi-core system are provided. The time synchronization method comprises: establishing at least one clock synchronization domain, and respectively allocating each core to each clock synchronization domain; selecting a core with a lowest load in each clock synchronization domain as a master clock synchronization source in the clock synchronization domain, and selecting the clock synchronization domain having the master clock synchronization source with a lowest load as a master clock synchronization domain, while other clock synchronization domains as slave clock synchronization domains; the master clock synchronization domain sending a synchronization deviation detection message to each slave clock synchronization domain, and calculating a time deviation value; when the time deviation value is greater than a permitted deviation value, the master clock synchronization domain calculating a time adjustment quantity and releasing to each slave clock synchronization domain, making adjustment based on its time adjustment quantity.
摘要翻译：提供了一种多核系统的时间同步方法和系统。时间同步方法包括：建立至少一个时钟同步域，并分别将每个核心分配给每个时钟同步域; 在每个时钟同步域中选择具有最低负载的内核作为时钟同步域中的主时钟同步源，并选择具有最低负载的主时钟同步源作为主时钟同步域的时钟同步域，而其他时钟同步域作为从时钟同步域; 主时钟同步域向每个从时钟同步域发送同步偏差检测消息，并计算时间偏差值; 当时间偏差值大于允许偏差值时，主时钟同步域计算时间调整量并释放到每个从时钟同步域，根据其时间调整量进行调整。

4. 发明授权

US09004201B2 Jumping robot 有权
标题翻译：跳跃机器人
公开(公告)号：US09004201B2
公开(公告)日：2015-04-14
申请号：US13832284
申请日：2013-03-15
申请人： Ning Xi , Jianguo Zhao , Bingtuan Gao , Jing Xu , Matt Mutka , Li Xiao
发明人： Ning Xi , Jianguo Zhao , Bingtuan Gao , Jing Xu , Matt Mutka , Li Xiao
IPC分类号： B62D57/00 , B25J9/16 , B25J9/10
CPC分类号： B25J9/1682 , B25J9/104 , Y10S901/01
摘要： A jumping robot is provided. In another aspect, a jumping robot weighs less than 50 grams, jumps at least 20 cm high and has a maximum linear dimension of 10 cm. A further aspect provides a robot that employs an electromagnetic actuator that actuates at least two of: jumping, steering, self-righting, and/or mid-air orientation control.
摘要翻译：提供跳跃机器人。在另一方面，跳跃机器人重量小于50克，跳跃至少20厘米高，最大直线尺寸为10厘米。另一方面提供了一种使用致动器的电磁致动器的机器人，其致动：跳跃，转向，自对准和/或空中取向控制中的至少两个。

5. 发明授权

US08546404B2 Compounds that are ERK inhibitors 有权
标题翻译： ERK抑制剂的化合物
公开(公告)号：US08546404B2
公开(公告)日：2013-10-01
申请号：US11810282
申请日：2007-06-05
申请人： Alan B. Cooper , Yongqi Deng , Gerald W. Shipps, Jr. , Neng-Yang Shih , Hugh Y. Zhu , Robert Sun , Joseph M. Kelly , Ronald J. Doll , Yang Nan , Tong Wang , Jagdish A. Desai , James J-S Wang , Youhao Dong , Vincent S. Madison , Li Xiao , Alan W. Hruza , M. Arshad Siddiqui , Ahmed A. Samatar , Sunil Paliwal , Hon-Chung Tsui , Azim Alan Celebi , Yiji Wu , Sobhana Babu Boga , Abdul-Basit Alhassan , Xiaolei Gao , Liang Zhu , Mehul Patel
发明人： Alan B. Cooper , Yongqi Deng , Gerald W. Shipps, Jr. , Neng-Yang Shih , Hugh Y. Zhu , Robert Sun , Joseph M. Kelly , Ronald J. Doll , Yang Nan , Tong Wang , Jagdish A. Desai , James J-S Wang , Youhao Dong , Vincent S. Madison , Li Xiao , Alan W. Hruza , M. Arshad Siddiqui , Ahmed A. Samatar , Sunil Paliwal , Hon-Chung Tsui , Azim Alan Celebi , Yiji Wu , Sobhana Babu Boga , Abdul-Basit Alhassan , Xiaolei Gao , Liang Zhu , Mehul Patel
IPC分类号： A01N43/54 , C07D239/42 , C07D401/04
CPC分类号： C07D231/56 , C07D401/14 , C07D403/12 , C07D403/14 , C07D405/14 , C07D409/12 , C07D409/14 , C07D413/12 , C07D417/14
摘要： Disclosed are the ERK inhibitors of formula 1.0: and the pharmaceutically acceptable salts, esters and solvates thereof. Q is a piperidine or piperazine ring that can have a bridge or a fused ring. The piperidine ring can have a double bond in the ring. All other substitutents are as defined herein. Also disclosed are methods of treating cancer using the compounds of formula 1.0.
摘要翻译：公开了式1.0的ERK抑制剂及其药学上可接受的盐，酯和溶剂化物。 Q是可以具有桥或稠合环的哌啶或哌嗪环。哌啶环可以在环中具有双键。所有其他取代基如本文所定义。还公开了使用式1.0化合物治疗癌症的方法。

6. 发明授权

US08289749B2 Soft forming reversible resistivity-switching element for bipolar switching 有权
标题翻译：用于双极开关的软成型可逆电阻率开关元件
公开(公告)号：US08289749B2
公开(公告)日：2012-10-16
申请号：US12642191
申请日：2009-12-18
申请人： Xiying Chen , Abhijit Bandyopadhyay , Brian Le , Roy Scheuerlein , Li Xiao
发明人： Xiying Chen , Abhijit Bandyopadhyay , Brian Le , Roy Scheuerlein , Li Xiao
IPC分类号： G11C11/00
CPC分类号： G11C13/0007 , G11C13/0064 , G11C13/0069 , G11C2013/0073 , G11C2013/0083 , G11C2013/0092 , G11C2213/32 , G11C2213/34
摘要： A method and system for forming reversible resistivity-switching elements is described herein. Forming refers to reducing the resistance of the reversible resistivity-switching element, and is generally understood to refer to reducing the resistance for the first time. Prior to forming the reversible resistivity-switching element it may be in a high-resistance state. A first voltage is applied to “partially form” the reversible resistivity-switching element. The first voltage has a first polarity. Partially forming the reversible resistivity-switching element lowers the resistance of the reversible resistivity-switching element. A second voltage that has the opposite polarity as the first is then applied to the reversible resistivity-switching element. Application of the second voltage may further lower the resistance of the reversible resistivity-switching element. Therefore, the second voltage could be considered as completing the forming of the reversible resistivity-switching element.
摘要翻译：本文描述了用于形成可逆电阻率开关元件的方法和系统。形成是指降低可逆电阻率开关元件的电阻，并且通常被理解为指第一次降低电阻。在形成可逆电阻率开关元件之前，它可能处于高电阻状态。施加第一电压以部分地形成可逆电阻率开关元件。第一电压具有第一极性。部分形成可逆电阻率开关元件降低可逆电阻率开关元件的电阻。然后将具有与第一相反极性的第二电压施加到可逆电阻率开关元件。第二电压的施加可以进一步降低可逆电阻率开关元件的电阻。因此，可以将第二电压视为完成可逆电阻率开关元件的形成。

7. 发明授权

US08049511B2 Method of detecting faulty via holes in printed circuit boards 有权
标题翻译：检测印刷电路板故障通孔的方法
公开(公告)号：US08049511B2
公开(公告)日：2011-11-01
申请号：US12143632
申请日：2008-06-20
申请人： Li Xiao , I-Hsien Chiang , Chih-Yi Tu
发明人： Li Xiao , I-Hsien Chiang , Chih-Yi Tu
IPC分类号： G01R31/08
CPC分类号： G01R31/2812
摘要： A method of detecting faulty via holes of a printed circuit board. The printed circuit board including a number of electric trace segments. The method includes steps of: providing a testing system, the testing system comprising a processor, a storing means and a resistance measuring device, the storing means for storing a function Ymin=fmin(X) wherein X represents a reference resistance associated with a given electric trace segment, Ymin represents a minimum threshold value; measuring a resistance of an electric trace segment of a to-be-tested printed circuit board using the resistance measuring device, a to-be-tested via hole located on the electric trace segment; and judging whether the to-be-tested via hole is a faulty via hole according to the following criteria: if |Xa−X|≧Ymin, the to-be-tested via hole is a faulty via hole, and if |Xa−X|
摘要翻译：一种检测印刷电路板故障通孔的方法。印刷电路板包括多个电迹线段。该方法包括以下步骤：提供测试系统，所述测试系统包括处理器，存储装置和电阻测量装置，所述存储装置用于存储功能Ymin = fmin（X），其中X表示与给定的相关联的参考电阻电迹线段，Ymin表示最小阈值; 使用电阻测量装置测量待测试印刷电路板的电迹线段的电阻，该电阻测量装置是位于电迹线段上的待测试通孔; 并且根据以下标准判断被测试的通孔是否是故障的通孔：如果| Xa-X |≥Ymin，待测试的通孔是故障的通孔，并且如果| Xa- X |

8. 发明授权

US07865715B2 Increasing peer privacy 有权
标题翻译：增加对等隐私
公开(公告)号：US07865715B2
公开(公告)日：2011-01-04
申请号：US10084499
申请日：2002-02-28
申请人： Zhichen Xu , Li Xiao
发明人： Zhichen Xu , Li Xiao
IPC分类号： H04L9/00
CPC分类号： H04L63/0407 , H04L63/0442
摘要： In a method for increasing peer privacy, a path for information is formed from a provider to a requestor through a plurality of peers in response to a received request for the information. Each peer of the plurality of peers receives a respective set-up message comprising of a predetermined label and an identity of a next peer for the information. The information is transferred over the path in a message, where the message comprises a message label configured to determine a next peer according to the path in response to the message label matching the previously received predetermined label.
摘要翻译：在增加对等体隐私的方法中，响应于接收到的信息请求，通过多个对等体从提供者到请求者形成信息路径。多个对等体的每个对等体接收相应的建立消息，其包括预定标签和信息的下一个对等体的标识。信息通过消息中的路径传送，其中消息包括被配置为响应于与先前接收到的预定标签匹配的消息标签的路径来确定下一对等体的消息标签。

9. 发明授权

US07511062B2 Substituted 2-quinolyl-oxazoles useful as PDE4 inhibitors 失效
标题翻译：用作PDE4抑制剂的取代的2-喹啉基 - 恶唑
公开(公告)号：US07511062B2
公开(公告)日：2009-03-31
申请号：US11130359
申请日：2005-05-16
申请人： Rongze Kuang , David Blythin , Neng-Yang Shih , Ho-Jane Shue , Xiao Chen , Jianhua Cao , Danlin Gu , Ying Huang , John H. Schwerdt , Pauline C. Ting , Shing-Chun Wong , Li Xiao
发明人： Rongze Kuang , David Blythin , Neng-Yang Shih , Ho-Jane Shue , Xiao Chen , Jianhua Cao , Danlin Gu , Ying Huang , John H. Schwerdt , Pauline C. Ting , Shing-Chun Wong , Li Xiao
IPC分类号： C07D215/38 , A61K31/44
CPC分类号： C07D405/14 , C07D401/04 , C07D405/04 , C07D409/14 , C07D413/04 , C07D413/14 , C07D417/04 , C07D417/14
摘要： The invention claims compounds of the formula wherein is a 5-membered heteroaryl; X is S or O; R1 is H, alkyl, cycloalkyl, cylcoalkylalkyl-, —CH2F, —CHF2, —CF3, —C(O)alkyl or —C(O)NR18R19; R3 and R4 H, alkyl, hydroxyalkyl or —C(O)Oalkyl; R5 and R6 are H, alkyl, hydroxyalkyl, alkoxyalkyl, mercaptoalkyl, —CH2F, —CHF2, —CF3, —C(O)OH or —C(O)Oalkyl; R7 is H, alkyl, alkenyl, hydroxyalkyl, cycloalkyl, alkoxyalkyl, aminoalkyl, (R17-phenyl)alkyl or —CH2—C(O)—O-alkyl; and R8 comprises alkyl, heteroaryl, phenyl or cycloalkyl, or heterocycloalkyl, all optionally substituted, or a cycloalkyl- or heterocycloalkyl-substituted amide; or R7 and R8 and the nitrogen to which they are attached together form an optionally substituted ring; and the remaining variables are as defined in the specification. Also claimed are pharmaceutical compositions, the use of the compounds as PDE4 inhibitors, and combinations with other actives.
摘要翻译：本发明要求具有下式的化合物其中是5元杂芳基; X是S或O; R 1是H，烷基，环烷基，环烷基烷基 - ， - CH 2 F，-CHF 2，-CF 3，-C（O）烷基或-C（O）NR 18 R 19; R 3和R 4 H，烷基，羟基烷基或-C（O）O烷基; R5和R6是H，烷基，羟基烷基，烷氧基烷基，巯基烷基，-CH2F，-CHF2，-CF3，-C（O）OH或-C（O） R 7是H，烷基，烯基，羟基烷基，环烷基，烷氧基烷基，氨基烷基，（R 17 - 苯基）烷基或-CH 2 -C（O）-O-烷基; 和R8包括烷基，杂芳基，苯基或环烷基，或杂环烷基，全部任意取代，或环烷基 - 或杂环烷基取代的酰胺; 或R 7和R 8，并且与它们相连的氮一起形成任选取代的环; 其余变量如本说明书中所定义。还要求保护的是药物组合物，化合物作为PDE4抑制剂的用途，以及与其它活性物质的组合。

10. 发明授权

US07398388B2 Increasing peer privacy 有权
标题翻译：增加对等隐私
公开(公告)号：US07398388B2
公开(公告)日：2008-07-08
申请号：US10084436
申请日：2002-02-28
申请人： Zhichen Xu , Li Xiao
发明人： Zhichen Xu , Li Xiao
IPC分类号： H04L9/00
CPC分类号： H04L63/0414 , H04L29/06 , H04L63/045 , H04L67/104 , H04L67/1061 , H04L69/329
摘要： In a method for increasing peer privacy, a request for a data is received from a data requester and the data is stored at a data provider. A plurality of peers are selected to form a path, where the data provider and the data requestor are the respective ends of the path. A mix is generated according to the path and the mix is transmitted to the data provider.
摘要翻译：在增加对等隐私的方法中，从数据请求者接收对数据的请求，并将数据存储在数据提供者处。选择多个对等体以形成路径，其中数据提供者和数据请求者是路径的相应末端。根据路径生成混合，并将混合传输到数据提供者。

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