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1. 发明申请

US20080183928A1 Addressable Serial Peripheral Interface 有权
标题翻译：可寻址串行外设接口
公开(公告)号：US20080183928A1
公开(公告)日：2008-07-31
申请号：US12018863
申请日：2008-01-24
申请人： Yaki DEVILA , Alon FERENTZ , Roni BLAUT , Amir PELEG
发明人： Yaki DEVILA , Alon FERENTZ , Roni BLAUT , Amir PELEG
IPC分类号： G06F13/00 , H03M13/00
CPC分类号： G06F13/4291
摘要： An addressable SPI bus and an associated communication protocol. The addressable SPI bus comprises a plurality of slaves each exhibiting a particular address and a shift register whose output is connected to a common MISO bus by a buffer exhibiting a three state output, also known as a tri-state output. The master asserts a single SS line, which is connected in parallel to each of the plurality of slaves, indicating the beginning of a frame, and transmits via the MOSI bus the address of a particular slave of the plurality of slaves, denoted interchangeably the target or destination slave. Responsive to the received address, the target slave enables the three state output associated therewith thus transmitting the output of the target slave shift register to the master via the MISO bus.
摘要翻译：可寻址的SPI总线和相关的通信协议。可寻址SPI总线包括各自呈现特定地址的多个从机和移位寄存器，其输出通过呈现三态输出（也称为三态输出）的缓冲器连接到公共MISO总线。主机断言单个SS线路并行连接到多个从站中的每一个，指示帧的开始，并且经由MOSI总线发送多个从站的特定从站的地址，可替换地表示目标或目的地从站。响应于接收到的地址，目标从机使能与之相关联的三个状态输出，从而通过MISO总线将目标从机移位寄存器的输出发送给主机。

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