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    • 10. 发明授权
    • Thin film transistor array panel and manufacturing method thereof
    • 薄膜晶体管阵列面板及其制造方法
    • US08207534B2
    • 2012-06-26
    • US12417280
    • 2009-04-02
    • Je-Hun LeeSung-Jin KimHee-Joon KimChang-Oh Jeong
    • Je-Hun LeeSung-Jin KimHee-Joon KimChang-Oh Jeong
    • H01L29/786
    • G02F1/13439G02F1/13458H01L27/12H01L27/124H01L29/458H01L29/4908
    • A thin film transistor array panel is provided, which includes a substrate, a plurality of gate line formed on the substrate, a plurality of common electrodes having a transparent conductive layer on the substrate, a gate insulating layer covering the gate lines and the common electrodes, a plurality of semiconductor layers formed on the gate insulating layer, a plurality of data lines including a plurality of source electrodes and formed on the semiconductor layer and the gate insulating layer, a plurality of drain electrodes formed on the semiconductor layer and the gate insulating layer, and a plurality of pixel electrodes overlapping the common electrodes and connected to the drain electrodes. Because the common electrodes are made of ITON, IZON, or a-ITON, or a double layer of ITO/ITON, IZO/IZON, or a-a-ITO/a-ITON, when H2 or SiH4 are injected to form a silicon nitride (SiNX) layer on the common electrodes, the opaque metal Sn or Zn in which the metal component is reduced in the IZO, ITO, or a-ITO is not produced on the surfaces of the common electrode.
    • 提供薄膜晶体管阵列面板,其包括基板,形成在基板上的多个栅极线,在基板上具有透明导电层的多个公共电极,覆盖栅极线和公共电极的栅极绝缘层 形成在所述栅极绝缘层上的多个半导体层,形成在所述半导体层和所述栅极绝缘层上的多个源极电极的多条数据线,形成在所述半导体层上的多个漏电极和所述栅极绝缘体 并且与公共电极重叠并连接到漏电极的多个像素电极。 由于公共电极由ITON,IZON或者-IONON制成,或者是将双重层的ITO / ITON,IZO / IZON或者a-ITO / a-ITON,当注入H 2或SiH 4以形成氮化硅时 SiNX)层,在公共电极的表面上不产生在IZO,ITO或ITO中还原金属成分的不透明金属Sn或Zn。