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1. 发明申请

US20100207916A1 PLASMA DISPLAY PANEL 审中-公开
标题翻译：等离子显示面板
公开(公告)号：US20100207916A1
公开(公告)日：2010-08-19
申请号：US12704790
申请日：2010-02-12
申请人： Won-Hee Jeong , Jun-Yong Park , Joo-Sik Jung , Su-Bin Song , Eui-Jeong Hwang , Seung-Hyun Son
发明人： Won-Hee Jeong , Jun-Yong Park , Joo-Sik Jung , Su-Bin Song , Eui-Jeong Hwang , Seung-Hyun Son
IPC分类号： G09G3/28 , G06F3/038
CPC分类号： H01J11/38 , H01J11/12 , H01J11/36 , H01J2211/361
摘要： A plasma display panel (PDP) having high efficiency includes a front substrate and a rear substrate facing each other; element portions interposed between the front and rear substrates, and including a first element and a second element disposed in both sides of a main discharge space and a third and a fourth element respectively having a narrow width and protruding on the first element and the second element, wherein the first and second elements, and the third and fourth elements partition stepped spaces along a stepped surface in the main discharge space; sustain electrode pairs alternately disposed on the front substrate, extending along a first direction and causing mutual discharge; dielectric layers which are formed on the front substrate to cover the sustain electrode pairs and in which grooves are formed along a direction that is substantially perpendicular to the first direction; and address electrodes formed on the rear substrate and extending in a second direction that crosses the first direction.
摘要翻译：具有高效率的等离子体显示面板（PDP）包括彼此面对的前基板和后基板; 插入在前基板和后基板之间的元件部分，并且包括设置在主放电空间两侧的第一元件和第二元件以及分别具有窄宽度并在第一元件和第二元件上突出的第三元件和第四元件其中所述第一和第二元件以及所述第三和第四元件沿着所述主放电空间中的台阶表面分隔阶梯状空间; 维持电极对交替地设置在前基板上，沿着第一方向延伸并引起相互放电; 电介质层，其形成在前基板上以覆盖维持电极对，并且沿着基本上垂直于第一方向的方向形成有沟槽; 以及形成在后基板上并沿与第一方向交叉的第二方向延伸的寻址电极。

2. 发明申请

US20110050083A1 PLASMA DISPLAY PANEL 审中-公开
标题翻译：等离子显示面板
公开(公告)号：US20110050083A1
公开(公告)日：2011-03-03
申请号：US12846715
申请日：2010-07-29
申请人： Jun-Yong Park , Won-Hee Jeong , Su-Bin Song , Seung-Hyun Son , Joo-Sik Jung
发明人： Jun-Yong Park , Won-Hee Jeong , Su-Bin Song , Seung-Hyun Son , Joo-Sik Jung
IPC分类号： H01J63/04 , H01J17/49
CPC分类号： H01J11/12 , H01J11/36 , H01J2211/363
摘要： A plasma display panel (PDP) includes a front substrate and a rear substrate that face each other; a pair of base portions disposed between the front substrate and the rear substrate and are concavely indented in directions away from each other; a pair of barrier walls disposed on the pair of base portions to define a discharge cell; a scan electrode and a sustain electrode that generate a mutual discharge in the discharge cell; an address electrode to cross the scan electrode and that generates an address discharge together with the scan electrode; a phosphor layer disposed in the discharge cell; and a discharge gas injected into the discharge cell.
摘要翻译：等离子体显示面板（PDP）包括彼此面对的前基板和后基板; 一对基部，设置在前基板和后基板之间，并且在彼此远离的方向上凹入地缩进; 一对阻挡壁，其设置在所述一对基部上以限定放电单元; 在放电单元中产生相互放电的扫描电极和维持电极; 与扫描电极交叉并与扫描电极一起产生寻址放电的寻址电极; 设置在放电单元中的荧光体层; 以及注入到放电单元中的放电气体。

3. 发明申请

US20100007586A1 PLASMA DISPLAY PANEL 审中-公开
标题翻译：等离子显示面板
公开(公告)号：US20100007586A1
公开(公告)日：2010-01-14
申请号：US12412250
申请日：2009-03-26
申请人： Jun-Yong Park , Won-Hee Jeong , Joo-Sick Jung , Su-Bin Song
发明人： Jun-Yong Park , Won-Hee Jeong , Joo-Sick Jung , Su-Bin Song
IPC分类号： G09G3/28
CPC分类号： H01J11/30 , H01J11/12 , H01J11/28 , H01J2211/361 , H01J2211/38
摘要： A plasma display panel (PDP) is disclosed. In one embodiment, the PDP includes: i) first and second substrates facing each other, ii) a plurality of first barrier ribs formed between the first and second substrates and configured to define a plurality of discharge cells and iii) a plurality of second barrier ribs dividing each of the discharge cells into a first sub-discharge cell and a second sub-discharge cell, wherein a phosphor layer is formed in the first sub-discharge cells and is not formed in the second sub-discharge cells. According to one embodiment, the PDP has high driving efficiency obtained by improving an address voltage margin, and high image quality obtained by removing noise brightness caused by discharge light resulting from an address discharge, and is suitable for an image display with high efficiency and high resolution.
摘要翻译：公开了一种等离子体显示面板（PDP）。在一个实施例中，PDP包括：i）彼此面对的第一和第二基板，ii）形成在第一和第二基板之间并被配置为限定多个放电单元的多个第一阻挡肋，以及iii）多个第二屏障将每个放电单元分成第一副放电单元和第二副放电单元的肋，其中在第一子放电单元中形成荧光体层，并且不形成在第二子放电单元中。根据一个实施例，PDP具有通过提高寻址电压余量而获得的高驱动效率，以及通过消除由寻址放电引起的放电光引起的噪声亮度而获得的高图像质量，并且适合于高效率和高的图像显示解析度。

4. 发明申请

US20050258747A1 Plasma display panel (PDP) 失效
标题翻译：等离子显示面板（PDP）
公开(公告)号：US20050258747A1
公开(公告)日：2005-11-24
申请号：US11117554
申请日：2005-04-29
申请人： Su-Bin Song , Kyoung-Doo Kang , Jun-Yong Park , Won-Ju Yi
发明人： Su-Bin Song , Kyoung-Doo Kang , Jun-Yong Park , Won-Ju Yi
IPC分类号： H01J17/49 , H01J17/04 , H01J17/16
CPC分类号： H01J11/16 , H01J11/24 , H01J11/32 , H01J2211/245 , H01J2211/323
摘要： A Plasma Display Panel (PDP) has a high aperture ratio of a discharge cell, a high light transmittance, and a high luminous efficiency and a stable and efficient discharge occurs uniformly at a low driving voltage on inner sidewalls of the discharge cell and concentrates in the center of the discharge cell. The PDP includes: a front substrate and a rear substrate facing each other and separated from each other; barrier ribs of a dielectric material arranged between the front substrate and the rear substrate to define discharge cells together with the front substrate and the rear substrate; discharge electrodes arranged within the barrier ribs, the discharge electrodes being separated from each other and surrounding the discharge cells and having at least one corner portion for surrounding the discharge cells; fluorescent layers arranged in the discharge cells; a discharge gas contained within the discharge cells; and an attenuator adapted to reduce a strength of an electric field generated between at least one pair of corner portions of the discharge electrodes, the corner portions facing each other, to be less than a strength of an electric field generated between portions of the discharge electrodes facing each other, other than the corner portions, in the discharge cells.
摘要翻译：等离子体显示面板（PDP）具有放电单元的高开口率，高透光率和高发光效率，并且在放电单元的内侧壁上的低驱动电压下均匀地发生稳定且高效的放电，并且集中在放电单元的中心。 PDP包括：彼此面对并分离的前基板和后基板; 布置在前基板和后基板之间的介电材料的阻挡肋以与前基板和后基板一起限定放电单元; 布置在阻挡肋内的放电电极，放电电极彼此分离并且围绕放电单元并且具有用于包围放电单元的至少一个角部; 布置在放电单元中的荧光层; 包含在放电单元内的放电气体; 以及衰减器，其适于减小在所述放电电极的至少一对角部之间产生的电场的强度，所述角部彼此面对，以小于所述放电电极的部分之间产生的电场的强度在放电单元中彼此面对，而不是角部。

5. 发明授权

US07504775B2 Plasma display panel (PDP) 失效
标题翻译：等离子显示面板（PDP）
公开(公告)号：US07504775B2
公开(公告)日：2009-03-17
申请号：US11117554
申请日：2005-04-29
申请人： Su-Bin Song , Kyoung-Doo Kang , Jun-Yong Park , Won-Ju Yi
发明人： Su-Bin Song , Kyoung-Doo Kang , Jun-Yong Park , Won-Ju Yi
IPC分类号： H01J17/49
CPC分类号： H01J11/16 , H01J11/24 , H01J11/32 , H01J2211/245 , H01J2211/323
摘要： A Plasma Display Panel (PDP) has a high aperture ratio of a discharge cell, a high light transmittance, and a high luminous efficiency and a stable and efficient discharge occurs uniformly at a low driving voltage on inner sidewalls of the discharge cell and concentrates in the center of the discharge cell. The PDP includes: a front substrate and a rear substrate facing each other and separated from each other; barrier ribs of a dielectric material arranged between the front substrate and the rear substrate to define discharge cells together with the front substrate and the rear substrate; discharge electrodes arranged within the barrier ribs, the discharge electrodes being separated from each other and surrounding the discharge cells and having at least one corner portion for surrounding the discharge cells; fluorescent layers arranged in the discharge cells; a discharge gas contained within the discharge cells; and an attenuator adapted to reduce a strength of an electric field generated between at least one pair of corner portions of the discharge electrodes, the corner portions facing each other, to be less than a strength of an electric field generated between portions of the discharge electrodes facing each other, other than the corner portions, in the discharge cells.
摘要翻译：等离子体显示面板（PDP）具有放电单元的高开口率，高透光率和高发光效率，并且在放电单元的内侧壁上的低驱动电压下均匀地发生稳定且高效的放电，并且集中在放电单元的中心。 PDP包括：彼此面对并分离的前基板和后基板; 布置在前基板和后基板之间的介电材料的阻挡肋以与前基板和后基板一起限定放电单元; 布置在阻挡肋内的放电电极，放电电极彼此分离并且围绕放电单元并且具有用于包围放电单元的至少一个角部; 布置在放电单元中的荧光层; 包含在放电单元内的放电气体; 以及衰减器，其适于减小在所述放电电极的至少一对角部之间产生的电场的强度，所述角部彼此面对，以小于所述放电电极的部分之间产生的电场的强度在放电单元中彼此面对，而不是角部。

6. 发明授权

US07602125B2 Plasma display panel provided with dielectric layer having a variation in thickness in relation to surfaces of a display electrode 失效
标题翻译：等离子体显示面板设置有相对于显示电极的表面具有厚度变化的电介质层
公开(公告)号：US07602125B2
公开(公告)日：2009-10-13
申请号：US11138308
申请日：2005-05-27
申请人： Min Hur , Young-Do Choi , Takahisa Mizuta , Jun-Yong Park , Su-Bin Song
发明人： Min Hur , Young-Do Choi , Takahisa Mizuta , Jun-Yong Park , Su-Bin Song
IPC分类号： H01J17/49
CPC分类号： H01J11/14 , H01J11/16 , H01J11/26 , H01J2211/265 , H01J2211/323
摘要： A plasma display panel comprises: first and second substrates facing each other; a plurality of barrier ribs partitioning a discharge space between the first and second substrates so as to define a plurality of discharge cells; address electrodes extending in parallel with each other and in a predetermined direction; first and second electrodes disposed on the second substrate in a direction intersecting the direction of the address electrodes, the first and second electrodes being separated from the address electrodes, the first and second electrodes being provided in correspondence with each of the discharge cells; and phosphor layers coated on the discharge cells. The first and second electrodes protrude in a direction from the second substrate to the first substrate, and face each other so as to provide a space therebetween.
摘要翻译：等离子体显示面板包括：彼此面对的第一和第二基板; 多个隔壁，分隔第一和第二基板之间的放电空间，以限定多个放电单元; 寻址电极，其彼此平行且沿预定方向延伸; 第一和第二电极，设置在与第二寻址电极的方向相交的方向上的第二基板上，第一和第二电极与地址电极分离，第一和第二电极与每个放电单元相对应地设置; 以及涂覆在放电单元上的荧光体层。第一和第二电极在从第二基板到第一基板的方向上突出，并且彼此面对以在它们之间提供空间。

7. 发明授权

US07256545B2 Plasma display panel (PDP) 失效
标题翻译：等离子显示面板（PDP）
公开(公告)号：US07256545B2
公开(公告)日：2007-08-14
申请号：US11089153
申请日：2005-03-25
申请人： Seok-Gyun Woo , Chong-Gi Hong , Su-Bin Song , Kyoung-Doo Kang , Jun-Yong Park , Won-Ju Yi
发明人： Seok-Gyun Woo , Chong-Gi Hong , Su-Bin Song , Kyoung-Doo Kang , Jun-Yong Park , Won-Ju Yi
IPC分类号： H01J17/49
CPC分类号： H01J11/36 , H01J11/16 , H01J11/24 , H01J2211/245 , H01J2211/365
摘要： A Plasma Display Panel (PDP) includes: a front panel; a rear panel parallel to and separated from a front panel; a plurality of first barrier ribs of a dielectric, arranged between the front panel and the rear panel, and adapted to define discharge cells together with the front panel and the rear panel; front discharge electrodes and rear discharge electrodes disposed apart to surround each discharge cell within the first barrier ribs, each of the front discharge electrodes and rear discharge electrodes including main line parts and corner parts adapted to connect the adjacent main line parts, wherein inner surfaces of the corner parts facing each discharge cell, are rounded; a phosphor layer arranged in each discharge cell defined by the first barrier ribs; and a discharge gas filling each discharge cell.
摘要翻译：等离子体显示面板（PDP）包括：前面板; 与前面板平行且与之分离的后面板; 布置在前面板和后面板之间的电介质的多个第一阻挡肋，并且适于与前面板和后面板一起限定放电单元; 前放电电极和后放电电极分开设置，以围绕第一阻挡肋内的每个放电单元，每个前放电电极和后放电电极包括适于连接相邻主线部分的主线部分和拐角部分，其中内表面朝向每个放电单元的角部分是圆形的; 布置在由所述第一阻挡肋限定的每个放电单元中的荧光体层; 以及填充每个放电单元的放电气体。

8. 发明申请

US20050264203A1 Plasma display panel 失效
标题翻译：等离子显示面板
公开(公告)号：US20050264203A1
公开(公告)日：2005-12-01
申请号：US11138308
申请日：2005-05-27
申请人： Min Hur , Young-Do Choi , Takahisa Mizuta , Jun-Yong Park , Su-Bin Song
发明人： Min Hur , Young-Do Choi , Takahisa Mizuta , Jun-Yong Park , Su-Bin Song
IPC分类号： H01J11/14 , H01J11/16 , H01J11/22 , H01J11/24 , H01J11/26 , H01J11/32 , H01J11/34 , H01J11/36 , H01J11/38 , H01J17/49
CPC分类号： H01J11/14 , H01J11/16 , H01J11/26 , H01J2211/265 , H01J2211/323
摘要： A plasma display panel comprises: first and second substrates facing each other; a plurality of barrier ribs partitioning a discharge space between the first and second substrates so as to define a plurality of discharge cells; address electrodes extending in parallel with each other and in a predetermined direction; first and second electrodes disposed on the second substrate in a direction intersecting the direction of the address electrodes, the first and second electrodes being separated from the address electrodes, the first and second electrodes being provided in correspondence with each of the discharge cells; and phosphor layers coated on the discharge cells. The first and second electrodes protrude in a direction from the second substrate to the first substrate, and face each other so as to provide a space therebetween.
摘要翻译：等离子体显示面板包括：彼此面对的第一和第二基板; 多个隔壁，分隔第一和第二基板之间的放电空间，以限定多个放电单元; 寻址电极，其彼此平行且沿预定方向延伸; 第一和第二电极，设置在与第二寻址电极的方向相交的方向上的第二基板上，第一和第二电极与地址电极分离，第一和第二电极与每个放电单元相对应地设置; 以及涂覆在放电单元上的荧光体层。第一和第二电极在从第二基板到第一基板的方向上突出，并且彼此面对以在它们之间提供空间。

9. 发明申请

US20120014187A1 Non-volatile memory device and method of operation therefor 失效
标题翻译：非易失性存储器件及其操作方法
公开(公告)号：US20120014187A1
公开(公告)日：2012-01-19
申请号：US13200361
申请日：2011-09-23
申请人： Dae-Yong Kim , Sang-Won Hwang , Jun-Yong Park
发明人： Dae-Yong Kim , Sang-Won Hwang , Jun-Yong Park
IPC分类号： G11C16/06
CPC分类号： G11C16/16 , G11C16/0483 , H01L27/105 , H01L27/11526 , H01L27/11546
摘要： In one embodiment, the non-volatile memory device includes a well of a first conductivity type formed in a substrate, and a first plurality of memory cell transistors connected in series to a bit line formed in the well. A buffer is formed in the substrate outside the well and is connected to the bit line. At least one de-coupling transistor is configured to de-couple the buffer from the bit line, and the de-coupling transistor is formed in the well.
摘要翻译：在一个实施例中，非易失性存储器件包括形成在衬底中的第一导电类型的阱以及与阱中形成的位线串联连接的第一多个存储单元晶体管。在阱外部的衬底中形成缓冲器，并连接到位线。至少一个去耦合晶体管被配置为从位线去耦合缓冲器，并且在阱中形成去耦合晶体管。

10. 发明授权

US07733695B2 Non-volatile memory device and method of operation therefor 失效
标题翻译：非易失性存储器件及其操作方法
公开(公告)号：US07733695B2
公开(公告)日：2010-06-08
申请号：US11653866
申请日：2007-01-17
申请人： Dae-Yong Kim , Sang-Won Hwang , Jun-Yong Park
发明人： Dae-Yong Kim , Sang-Won Hwang , Jun-Yong Park
IPC分类号： G11C16/04
CPC分类号： G11C16/16 , G11C16/0483 , H01L27/105 , H01L27/11526 , H01L27/11546
摘要： In one embodiment, the non-volatile memory device includes a well of a first conductivity type formed in a substrate, and a first plurality of memory cell transistors connected in series to a bit line formed in the well. A buffer is formed in the substrate outside the well and is connected to the bit line. At least one de-coupling transistor is configured to de-couple the buffer from the bit line, and the de-coupling transistor is formed in the well.
摘要翻译：在一个实施例中，非易失性存储器件包括形成在衬底中的第一导电类型的阱以及与阱中形成的位线串联连接的第一多个存储单元晶体管。在阱外部的衬底中形成缓冲器，并连接到位线。至少一个去耦合晶体管被配置为从位线去耦合缓冲器，并且在阱中形成去耦合晶体管。

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