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1. 发明申请

US20030047766A1 Split gate flash memory cell structure and method of manufacturing the same 审中-公开
标题翻译：分流闸闪存单元结构及其制造方法
公开(公告)号：US20030047766A1
公开(公告)日：2003-03-13
申请号：US09941657
申请日：2001-08-30
申请人： Winbond Electronics Corporation
发明人： Ching-Hsiang Hsu , Evans Ching-Song Yang , Len-Yi Leu , Bin-Shing Chen
IPC分类号： H01L027/108 , H01L029/76
CPC分类号： H01L29/66825 , H01L29/40114 , H01L29/42324 , H01L29/7885
摘要： A non-volatile memory cell that includes a semiconductor substrate, a well region implanted with a first-type dopant formed in the semiconductor substrate, a first doped region implanted with a second-type dopant formed in the semiconductor substrate, a second doped region, formed spaced-apart from the first doped region, implanted with a second-type dopant formed in the semiconductor substrate, the second doped region further including a third region implanted with the first-type dopant, a first dielectric layer disposed over the semiconductor substrate, a floating gate disposed over the first dielectric layer and extending over the well region and a portion of the second doped region, a second dielectric layer disposed over the floating gate, and a control gate disposed over the first dielectric layer and the second dielectric layer.
摘要翻译：一种非易失性存储单元，包括半导体衬底，注入形成在半导体衬底中的第一型掺杂物的阱区，注入形成在半导体衬底中的第二类掺杂的第一掺杂区，第二掺杂区，与所述第一掺杂区域间隔开地注入形成在所述半导体衬底中的第二类型掺杂物，所述第二掺杂区域还包括注入所述第一掺杂剂的第三区域，设置在所述半导体衬底上的第一介电层，布置在所述第一介电层上并且在所述阱区域上延伸的浮置栅极和所述第二掺杂区域的一部分，设置在所述浮置栅极上的第二介电层以及设置在所述第一介电层和所述第二介电层上的控制栅极。

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