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1. 发明申请

US20210286562A1 WRITE METHOD FOR RESISTIVE MEMORY 有权
公开(公告)号：US20210286562A1
公开(公告)日：2021-09-16
申请号：US17337003
申请日：2021-06-02
申请人： Winbond Electronics Corp.
发明人： Ping-Kun WANG , Shao-Ching LIAO , Chien-Min WU , Chia Hua HO , Frederick CHEN , He-Hsuan CHAO , Seow-Fong LIM
IPC分类号： G06F3/06 , G11C13/00
摘要： A write method for a resistive memory including a storage array, a control circuit and an access circuit is provided. The control circuit receives an external command to activate the access circuit to access the storage array. The write method includes determining whether the external command is ready to perform a write operation for the storage array; generating a first operation voltage group to the access circuit when the external command does not perform the write operation for the storage array; reading a count value of a block that corresponds to a write address when the external command performs the write operation for the storage array, wherein the count value indicates the number of times that the block corresponding to the write address performs the write operation; and generating a second operation voltage group to the access circuit according to the count value of the block.

2. 发明申请

US20190214556A1 ONE-TIME-PROGRAMMABLE RESISTIVE RANDOM ACCESS MEMORY AND METHOD FOR FORMING THE SAME 审中-公开
公开(公告)号：US20190214556A1
公开(公告)日：2019-07-11
申请号：US15867159
申请日：2018-01-10
申请人： Winbond Electronics Corp.
发明人： Frederick CHEN , Ping-Kun WANG , Chih-Cheng FU , Chien-Min WU , Shao-Ching LIAO
IPC分类号： H01L45/00 , H01L27/24 , G11C13/00
CPC分类号： H01L45/08 , G11C13/0007 , G11C13/004 , G11C2013/0045 , G11C2213/32 , G11C2213/52 , G11C2213/79 , H01L27/2436 , H01L27/2463 , H01L45/1233 , H01L45/1253 , H01L45/146 , H01L45/1608 , H01L45/1641
摘要： A method of forming a one-time-programmable resistive random access memory bit includes forming a resistive switching layer on a bottom electrode layer. The method also includes forming a top electrode layer on the resistive switching layer. The method also includes applying a forming voltage to the resistive switching layer, such that the electric potential of the top electrode layer is lower than that of the bottom electrode layer. The method also includes performing a bake process on the resistive switching layer. The vacancies in the resistive switching layer are randomly distributed.

3. 发明申请

US20170092356A1 DEVICES AND METHODS FOR SELECTING A FORMING VOLTAGE FOR A RESISTIVE RANDOM-ACCESS MEMORY 有权
公开(公告)号：US20170092356A1
公开(公告)日：2017-03-30
申请号：US15244308
申请日：2016-08-23
申请人： Winbond Electronics Corp.
发明人： Chien-Min WU
IPC分类号： G11C13/00 , G11C29/44 , G11C29/00
CPC分类号： G11C13/0069 , G11C29/4401 , G11C29/70 , G11C2013/0083
摘要： A memory driving device and a method thereof applied for a RRAM array are provided. The memory driving device includes a voltage generator, a current detector, and a controller. The voltage generator generates a write voltage. An RRAM cell of the RRAM array is selected according to a selection signal for receiving the program voltage to generate a program current. The current detector detects the program current. The controller executes a driving procedure which includes: obtaining a voltage distribution for the program voltage; determining the initial voltage and the maximum voltage of the program voltage according to the voltage distribution; gradually increasing the program voltage from the initial voltage to the maximum voltage; determining whether the program current exceeds the reference current; and selecting another RRAM cell when the write current exceeds the reference current.

4. 发明申请

US20160148684A1 RESISTIVE RANDOM ACCESS MEMORY AND MANUFACTURING AND CONTROL METHODS THEREOF 有权
标题翻译：电阻式随机存取存储器及其制造及其控制方法
公开(公告)号：US20160148684A1
公开(公告)日：2016-05-26
申请号：US14950689
申请日：2015-11-24
申请人： Winbond Electronics Corp.
发明人： Meng-Heng LIN , Bo-Lun WU , Chien-Min WU
IPC分类号： G11C13/00
CPC分类号： G11C13/0026 , G11C13/0033 , G11C13/004 , G11C2213/79 , G11C2213/82
摘要： A high-reliability resistive random access memory (RRAM). A memory cell of a memory cell array is controlled via a word line, a bit line and a source line. The control unit of the RRAM has a word line decoder, a bit line decoder, and a source line decoder and switch circuit. The word line decoder, the bit line decoder and the source line decoder respectively control the voltage applied to the word line, the voltage applied to the bit line, and the voltage applied to the source line. The switch circuit is switched between a first state and a second state to operate the bit line decoder to apply a voltage to the bit line to read the memory cell and to operate the source line decoder to apply a voltage to the source line to read the memory cell alternately.
摘要翻译：高可靠性电阻随机存取存储器（RRAM）。通过字线，位线和源极线来控制存储单元阵列的存储单元。 RRAM的控制单元具有字线解码器，位线解码器和源极线解码器和开关电路。字线解码器，位线解码器和源极线解码器分别控制施加到字线的电压，施加到位线的电压和施加到源极线的电压。开关电路在第一状态和第二状态之间切换以操作位线解码器以向位线施加电压以读取存储器单元并操作源极线解码器以向源极线施加电压以读取记忆体交替。

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