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1. 发明申请

US20080162784A1 SYSTEMS AND METHODS FOR ACCESS VIOLATION MANAGEMENT OF SECURED MEMORY 有权
标题翻译：安全存储器访问管理的系统和方法
公开(公告)号：US20080162784A1
公开(公告)日：2008-07-03
申请号：US11618075
申请日：2006-12-29
申请人： Willy Obereiner , Venkat Natarajan , Jeremy Isaac Nathaniel Werner , Joe Yuen Tom , Hyun Soo Lee
发明人： Willy Obereiner , Venkat Natarajan , Jeremy Isaac Nathaniel Werner , Joe Yuen Tom , Hyun Soo Lee
IPC分类号： G06F12/14 , G06F12/02
CPC分类号： G06F12/1483 , G06F21/53
摘要： Systems and methods that facilitate processing data and securing data written to or read from memory. A processor can include a host memory interface that monitors all bus traffic between a host processor and memory. The host memory interface can analyze commands generated by the host processor and determine the validity of the commands. Valid commands can proceed for further analysis; invalid commands can be aborted, for example, with the host memory interface and memory each set to an idle state. The host memory interface can analyze authentication information obtained via an authentication component, and information regarding memory partition rights, to determine whether a command partition violation exists as to the command. If a violation exists, the host memory interface can prevent the improper command from executing in the memory, and can cause a different operation to occur thereby allowing the memory to be placed in a known state.
摘要翻译：便于处理数据并保护写入或读取内存的数据的系统和方法。处理器可以包括主机存储器接口，其监视主处理器和存储器之间的所有总线流量。主机存储器接口可以分析主机处理器产生的命令，并确定命令的有效性。有效的命令可以进行进一步分析; 无效命令可以被中止，例如，主机存储器接口和存储器都设置为空闲状态。主机存储器接口可以分析通过认证组件获得的认证信息和关于存储器分区权限的信息，以确定是否存在关于该命令的命令分区违例。如果存在违规，则主机存储器接口可以防止不正确的命令在存储器中执行，并且可能导致不同的操作发生，从而允许将存储器置于已知状态。

2. 发明授权

US07836269B2 Systems and methods for access violation management of secured memory 有权
标题翻译：安全内存访问违规管理的系统和方法
公开(公告)号：US07836269B2
公开(公告)日：2010-11-16
申请号：US11618075
申请日：2006-12-29
申请人： Willy Obereiner , Venkat Natarajan , Jeremy Isaac Nathaniel Werner , Joe Yuen Tom , Hyun Soo Lee
发明人： Willy Obereiner , Venkat Natarajan , Jeremy Isaac Nathaniel Werner , Joe Yuen Tom , Hyun Soo Lee
IPC分类号： G06F13/16
CPC分类号： G06F12/1483 , G06F21/53
摘要： Systems and methods that facilitate processing data and securing data written to or read from memory. A processor can include a host memory interface that monitors all bus traffic between a host processor and memory. The host memory interface can analyze commands generated by the host processor and determine the validity of the commands. Valid commands can proceed for further analysis; invalid commands can be aborted, for example, with the host memory interface and memory each set to an idle state. The host memory interface can analyze authentication information obtained via an authentication component, and information regarding memory partition rights, to determine whether a command partition violation exists as to the command. If a violation exists, the host memory interface can prevent the improper command from executing in the memory, and can cause a different operation to occur thereby allowing the memory to be placed in a known state.
摘要翻译：便于处理数据并保护写入或读取内存的数据的系统和方法。处理器可以包括主机存储器接口，其监视主处理器和存储器之间的所有总线流量。主机存储器接口可以分析主机处理器产生的命令，并确定命令的有效性。有效的命令可以进行进一步分析; 无效命令可以被中止，例如，主机存储器接口和存储器都设置为空闲状态。主机存储器接口可以分析通过认证组件获得的认证信息和关于存储器分区权限的信息，以确定是否存在关于该命令的命令分区违例。如果存在违规，则主机存储器接口可以防止不正确的命令在存储器中执行，并且可能导致不同的操作发生，从而允许将存储器置于已知状态。

3. 发明授权

US08190919B2 Multiple stakeholder secure memory partitioning and access control 有权
标题翻译：多个利益相关者安全的内存分区和访问控制
公开(公告)号：US08190919B2
公开(公告)日：2012-05-29
申请号：US11613691
申请日：2006-12-20
申请人： Venkat Natarajan , Jeremy Isaac Nathaniel Werner , Willy Obereiner , Joe Yuen Tom , Russell Barck
发明人： Venkat Natarajan , Jeremy Isaac Nathaniel Werner , Willy Obereiner , Joe Yuen Tom , Russell Barck
IPC分类号： G06F21/00
CPC分类号： G06F12/1441 , G06F12/1408 , G06F2212/2022
摘要： A machine implemented system and method that effectuates secure access to a flash memory associated with a mobile device. The system includes a security component that intercepts transactions between an external processor and the flash memory and implements authentication and access control to the flash memory. The system further includes components that can partition the flash memory and can associate authentication and access control information with the partitioned flash memory.
摘要翻译：一种机器实现的系统和方法，其实现对与移动设备相关联的闪存的安全访问。该系统包括一个安全组件，其拦截外部处理器和闪存之间的事务，并实现对闪存的认证和访问控制。该系统还包括可以分区闪存并且可以将认证和访问控制信息与分区闪存相关联的组件。

4. 发明申请

US20080109903A1 SECURE CO-PROCESSING MEMORY CONTROLLER INTEGRATED INTO AN EMBEDDED MEMORY SUBSYSTEM 有权
标题翻译：安全处理存储器控制器集成到嵌入式存储器子系统中
公开(公告)号：US20080109903A1
公开(公告)日：2008-05-08
申请号：US11614309
申请日：2006-12-21
申请人： Jeremy Isaac Nathaniel Werner , Venkat Natarajan , Willy Obereiner , Joe Yuen Tom , George Minassian , Russell Barck
发明人： Jeremy Isaac Nathaniel Werner , Venkat Natarajan , Willy Obereiner , Joe Yuen Tom , George Minassian , Russell Barck
IPC分类号： G06F12/14
CPC分类号： G06F12/1433 , G06F12/1458 , G06F21/72 , G06F2212/2022
摘要： An architecture is presented that facilitates integrated security capabilities. A memory module is provided that comprises non-volatile memory that stores security software and a security processor that accesses the security software from the nonvolatile memory and performs security functions based on the security software stored. Further, a host processor located outside of the memory module arbitrates with the security processor for access to the non-volatile memory. The memory module in communication with the host processor establishes a heightened level of security that can be utilized in authentication services and secure channel communications.
摘要翻译：提出了一种有助于集成安全功能的体系结构。提供一种存储器模块，其包括存储安全软件的非易失性存储器和从非易失性存储器访问安全软件的安全处理器，并且基于存储的安全软件执行安全功能。此外，位于存储器模块外部的主处理器与安全处理器仲裁以访问非易失性存储器。与主处理器通信的存储器模块建立了可以在认证服务和安全通道通信中使用的更高级别的安全性。

5. 发明申请

US20080109662A1 MULTIPLE STAKEHOLDER SECURE MEMORY PARTITIONING AND ACCESS CONTROL 有权
标题翻译：多个利益相关者安全存储器分区和访问控制
公开(公告)号：US20080109662A1
公开(公告)日：2008-05-08
申请号：US11613691
申请日：2006-12-20
申请人： Venkat Natarajan , Jeremy Isaac Nathaniel Werner , Willy Obereiner , Joe Yuen Tom , Russell Barck
发明人： Venkat Natarajan , Jeremy Isaac Nathaniel Werner , Willy Obereiner , Joe Yuen Tom , Russell Barck
IPC分类号： G06F12/14
CPC分类号： G06F12/1441 , G06F12/1408 , G06F2212/2022
摘要： A machine implemented system and method that effectuates secure access to a flash memory associated with a mobile device. The system includes a security component that intercepts transactions between an external processor and the flash memory and implements authentication and access control to the flash memory. The system further includes components that can partition the flash memory and can associate authentication and access control information with the partitioned flash memory.
摘要翻译：一种机器实现的系统和方法，其实现对与移动设备相关联的闪存的安全访问。该系统包括一个安全组件，其拦截外部处理器和闪存之间的事务，并实现对闪存的认证和访问控制。该系统还包括可以分区闪存并且可以将认证和访问控制信息与分区闪存相关联的组件。

6. 发明授权

US08356361B2 Secure co-processing memory controller integrated into an embedded memory subsystem 有权
标题翻译：集成到嵌入式存储器子系统中的安全协处理存储器控制器
公开(公告)号：US08356361B2
公开(公告)日：2013-01-15
申请号：US11614309
申请日：2006-12-21
申请人： Jeremy Isaac Nathaniel Werner , Venkat Natarajan , Willy Obereiner , Joe Yuen Tom , George Minassian , Russell Barck
发明人： Jeremy Isaac Nathaniel Werner , Venkat Natarajan , Willy Obereiner , Joe Yuen Tom , George Minassian , Russell Barck
IPC分类号： G06F9/00
CPC分类号： G06F12/1433 , G06F12/1458 , G06F21/72 , G06F2212/2022
摘要： An architecture is presented that facilitates integrated security capabilities. A memory module is provided that comprises non-volatile memory that stores security software and a security processor that accesses the security software from the nonvolatile memory and performs security functions based on the security software stored. Further, a host processor located outside of the memory module arbitrates with the security processor for access to the non-volatile memory. The memory module in communication with the host processor establishes a heightened level of security that can be utilized in authentication services and secure channel communications.
摘要翻译：提出了一种有助于集成安全功能的体系结构。提供一种存储器模块，其包括存储安全软件的非易失性存储器和从非易失性存储器访问安全软件的安全处理器，并且基于存储的安全软件执行安全功能。此外，位于存储器模块外部的主处理器与安全处理器仲裁以访问非易失性存储器。与主处理器通信的存储器模块建立了可以在认证服务和安全通道通信中使用的更高级别的安全性。

7. 发明授权

US07882365B2 Systems and methods for distinguishing between actual data and erased/blank memory with regard to encrypted data 有权
标题翻译：关于加密数据区分实际数据和擦除/空白存储器的系统和方法
公开(公告)号：US07882365B2
公开(公告)日：2011-02-01
申请号：US11615492
申请日：2006-12-22
申请人： Venkat Natarajan , Willy Obereiner
发明人： Venkat Natarajan , Willy Obereiner
IPC分类号： G06F12/14 , H04L29/06 , H04L9/00 , G06F7/04 , G06F13/00
CPC分类号： G06F12/1408
摘要： Systems and methods that facilitate processing data, such as by encryption/decryption, and storing and retrieving data to/from memory such that actual data can be distinguished from information associated with, or representative of, erased/blank memory locations. A processor can include a comparing component that compares information input to the processor to determine whether such information is associated with actual data, or associated with, or representative of, erased/blank memory locations. Information associated with, or representative of, an erased/blank memory location can be processed so that it can be interpreted as such by other components. If actual data is processed such that the comparing component interprets the processed data to be equivalent to an erased/blank memory location, then the data can be re-processed, so it is not interpreted as such, before being forwarded to its next destination.
摘要翻译：促进处理数据的系统和方法，例如通过加密/解密，以及从/从存储器存储和检索数据，使得实际数据可以与与擦除/空白存储器位置相关联或代表擦除/空白存储器位置的信息区分开。处理器可以包括比较组件，其比较输入到处理器的信息，以确定这样的信息是否与实际数据相关联，或与擦除/空白存储器位置相关联或代表擦除/空白存储器位置。可以处理与擦除/空白存储器位置相关联或代表擦除/空白存储器位置的信息，使得其可以被其它部件解释。如果处理实际数据使得比较组件将处理的数据解释为等同于擦除/空白存储器位置，则可以重新处理数据，因此在转发到其下一个目的地之前不会将其解释。

8. 发明申请

US20080155275A1 SYSTEMS AND METHODS FOR DISTINGUISHING BETWEEN ACTUAL DATA AND ERASED/BLANK MEMORY WITH REGARD TO ENCRYPTED DATA 有权
标题翻译：用于在实际数据和擦除/空白存储器之间分辨加密数据的系统和方法
公开(公告)号：US20080155275A1
公开(公告)日：2008-06-26
申请号：US11615492
申请日：2006-12-22
申请人： Venkat Natarajan , Willy Obereiner
发明人： Venkat Natarajan , Willy Obereiner
IPC分类号： G06F12/14 , G06F12/02
CPC分类号： G06F12/1408
摘要： Systems and methods that facilitate processing data, such as by encryption/decryption, and storing and retrieving data to/from memory such that actual data can be distinguished from information associated with, or representative of, erased/blank memory locations. A processor can include a comparing component that compares information input to the processor to determine whether such information is associated with actual data, or associated with, or representative of, erased/blank memory locations. Information associated with, or representative of, an erased/blank memory location can be processed so that it can be interpreted as such by other components. If actual data is processed such that the comparing component interprets the processed data to be equivalent to an erased/blank memory location, then the data can be re-processed, so it is not interpreted as such, before being forwarded to its next destination.
摘要翻译：促进处理数据的系统和方法，例如通过加密/解密，以及从/从存储器存储和检索数据，使得实际数据可以与与擦除/空白存储器位置相关联或代表擦除/空白存储器位置的信息区分开。处理器可以包括比较组件，其比较输入到处理器的信息，以确定这样的信息是否与实际数据相关联，或与擦除/空白存储器位置相关联或代表擦除/空白存储器位置。可以处理与擦除/空白存储器位置相关联或代表擦除/空白存储器位置的信息，使得其可以被其它部件解释。如果处理实际数据使得比较组件将处理的数据解释为等同于擦除/空白存储器位置，则可以重新处理数据，因此在转发到其下一个目的地之前不会将其解释。

9. 发明授权

US07788622B2 Distributed autorouting of conductive paths 有权
标题翻译：分布式自动布线导电路径
公开(公告)号：US07788622B2
公开(公告)日：2010-08-31
申请号：US11869897
申请日：2007-10-10
申请人： Vladimir V. Petunin , Charles L. Pfeil , Alexander N. Starkov , Venkat Natarajan , Edwin Franklin Smith
发明人： Vladimir V. Petunin , Charles L. Pfeil , Alexander N. Starkov , Venkat Natarajan , Edwin Franklin Smith
IPC分类号： G06F17/50
CPC分类号： G06F17/5077 , G06F2217/04
摘要： A server computer maintains a master database for a PCB design, and a copy of the PCB design is provided to multiple client computers. The server assigns each client a different pair of pins for which a connection must be routed. When a client completes an assigned routing task, it requests that the server update the PCB master design with the route found by the client for its assigned pin pair. After forwarding the request, the client does not update its copy of the PCB design to reflect the found route. Instead, the client returns its copy to the state occupied prior to assignment of the pin pair by the server. Upon receiving notification that the server incorporated the found route, the client updates its copy of the design to include that route.
摘要翻译：服务器计算机维护用于PCB设计的主数据库，并且将PCB设计的副本提供给多个客户端计算机。服务器为每个客户端分配不同路由引脚的不同引脚。当客户端完成分配的路由任务时，它要求服务器使用客户端为其分配的引脚对找到的路由更新PCB主设计。转发请求后，客户端不会更新其PCB设计的副本以反映找到的路由。相反，客户端将其副本返回到由服务器分配引脚对之前占用的状态。在接收到服务器并入找到的路由的通知后，客户端更新其设计副本以包括该路由。

10. 发明申请

US20100199240A1 Parallel Electronic Design Automation: Shared Simultaneous Editing 有权
标题翻译：并行电子设计自动化：共享同时编辑
公开(公告)号：US20100199240A1
公开(公告)日：2010-08-05
申请号：US12754850
申请日：2010-04-06
申请人： Charles Pfeil , Edwin Franklin Smith , Vladimir Petunin , Henry Potts , Venkat Natarajan
发明人： Charles Pfeil , Edwin Franklin Smith , Vladimir Petunin , Henry Potts , Venkat Natarajan
IPC分类号： G06F17/50
CPC分类号： G06F17/50 , G06F17/5068 , G06F2217/74
摘要： A method to simultaneously allow multiple users to edit in shared areas of a master design includes displaying the master design, allowing a first user to edit in a shared area of the design, while simultaneously allowing a second user to edit in a shared area of the design while preserving the integrity of the design.
摘要翻译：同时允许多个用户在主设计的共享区域中编辑的方法包括显示主设计，允许第一用户在设计的共享区域中编辑，同时允许第二用户在共享区域中编辑设计，同时保持设计的完整性。

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