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1. 发明授权

US5396597A System for transferring data between processors via dual buffers within system memory with first and second processors accessing system memory directly and indirectly 失效
标题翻译：用于通过系统存储器中的双缓冲器在处理器之间传送数据的系统，其中第一和第二处理器直接和间接地访问系统
公开(公告)号：US5396597A
公开(公告)日：1995-03-07
申请号：US862914
申请日：1992-04-03
申请人： William K. Bodin , David M. Hyde , Tatchi P. Lay , James Wilkinson , Susan Yee
发明人： William K. Bodin , David M. Hyde , Tatchi P. Lay , James Wilkinson , Susan Yee
IPC分类号： G06F13/16 , G06F15/02
CPC分类号： G06F13/1673
摘要： A method and apparatus for the enhancing efficiency of a data processing system which includes a host microprocessor, a system memory, and a graphics adapter for producing an enhanced graphics display. The graphics adapter is coupled to the data processing system by a bus and includes a video memory and an adapter microprocessor, wherein the adapter microprocessor is less powerful than the host microprocessor in the data processing system. The method and apparatus of the present invention includes the establishment of a stage buffer from a portion of the system memory with the stage buffer, including at least two buffer sections. A first portion of data is transferred from the system memory into a first buffer section. Next, a second portion of data is transferred from the system memory into a second buffer section, while the adapter microprocessor is simultaneously retrieving the first portion of data from the first buffer section and transferring that first portion of data across the bus to the video memory, wherein host microprocessor is available to perform other tasks. When the adapter microprocessor has transferred the data to the video memory from the first buffer section, the host microprocessor fills the first buffer section with more data, while the adapter microprocessor retrieves data from the second buffer section. This process continues until all the data has been transferred.
摘要翻译：一种用于提高数据处理系统的效率的方法和装置，其包括主微处理器，系统存储器和用于产生增强图形显示的图形适配器。图形适配器通过总线耦合到数据处理系统，并且包括视频存储器和适配器微处理器，其中适配器微处理器的功能不如数据处理系统中的主机微处理器。本发明的方法和装置包括从具有级缓冲器的系统存储器的一部分建立级缓冲器，包括至少两个缓冲区段。数据的第一部分从系统存储器传送到第一缓冲器部分。接下来，数据的第二部分从系统存储器传送到第二缓冲器部分，而适配器微处理器同时从第一缓冲器部分检索数据的第一部分，并将数据的第一部分通过总线传送到视频存储器其中主机微处理器可用于执行其他任务。当适配器微处理器将数据从第一缓冲器部分传送到视频存储器时，主机微处理器用更多数据填充第一缓冲器部分，而适配器微处理器从第二缓冲器部分检索数据。此过程将一直持续到所有数据传输完毕。

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