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    • 3. 发明授权
    • Circuitry for converting a sampled digital signal to a naturally sampled digital signal and method therefor
    • 用于将采样的数字信号转换为自然采样的数字信号的电路及其方法
    • US06665338B1
    • 2003-12-16
    • US09478024
    • 2000-01-05
    • Pallab MidyaPatrick L. RakersWilliam J. Roeckner
    • Pallab MidyaPatrick L. RakersWilliam J. Roeckner
    • H03K908
    • H03F3/217H03K7/08H03M5/08
    • Embodiments of the present invention deal generally with circuitry and methods for converting a sampled digital signal (32) to a naturally sampled digital signal (34). One embodiment relating to a method includes receiving the sampled digital signal, calculating a duty ratio estimate (33) using feedback (52), and using interpolation (62) to determine the naturally sampled digital signal. Circuitry for converting a sampled digital signal (32) to a naturally sampled digital signal (34) includes a natural sampler, where the natural sampler includes an input to receive the sampled digital signal (32) and an input to receive a feedback signal (52). The natural sampler has an output to provide the naturally sampled digital signal (34). In one embodiment, the natural sampler calculates a duty ratio (33) using the feedback signal (52) and uses interpolation to determine the naturally sampled digital signal (34).
    • 本发明的实施例总体上涉及将采样数字信号(32)转换为自然采样的数字信号(34)的电路和方法。 与方法相关的一个实施例包括接收采样的数字信号,使用反馈(52)计算占空比估计(33),并使用内插(62)来确定自然采样的数字信号。 用于将采样数字信号(32)转换为自然采样数字信号(34)的电路包括自然采样器,其中自然采样器包括用于接收采样数字信号(32)的输入端和接收反馈信号(52 )。 自然采样器具有输出以提供自然采样的数字信号(34)。 在一个实施例中,自然采样器使用反馈信号(52)计算占空比(33),并使用内插来确定自然采样的数字信号(34)。
    • 4. 发明授权
    • Method and system for analog to digital conversion using digital pulse width modulation (PWM)
    • 使用数字脉宽调制(PWM)模数转换的方法和系统
    • US06965339B2
    • 2005-11-15
    • US10819644
    • 2004-04-07
    • Pallab MidyaMatthew R. MillerPatrick L. Rakers
    • Pallab MidyaMatthew R. MillerPatrick L. Rakers
    • H03M1/12H03M1/34H03M3/02
    • H03M3/00
    • A system and method for analog-to-digital conversion using digital pulse width modulation (PWM) is disclosed. The method and system according to the disclosed invention converts an analog input signal to a digital signal in pulse code modulated (PCM) form. The disclosed invention uses a feedback circuit to perform PWM of the analog input signal. The PWM signal is then decimated to obtain the digital signal in PCM form. The system according to the disclosed invention requires lower operating frequency and dissipates lesser power than prior art systems providing the same sampling frequency and resolution. The operation at a lower frequency is achieved by obtaining two samples from every pulse of the PWM signal; the first sample being obtained from the right duty ratio, and the second sample being obtained form the left duty ratio. Further, the disclosed invention has lesser implementation complexity and higher signal-to-noise ratio than prior art.
    • 公开了一种使用数字脉宽调制(PWM)进行模数转换的系统和方法。 根据所公开的发明的方法和系统将模拟输入信号转换成脉冲编码调制(PCM)形式的数字信号。 所公开的发明使用反馈电路来执行模拟输入信号的PWM。 然后抽取PWM信号以获得PCM形式的数字信号。 根据所公开的发明的系统需要更低的工作频率并且消耗比提供相同采样频率和分辨率的现有技术系统更小的功率。 通过从PWM信号的每个脉冲获得两个采样来实现较低频率的操作; 从正确的占空比获得第一个样品,并且从左占空比获得第二个样品。 此外,所公开的发明比现有技术具有较小的实现复杂度和更高的信噪比。
    • 5. 发明申请
    • LOW-NOISE AMPLIFIER
    • 低噪声放大器
    • US20090051441A1
    • 2009-02-26
    • US11895427
    • 2007-08-24
    • Jason H. BranchLawrence E. ConnellPatrick L. RakersPoojan A Wagh
    • Jason H. BranchLawrence E. ConnellPatrick L. RakersPoojan A Wagh
    • H03F3/191
    • H03F3/191H03F1/56H03F3/45192H03F2200/213H03F2200/294H03F2203/45386H03F2203/45544
    • Methods and corresponding systems in a low noise amplifier include selecting a selected sub-band for amplifying, wherein the selected sub-band is one of a plurality of sub-bands, wherein each sub-band is a portion of a frequency band, and wherein each sub-band has a corresponding sub-band center frequency. Next, a gate-source capacitor is adjusted so that a real part of an LNA input impedance corresponds to a real part of a source impedance at the selected sub-band center frequency. A match capacitor is also adjusted so that the LNA input impedance corresponds to the complex conjugate of the source impedance at the selected sub-band center frequency. The gate-source capacitor and the match capacitor can each be adjusted by recalling capacitor values from memory that correspond to the selected sub-band, and connecting selected capacitor components in response to the recalled capacitor values.
    • 低噪声放大器中的方法和对应系统包括选择用于放大的所选择的子带,其中所选择的子带是多个子带中的一个,其中每个子带是频带的一部分,并且其中 每个子带具有相应的子带中心频率。 接下来,调整栅极 - 源极电容器,使得LNA输入阻抗的实部对应于所选择的子带中心频率处的源极阻抗的实部。 还调整匹配电容器,使得LNA输入阻抗对应于所选子带中心频率处的源阻抗的复共轭。 可以通过从对应于所选择的子带的存储器调用电容器值来调整栅极 - 源极电容器和匹配电容器,并且响应于调用的电容器值连接所选择的电容器部件。
    • 7. 发明授权
    • Low-noise amplifier
    • 低噪声放大器
    • US07495515B1
    • 2009-02-24
    • US11895427
    • 2007-08-24
    • Jason H. BranchLawrence E. ConnellPatrick L. RakersPoojan A. Wagh
    • Jason H. BranchLawrence E. ConnellPatrick L. RakersPoojan A. Wagh
    • H03F3/04
    • H03F3/191H03F1/56H03F3/45192H03F2200/213H03F2200/294H03F2203/45386H03F2203/45544
    • Methods and corresponding systems in a low noise amplifier include selecting a selected sub-band for amplifying, wherein the selected sub-band is one of a plurality of sub-bands, wherein each sub-band is a portion of a frequency band, and wherein each sub-band has a corresponding sub-band center frequency. Next, a gate-source capacitor is adjusted so that a real part of an LNA input impedance corresponds to a real part of a source impedance at the selected sub-band center frequency. A match capacitor is also adjusted so that the LNA input impedance corresponds to the complex conjugate of the source impedance at the selected sub-band center frequency. The gate-source capacitor and the match capacitor can each be adjusted by recalling capacitor values from memory that correspond to the selected sub-band, and connecting selected capacitor components in response to the recalled capacitor values.
    • 低噪声放大器中的方法和对应系统包括选择用于放大的所选择的子带,其中所选择的子带是多个子带中的一个,其中每个子带是频带的一部分,并且其中 每个子带具有相应的子带中心频率。 接下来,调整栅极 - 源极电容器,使得LNA输入阻抗的实部对应于所选择的子带中心频率处的源极阻抗的实部。 还调整匹配电容器,使得LNA输入阻抗对应于所选子带中心频率处的源阻抗的复共轭。 可以通过从对应于所选择的子带的存储器调用电容器值来调整栅极 - 源极电容器和匹配电容器,并且响应于调用的电容器值连接所选择的电容器部件。
    • 8. 发明申请
    • Linearization Technique for Mixer
    • 搅拌机线性化技术
    • US20120252396A1
    • 2012-10-04
    • US13078502
    • 2011-04-01
    • Haolu XieManish N. ShahPatrick L. Rakers
    • Haolu XieManish N. ShahPatrick L. Rakers
    • H04B1/16H03K17/16
    • H04B1/28H03D2200/0074H03D2200/0088H03K2217/0054
    • A technique for improving the linearity of a mixer is disclosed. A converter may include a mixer comprising a first metal-oxide semiconductor field-effect transistor (MOSFET) having a gate, a first conducting terminal coupled to an input of the converter, and a second conducting terminal coupled to an output of the converter, and a mixer driver having a first output coupled to the gate of the first MOSFET, the mixer driver configured to receive a local-oscillator signal having a first phase and a second phase, drive the first MOSFET off during the first phase of the local-oscillator signal, drive the first MOSFET on for a first period of time in response to a transition from the first phase of the local-oscillator signal to the second phase of the local-oscillator signal, and force the gate of the first MOSFET into a high impedance state for a second period of time during the second phase of the local-oscillator signal and after the expiration of the first period of time.
    • 公开了一种改善混频器线性度的技术。 A转换器可以包括混合器,其包括具有栅极的第一金属氧化物半导体场效应晶体管(MOSFET),耦合到转换器的输入端的第一导电端子和耦合到转换器的输出端的第二导通端子,以及 混频器驱动器,其具有耦合到第一MOSFET的栅极的第一输出,混频器驱动器被配置为接收具有第一相位和第二相位的本地振荡器信号,在本机振荡器的第一阶段期间驱动第一MOSFET关断 信号,响应于从本地振荡器信号的第一相到本地振荡器信号的第二相的转变,驱动第一MOSFET导通第一时间段,并迫使第一MOSFET的栅极变为高电平 在本地振荡器信号的第二阶段期间和在第一时间段到期之后的第二时间段的阻抗状态。
    • 10. 发明授权
    • Direct digital synthesis circuit
    • 直接数字合成电路
    • US07653678B2
    • 2010-01-26
    • US11457380
    • 2006-07-13
    • Michael L. BushmanNeal W. HollenbeckPatrick L. Rakers
    • Michael L. BushmanNeal W. HollenbeckPatrick L. Rakers
    • G06G7/16
    • G06G7/26
    • A direct digital synthesis circuit (108) includes a plurality of current sources (210, 211, 212), an output circuit (200), and a logical multiplier circuit (202). The output circuit (200) provides a synthesized waveform (164) output and includes a first (206) and second branch (208). The logical multiplier circuit (202) is operatively coupled to the plurality of current sources (210, 211, 212) and to the output circuit (200). The logical multiplier circuit (202) is operative to receive a plurality of signals. The logical multiplier circuit is also operative to selectively increase a first current flow through the first branch (206) by a determined magnitude and decrease a second current flow through the second branch (208) by the determined magnitude based on the plurality of signals. The synthesized waveform (164) is based on the first and second currents.
    • 直接数字合成电路(108)包括多个电流源(210,211,212),输出电路(200)和逻辑乘法器电路(202)。 输出电路(200)提供输出的合成波形(164),并包括第一分支(206)和第二分支(208)。 逻辑乘法器电路(202)可操作地耦合到多个电流源(210,211,212)和输出电路(200)。 逻辑乘法器电路(202)可操作以接收多个信号。 逻辑乘法器电路还可操作以选择性地将通过第一分支(206)的第一电流流过确定的幅度,并且基于多个信号减少通过第二分支(208)的确定的幅度的第二电流。 合成波形(164)基于第一和第二电流。