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1. 发明申请

US20080109640A1 Method For Changing A Thread Priority In A Simultaneous Multithread Processor 审中-公开
标题翻译：在同时多线程处理器中更改线程优先级的方法
公开(公告)号：US20080109640A1
公开(公告)日：2008-05-08
申请号：US12015088
申请日：2008-01-16
申请人： William Burky , Ronald Kalla , David Schroter , Balaram Sinharoy
发明人： William Burky , Ronald Kalla , David Schroter , Balaram Sinharoy
IPC分类号： G06F9/30
CPC分类号： G06F9/3865 , G06F9/30076 , G06F9/3009 , G06F9/3842 , G06F9/3851
摘要： An SMT system is designed to allow software alteration of thread priority. In one case, the system signals a change in a thread priority based on the state of instruction execution and in particular when the instruction has completed execution. To alter the priority of a thread, the software uses a special form of a “no operation” (NOP) instruction (hereafter termed thread priority NOP). When the thread priority NOP is dispatched, its special NOP is decoded in the decode unit of the IDU into an operation that writes a special code into the completion table for the thread priority NOP. A “trouble” bit is also set in the completion table that indicates which instruction group contains the thread priority NOP. The trouble bit indicates that special processing is required after instruction completion. The thread priority instruction is processed after completion using the special code to change a thread's priority.
摘要翻译： SMT系统旨在允许软件更改线程优先级。在一种情况下，系统基于指令执行的状态，特别是当指令完成执行时，发出线程优先级的改变。要更改线程的优先级，软件使用特殊形式的“无操作”（NOP）指令（以下称为线程优先级NOP）。当调度线程优先级NOP时，其特殊NOP在IDU的解码单元中解码为将特殊代码写入线程优先级NOP的完成表的操作。在完成表中也设置了“故障”位，指示哪个指令组包含线程优先级NOP。故障位表示指令完成后需要进行特殊处理。线程优先级指令在完成后使用特殊代码进行处理，以更改线程的优先级。

2. 发明申请

US20050091476A1 Apparatus for supporting a logically partitioned computer system 失效
标题翻译：用于支持逻辑分区计算机系统的装置
公开(公告)号：US20050091476A1
公开(公告)日：2005-04-28
申请号：US10948776
申请日：2004-09-23
申请人： Richard Doing , Ronald Kalla , Stephen Schwinn , Edward Silha , Kenichi Tsuchiya
发明人： Richard Doing , Ronald Kalla , Stephen Schwinn , Edward Silha , Kenichi Tsuchiya
IPC分类号： G06F9/38 , G06F12/02 , G06F12/10 , G06F12/14 , G06F15/00
CPC分类号： G06F9/3804 , G06F9/3842 , G06F9/3851 , G06F9/5077 , G06F12/0284 , G06F12/1036 , G06F12/109 , G06F12/1491
摘要： A processor supports logical partitioning of hardware resources including real address spaces of a computer system. An ultra-privileged supervisor process, called a hypervisor, regulates the logical partitions and can dynamically re-allocate resources. Preferably, the processor supports hardware multithreading, each thread independently capable of being in either hypervisor, supervisor, or problem state, and is capable of entering hypervisor state only upon occurrence of certain pre-defined events. A logical partition identifier is stored in a processor register, and can be altered by the processor only when in hypervisor state. Certain bus communications contain a logical partition identifier tag, and the processor ignores such communications if the tag does not match its own logical partition identifier in its register.
摘要翻译：处理器支持包括计算机系统的真实地址空间的硬件资源的逻辑分区。一个超级特权的管理程序称为虚拟机管理程序，可以调节逻辑分区，并可以动态重新分配资源。优选地，处理器支持硬件多线程，每个线程独立地能够处于管理程序，管理程序或问题状态中，并且仅在某些预定义事件发生时能够进入管理程序状态。逻辑分区标识符存储在处理器寄存器中，并且只有处于管理程序状态时才能被处理器改变。某些总线通信包含逻辑分区标识符标签，如果标记与其寄存器中的自己的逻辑分区标识符不匹配，则处理器忽略此类通信。

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