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    • 1. 发明授权
    • Apparatus for synchronizing the frame clock in units/nodes of data-transmitting systems
    • 用于在数据传输系统的单元/节点中同步帧时钟的装置
    • US06778623B1
    • 2004-08-17
    • US09677313
    • 2000-09-29
    • Werner DietrichWilhelm Hoschek
    • Werner DietrichWilhelm Hoschek
    • H03D324
    • H03L7/197H03L7/087H04J3/0685H04L7/033
    • In data transmitting systems, an apparatus for synchronizing the frame clock in units/nodes. The apparatus has a phase detector and a voltage controlled oscillator. At least one input of the phase detector is supplied with an incoming clock signal and another input is supplied with an output signal of the voltage controlled oscillator. The output signal of the voltage controlled oscillator is conducted over a divider, which is connected to a frame clock phase detector for setting its division factor. The frame clock phase detector is supplied with an input frame clock, the output of the variable divider, and at least one output of an output divider. The at least one output of the output divider divides the output signal of the controlled oscillator into the output frame clock. The frame clock phase detector is configured for the output of a pulse that temporarily raises or lowers the division factor of the divider when the phase difference between input and output clock deviates from a prescribable quantity.
    • 在数据发送系统中,用于在单元/节点中同步帧时钟的装置。 该装置具有相位检测器和压控振荡器。 相位检测器的至少一个输入端被提供有输入时钟信号,另一个输入端被提供有压控振荡器的输出信号。 压控振荡器的输出信号通过分频器传导,分频器连接到帧时钟相位检测器,用于设置其分频因子。 帧时钟相位检测器被提供有输入帧时钟,可变分频器的输出和输出分频器的至少一个输出。 输出分频器的至少一个输出将受控振荡器的输出信号分成输出帧时钟。 帧时钟相位检测器被配置为当输入和输出时钟之间的相位差偏离规定量时,暂时升高或降低分频器的分频系数的脉冲输出。