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1. 发明授权

US06271115B1 Post metal etch photoresist strip method 失效
标题翻译：后金属蚀刻光刻胶剥离法
公开(公告)号：US06271115B1
公开(公告)日：2001-08-07
申请号：US09604065
申请日：2000-06-26
申请人： Wen Jun Liu , Simon Chooi , Mei Sheng Zhou , Raymond Joy
发明人： Wen Jun Liu , Simon Chooi , Mei Sheng Zhou , Raymond Joy
IPC分类号： H01L214763
CPC分类号： H01L21/02071
摘要： An improved method for removing a photoresist mask from an etched aluminum pattern after etching the pattern in a chlorine containing plasma has been developed. The method is a five step process, in which the first step is in a microwave generated plasma containing O2 and H2O; the second step is in a microwave generated plasma containing O2 and N2; the third step is in a microwave generated plasma containing H2O; the fourth step is in a microwave generated plasma containing O2 and N2; and the fifth step is in a microwave generated plasma containing H2O. The first step which initiates removal of photoresist while simultaneously beginning the passivation process causes residue-free removal of photoresist following etching of aluminum or aluminum-copper layers in chlorine bearing etchants.
摘要翻译：已经开发了一种用于在含氯等离子体中蚀刻图案之后从蚀刻铝图案去除光致抗蚀剂掩模的改进方法。该方法是五步法，其中第一步是在微波产生的含有O 2和H 2 O的等离子体中; 第二步是在微波产生的含有O2和N2的等离子体中; 第三步是在微波产生的含有H 2 O的等离子体中; 第四步是在微波产生的含有O2和N2的等离子体中; 并且第五步是在含有H 2 O的微波产生的等离子体中。在同时开始钝化过程的同时开始除去光致抗蚀剂的第一步骤在蚀刻含氯蚀刻剂中的铝或铝 - 铜层之后会导致残留物去除光致抗蚀剂。

2. 发明授权

US5989979A Method for controlling the silicon nitride profile during patterning using a novel plasma etch process 有权
标题翻译：使用新颖的等离子体蚀刻工艺在图案化期间控制氮化硅轮廓的方法
公开(公告)号：US5989979A
公开(公告)日：1999-11-23
申请号：US208920
申请日：1998-12-10
申请人： Wen Jun Liu , Pei Ching Lee , Mei Sheng Zhou
发明人： Wen Jun Liu , Pei Ching Lee , Mei Sheng Zhou
IPC分类号： H01L21/311 , H01L21/762 , H01L21/76
CPC分类号： H01L21/31116 , H01L21/76202
摘要： A novel anisotropic plasma etching process for forming patterned silicon nitride (Si.sub.3 N.sub.4) layers with improved critical dimension (CD) control while minimizing the Si.sub.3 N.sub.4 footing at the bottom edge of the Si.sub.3 N.sub.4 pattern is achieved. A pad oxide/silicon nitride layer is deposited on a silicon substrate. A patterned photoresist layer is used as an etching mask for etching the silicon nitride layer. By this invention, a chlorine (Cl.sub.2) breakthrough plasma pre-etch forms a protective polymer layer on the sidewalls of the patterned photoresist and removes residue in the open areas prior to etching the Si.sub.3 N.sub.4. The Si.sub.3 N.sub.4 is then aniso-tropically plasma etched using an etch gas containing SF.sub.6. The polymer layer, formed during the Cl.sub.2 pre-etch, reduces the lateral recessing of the photoresist when the Si.sub.3 N.sub.4 is etched, and results in improved patterned Si.sub.3 N.sub.4 profiles with reduced CD bias, and minimizes Si.sub.3 N.sub.4 footings at the bottom edge of the Si.sub.3 N.sub.4 pattern.
摘要翻译：实现了一种新颖的各向异性等离子体蚀刻工艺，用于在Si 3 N 4图案的底部边缘处最小化Si 3 N 4基脚的同时，形成具有改进的临界尺寸（CD）控制的图案化氮化硅（Si 3 N 4）层。衬垫氧化物/氮化硅层沉积在硅衬底上。使用图案化的光致抗蚀剂层作为用于蚀刻氮化硅层的蚀刻掩模。通过本发明，氯（Cl2）穿透等离子体预蚀刻在图案化光致抗蚀剂的侧壁上形成保护性聚合物层，并且在蚀刻Si 3 N 4之前去除开放区域中的残余物。然后使用含有SF6的蚀刻气体对Si 3 N 4进行各向异性等离子体蚀刻。在Cl2预蚀刻期间形成的聚合物层在蚀刻Si 3 N 4时减少了光致抗蚀剂的侧向凹陷，并且导致改善的图案化Si3N4分布，具有降低的CD偏压，并且使Si 3 N 4图案的底部边缘处的Si 3 N 4基底最小化。

3. 发明授权

US06461969B1 Multiple-step plasma etching process for silicon nitride 有权
标题翻译：氮化硅多步等离子体蚀刻工艺
公开(公告)号：US06461969B1
公开(公告)日：2002-10-08
申请号：US09442314
申请日：1999-11-22
申请人： Pei Ching Lee , Wen Jun Liu , Mei Sheng Zhou
发明人： Pei Ching Lee , Wen Jun Liu , Mei Sheng Zhou
IPC分类号： H01L21302
CPC分类号： H01L21/31116
摘要： A method for dry plasma selective etching of a pattern in a silicon nitride dielectric layer formed over a semiconductor substrate employed within a microelectronics fabrication. There is provided a semiconductor substrate having formed thereupon a pad oxide layer over which is formed a silicon nitride dielectric layer. There is formed over the substrate a patterned photoresist etch mask layer. There is then selectively etched the pattern of the photoresist etch mask layer into the silicon nitride layer employing a four-step etching process with three plasma etching environments which include; (1) a “break-through” etching step; (2) a “bulk” etching step to remove a majority of the silicon nitride layer and a “buffer” etching step to remove the remainder of the silicon nitride layer; and (3) an “over-etch” step to complete removal of silicon nitride without excessive etching of underlying material. These steps comprise the selective etching of the patterned silicon nitride layer while maintaining control of critical dimensions, with attenuated microloading and over-etching of underlying material.
摘要翻译：一种干法等离子体选择性蚀刻形成在微电子学制造中所采用的半导体衬底上的氮化硅介电层中的图案。提供了在其上形成有氧化硅电介质层的衬垫氧化层形成的半导体衬底。在衬底上形成图案化的光致抗蚀剂蚀刻掩模层。然后使用具有三个等离子体蚀刻环境的四步蚀刻工艺将光致抗蚀剂蚀刻掩模层的图案选择性地蚀刻到氮化硅层中，其包括：（1）“突破”蚀刻步骤; （2）去除大部分氮化硅层的“本体”蚀刻步骤和“缓冲”蚀刻步骤以去除其余的氮化硅层; 和（3）“过蚀刻”步骤，以完全去除氮化硅而不过度蚀刻下面的材料。这些步骤包括对图案化的氮化硅层的选择性蚀刻，同时保持关键尺寸的控制，具有减弱的微负载和对下面的材料的过蚀刻。

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