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1. 发明授权

US09039925B2 Polishing slurry composition 有权
标题翻译：研磨浆料组成
公开(公告)号：US09039925B2
公开(公告)日：2015-05-26
申请号：US13568130
申请日：2012-08-07
申请人： Wei-Jung Chen , Wen-Tsai Tsai , Ho-Ying Wu , Song-Yuan Chang , Ming-Hui Lu
发明人： Wei-Jung Chen , Wen-Tsai Tsai , Ho-Ying Wu , Song-Yuan Chang , Ming-Hui Lu
IPC分类号： H01L21/302 , H01L21/461 , C03C15/00 , C03C25/68 , C09K13/00 , C09K13/06 , C09G1/02 , C23F3/04 , H01L21/321
CPC分类号： C09G1/02 , C23F3/04 , H01L21/3212
摘要： Provided is a polishing slurry composition, including a non-ionic surfactant represented by the following formula (1) R—(OCH2CH2)x—OH formula (1) wherein x is an integer from 1 to 50, and R is selected from a group consisting of a C3-C50 alkyl group, a C6-C55 benzylalkyl group and a C6-C55 phenylalkyl group.
摘要翻译：本发明提供一种抛光浆料组合物，其包含由下式（1）表示的非离子型表面活性剂，其中x为1〜50的整数，R为选自基团由C 3 -C 50烷基，C 6 -C 55苄基烷基和C 6 -C 55苯基烷基组成。

2. 发明申请

US20130264515A1 POLISHING SLURRY COMPOSITION 有权
标题翻译：抛光浆料组合物
公开(公告)号：US20130264515A1
公开(公告)日：2013-10-10
申请号：US13568130
申请日：2012-08-07
申请人： Wei-Jung Chen , Wen-Tsai Tsai , Ho-Ying Wu , Song-Yuan Chang , Ming-Hui Lu
发明人： Wei-Jung Chen , Wen-Tsai Tsai , Ho-Ying Wu , Song-Yuan Chang , Ming-Hui Lu
IPC分类号： C09K13/00 , C07C43/13
CPC分类号： C09G1/02 , C23F3/04 , H01L21/3212
摘要： Provided is a polishing slurry composition, including a non-ionic surfactant represented by the following formula (1) R-(OCH2CH2)x—OH formula (1) wherein x is an integer from 1 to 50.
摘要翻译：本发明提供一种抛光浆料组合物，其包含由下式（1）表示的非离子表面活性剂R-（OCH 2 CH 2）x-OH式（1），其中x为1至50的整数。

3. 发明申请

US20130293477A1 ELECTRONIC APPARATUS AND METHOD FOR OPERATING THE SAME 审中-公开
标题翻译：电子装置及其操作方法
公开(公告)号：US20130293477A1
公开(公告)日：2013-11-07
申请号：US13871004
申请日：2013-04-26
申请人： Yi-Fu Chen , Yu-Hsu Pei , Zhi-Sheng Lin , Wei-Han Hu , Wei-Jung Chen , Wen-Hung Lo , Hsin-pei Tsai , Ming-Che Weng , Li-Wei Chen , Po-Hsien Yang , Chun-Sheng Chen
发明人： Yi-Fu Chen , Yu-Hsu Pei , Zhi-Sheng Lin , Wei-Han Hu , Wei-Jung Chen , Wen-Hung Lo , Hsin-pei Tsai , Ming-Che Weng , Li-Wei Chen , Po-Hsien Yang , Chun-Sheng Chen
IPC分类号： G06F3/02
CPC分类号： G06F3/02 , G06F1/169 , G06F3/021 , G06F2203/04101 , G06F2203/04108
摘要： An electronic apparatus and an operation method thereof are provided. The electronic apparatus has a sensor module. A space operation mode is enabled when an operation object is detected in a sensor space by the sensor module. A controlling function corresponding to one of a plurality of using spaces divided from the sensor space in which the operation object is located is enabled. Movement information of the operation object is detected by the sensor module, and an operation action corresponding to the enabled controlling function is executed.
摘要翻译：提供一种电子设备及其操作方法。电子设备具有传感器模块。当传感器模块在传感器空间中检测到操作对象时，启用空间操作模式。使能与从操作对象所在的传感器空间分开的多个使用空间中的一个对应的控制功能。由传感器模块检测操作对象的运动信息，并且执行与使能控制功能相对应的操作动作。

4. 发明授权

US11617932B2 Racket shock-absorbing device 有权
公开(公告)号：US11617932B2
公开(公告)日：2023-04-04
申请号：US17243240
申请日：2021-04-28
申请人： Wei-Jung Chen
发明人： Wei-Jung Chen
IPC分类号： A63B60/54 , A63B49/022
摘要： A racket shock-absorbing device comprises: a lower hard seat member, disposed at a periphery of a racket frame of a racket and arranged between two single grommets respectively formed with a string hole allowing a string to be disposed, and a top end thereof is disposed with one or more than two protrusions, and the lower hard seat member is formed with a recess; at least one upper soft pad member, disposed on a top end of the lower hard seat member, wherein one or more than two buckle slots is disposed inside the upper soft pad member and arranged correspondingly to the one or more than two protrusions of the lower hard seat member, the string is crossly disposed and downwardly pressed at a top end defined at a center of the upper soft pad member and arranged correspondingly to the recess of the lower hard seat member.

5. 发明申请

US20050268186A1 Semiconductor wafer with test circuit and manufacturing method 审中-公开
标题翻译：具有测试电路和制造方法的半导体晶圆
公开(公告)号：US20050268186A1
公开(公告)日：2005-12-01
申请号：US10841915
申请日：2004-05-06
申请人： Wei-Jung Chen , Yung-Ching Chang , Jaw-Shin Huang , Cheng-Yu Fang , Chien-Peng Yu
发明人： Wei-Jung Chen , Yung-Ching Chang , Jaw-Shin Huang , Cheng-Yu Fang , Chien-Peng Yu
IPC分类号： G01R31/28 , G11C29/00
CPC分类号： G01R31/2831
摘要： A semiconductor wafer includes a wafer body, a plurality of dies spacedly and alignedly formed on the wafer body to define a scribe line as a margin formed between each two the dies, wherein at least one of the dies is formed as a tested die having a terminal pad for measuring a voltage of the tested die via a measuring tool, and a test circuit having an output end and an input end electrically extended from an internal circuit of the tested die. An output impedance of the test circuit is relatively smaller than an impedance of the measuring tool, such that the voltage of the tested die adapted for being precisely measured when testing terminals of the measuring tool are electrically pointed at the tested die and the output end of the test circuit respectively.
摘要翻译：半导体晶片包括晶片体，多个晶片间隔地并排成型地形成在晶片本体上，以限定划线作为在两个模具之间形成的边界，其中至少一个模具形成为具有端子焊盘，用于经由测量工具测量被测试的裸片的电压;以及测试电路，其具有从被测试的裸片的内部电路电扩展的输出端和输入端。测试电路的输出阻抗相对小于测量工具的阻抗，使得当测量工具的测试端子的电极指向被测试模具时，适合于精确测量的被测试模具的电压，测试电路。

6. 发明授权

US08784873B2 Use of histone deacetylase inhibitors in changing MRJP3 protein in royal jelly 有权
标题翻译：使用组蛋白脱乙酰酶抑制剂改变皇家果冻中的MRJP3蛋白
公开(公告)号：US08784873B2
公开(公告)日：2014-07-22
申请号：US12507545
申请日：2009-07-22
申请人： Chung-Yang Huang , Chia-Nan Chen , Wei-Jung Chen , Wei-Jan Huang , Li-Ling Chi
发明人： Chung-Yang Huang , Chia-Nan Chen , Wei-Jung Chen , Wei-Jan Huang , Li-Ling Chi
IPC分类号： A23K1/165 , A61K31/352
CPC分类号： A61K31/353 , A01K53/00 , A61K31/185 , A61K35/644 , Y02P20/582
摘要： The invention provides a method of changing a ratio of 68 to 64 kDa protein of MRJP3 in a royal jelly, a method of producing a royal jelly comprising MRJP3 having a changed ratio of 68 to 64 kDa protein relative to a control royal jelly and the royal jelly produced thereform. Also provided is a method of promoting the growth of the larva of a queen bee comprising feeding the larva of the queen bee a royal jelly of the invention. Further provided is a method of producing bee larva, pupa and queen bees with sizes larger than normal.
摘要翻译：本发明提供了改变皇家果冻中MRJP3的68至64kDa蛋白的比例的方法，包括相对于对照蜂王浆和皇室的具有68至64kDa蛋白质变化比例的MRJP3的蜂王浆的生产方法果冻生产。还提供了促进雌蜂的幼虫生长的方法，包括将本发明的蜂王浆的雌蜂喂给蜂王浆。还提供了一种生产尺寸大于正常的蜜蜂幼虫，蛹和雌蜂的方法。

7. 发明申请

US20060113602A1 MOS circuit arrangement 审中-公开
标题翻译： MOS电路布置
公开(公告)号：US20060113602A1
公开(公告)日：2006-06-01
申请号：US10999722
申请日：2004-11-29
申请人： Cheng-Yu Fang , Wei-Jung Chen , Sheng-Ti Lee , Chien-Peng Yu , Yi-Cheng Wang
发明人： Cheng-Yu Fang , Wei-Jung Chen , Sheng-Ti Lee , Chien-Peng Yu , Yi-Cheng Wang
IPC分类号： H01L29/94
CPC分类号： H01L27/0266 , H01L29/78
摘要： A MOS circuit arrangement includes a silicon substrate, a semiconductor device, a field oxide layer, and a poly-protective layer. The silicon substrate has a conductive doping incorporated therein, wherein the semiconductor device is electrically connected with the silicon substrate. The field oxide layer is formed on the silicon substrate at a position spaced apart from the terminal of the semiconductor device to form an active region between the field oxide layer and the semiconductor device. The poly-protective layer deposited on the active region to communicate the field oxide layer with the terminal of the semiconductor device, wherein the poly-protective layer provides a junction breakdown path between the semiconductor device and the silicon substrate to increase a junction breakdown voltage of the semiconductor device.
摘要翻译： MOS电路装置包括硅衬底，半导体器件，场氧化物层和多保护层。硅衬底具有掺入其中的导电掺杂，其中半导体器件与硅衬底电连接。场氧化物层形成在硅衬底上与半导体器件的端子间隔开的位置处，以在场氧化物层和半导体器件之间形成有源区。沉积在有源区上的多晶硅保护层将场氧化物层与半导体器件的端子连通，其中多晶硅保护层在半导体器件和硅衬底之间提供结击穿通路径，以增加晶体管的击穿电压半导体器件。

8. 发明申请

US20050282361A1 Semiconductor wafer and manufacturing process thereof 审中-公开
标题翻译：半导体晶片及其制造工艺
公开(公告)号：US20050282361A1
公开(公告)日：2005-12-22
申请号：US11167967
申请日：2005-06-27
申请人： Wei-Jung Chen , Yung-Ching Chang , Jaw-Shin Huang , Cheng-Yu Fang , Chien-Peng Yu
发明人： Wei-Jung Chen , Yung-Ching Chang , Jaw-Shin Huang , Cheng-Yu Fang , Chien-Peng Yu
IPC分类号： H01L21/301 , H01L21/44 , H01L23/544
CPC分类号： H01L22/32
摘要： A semiconductor wafer includes a wafer body, a plurality of analog IC dies spacedly and alignedly formed on the wafer body to define a scribe line as a margin formed between each two dies wherein each of the dies has an internal circuit formed therewithin and at least a terminal pad formed along the scribe line, and a conductive arrangement including at least a conductive element formed on the wafer body to electrically connect the terminal pad with the internal circuit of the die in such a manner that when the die is cut off from the wafer body along the scribe line, the terminal pad is cut off from the die so as to keep the internal circuit in the die.
摘要翻译：半导体晶片包括晶片体，多个模拟IC晶体管间隔地并排成型地形成在晶片体上，以在每个两个晶片之间形成边界，形成划线，其中每一个晶片具有形成在其中的至少一个内部电路端子焊盘，以及导电装置，其至少包括形成在晶片体上的导电元件，以使端子焊盘与芯片的内部电路电连接，使得当芯片从晶片切断时主体沿着划线，将端子焊盘从模具切断，以将内部电路保持在模具中。

9. 发明申请

US20050248000A1 Semiconductor wafer and manufacturing process thereof 失效
公开(公告)号：US20050248000A1
公开(公告)日：2005-11-10
申请号：US10841035
申请日：2004-05-06
申请人： Wei-Jung Chen , Yung-Ching Chang , Jaw-Shin Huang , Cheng-Yu Fang , Chien-Peng Yu
发明人： Wei-Jung Chen , Yung-Ching Chang , Jaw-Shin Huang , Cheng-Yu Fang , Chien-Peng Yu
IPC分类号： H01L21/301 , H01L21/44 , H01L23/544
CPC分类号： H01L22/32
摘要： A semiconductor wafer includes a wafer body, a plurality of analog IC dies spacedly and alignedly formed on the wafer body to define a scribe line as a margin formed between each two dies wherein each of the dies has an internal circuit formed therewithin and at least a terminal pad formed along the scribe line, and a conductive arrangement including at least a conductive element formed on the wafer body to electrically connect the terminal pad with the internal circuit of the die in such a manner that when the die is cut off from the wafer body along the scribe line, the terminal pad is cut off from the die so as to keep the internal circuit in the die.

10. 发明授权

US6028330A CMOS sensor having a structure to reduce white pixels 失效
标题翻译： CMOS传感器具有减少白色像素的结构
公开(公告)号：US6028330A
公开(公告)日：2000-02-22
申请号：US128564
申请日：1998-08-04
申请人： Sheng-Ti Lee , Chi-Ting Shen , Chi-Fin Chen , Chien-I Fu , Chao-Jung Chen , Wei-Jung Chen
发明人： Sheng-Ti Lee , Chi-Ting Shen , Chi-Fin Chen , Chien-I Fu , Chao-Jung Chen , Wei-Jung Chen
IPC分类号： H01L27/146 , H01L27/148
CPC分类号： H01L27/14603
摘要： A sensor device has a field oxide layer deposited over a substrate. The field oxide layer has opposing sharp edges that define a window. A sensor is formed in the window with a distance between the sensor and each sharp edge that defines the window. The distance forms a gap that reduces the effects of the sharp edges on the sensor, thereby reducing the current leakage from the sensor. In addition, a protective layer may be disposed over the distance and the sharp edges of the field oxide layer to further protect the sharp edges from damage that may be caused from further processing.
摘要翻译：传感器装置具有沉积在衬底上的场氧化物层。场氧化物层具有限定窗口的相对的尖锐边缘。传感器形成在窗口中，传感器与限定窗口的每个锋利边缘之间有一段距离。该距离形成间隙，减小了传感器上锋利边缘的影响，从而减少了传感器的电流泄漏。此外，保护层可以设置在场氧化物层的距离和尖锐边缘上，以进一步保护尖锐边缘免受进一步处理可能引起的损伤。

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